adds the `zephyr,memory-attr` property to the SRAM1 and SRAM2
memory nodes to explicitly define their MPU attributes as normal
RAM. This ensures proper memory protection and caching behavior
when these regions are used by the kernel or application.
Resolve a Data Access Violation encountered during
test, where the faulting address was 0x30000000.
Note: add the zephyr,memory-attr property in the board overlay for SRAM2
to avoid conflict with the support of h7rs ethernet with MPU regions
enabled.
see link below for more details :
https://github.com/zephyrproject-rtos/zephyr/pull/97364/files#r2439668915
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Different Series 2 devices have different RTC IPs, despite sharing
a HAL driver. Introduce separate bindings for the different IPs, and
use a chosen node to select the node to use for timekeeping.
A chosen node was selected over a nodelabel since chosen nodes can
be overridden by board-level dts and devicetree overlays, while
nodelabels can't.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
- Add DTS for MAX32664C
- Add driver for MAX32664C
- Add example for MAX32664C Heart rate measurement with Bluetooth
- Add private attributes and channels for health measurement
Closes: #93473
Signed-off-by: Daniel Kampert <DanielKampert@kampis-elektroecke.de>
- Generate a full devices device tree file
- Use specific_part.dtsi + full_devices.dtsi way to
desribe all devices
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
- add clock_init function to initialize clock sources according
devicetree settings
- finish basic clock api function
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
1. Enable MICFIL on frdm_mcxn236 board.
2. MICFIL CLOCK and DATA Pins are conflict with
flexcomm0_lpuart pins, so change flexcomm0_lpuart
pins to 'FC0_P2_PIO0_6' and 'FC0_P3_PIO0_7'.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Correct #address-cells property in exti interrupt controller nodes
for STM32 SoCs that defined it to 1 whereas value 0 is more applicable
as that interrupt does not expect sub-node nor interrupt mapping.
No functional changes as the value is ignored. This change rather targets
STM32 SoCs DTSI files consistency.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add missing #address-cells property in exti interrupt controller node.
This change prevents build warning messages when using DTC v1.6.1. With
former or later DTC versions, missing #address-cells property is ignored
but it remains requires as per DT schemas, e.g. [1]
Link: https://github.com/devicetree-org/dt-schema/blob/v2025.08/dtschema/schemas/interrupt-controller.yaml#L18 [1]
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add missing #address-cells property in exti interrupt controller node.
This change prevents build warning messages when using DTC v1.6.1. With
former or later DTC versions, missing #address-cells property is ignored
but it remains requires as per DT schemas, e.g. [1]
Link: https://github.com/devicetree-org/dt-schema/blob/v2025.08/dtschema/schemas/interrupt-controller.yaml#L18 [1]
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add SPI driver support for Renesas RZN2L, T2M
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Add missing nodes for USB feature to STM32WBA6x DTSI.
(Note: only WBA65 DTSI exists today, but USB is available in other SoCs of
the series - this should be reworked later)
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
This driver is based on the XSPI driver for Renesas RZ/T2M and N2L,
and the SPIBSC driver for Renesas RZ/A3UL from the HAL.
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Add ITM to common device tree and set the correct clock config
when using SWO as a logging backend
Signed-off-by: Henrik Grunmach <henrik.grunmach@rohde-schwarz.com>
Microchip MEC SoC's include an interrupt aggregator affecting
the routing of interrupt to the ARM NVIC. IA can not be treated
as a true second level interrupt controller. All interrupt sources
with the exception of GPIOs and eSPI virtual wires can be routed
by IA to individial NVIC inputs. Each bank of GPIOs and VWires
are aggregated into a single NVIC input per bank. For the NVIC
to receive the interrupt signal the respective GIRQ enable must
be set. We attempted to add this informatation by encoding the
DT irq property. This exeperiment failed due to how Zephyr
builds the interrupt tables and MEC IA is not a true second
level interrupt controller. Therefore, drivers for MEC peripherals
need to GIRQ number and bit position to pass to HAL API's or
if a driver is implemented in the linux style without using
the full MEC HAL the GIRQ information is present in DT.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
* Separates HPPASS and HPPASS SAR ADC in the device tree
* Makes HPPASS SAR ADC a child of the HPPASS system to reflect hardware
architecture.
* Adds binding files for HPPASS SAR ADC driver.
Signed-off-by: John Batch <john.batch@infineon.com>
According to the RM, erasing must be done per sector. So, the start
address and the size of an erase operation must be a multiple of 8192
bytes. So, the erase-block-size should be 8192 bytes.
Programming can be done per phrase (start address and size a multiple
of 16 bytes). So, write-block-size should be 16 bytes.
Signed-off-by: Allen Zhang <chunfeng.zhang@nxp.com>
Adds common and SoC-specific .dtsi files for the Microchip
PIC32CZ CA80 CA90 and CA91 family. These files define core
peripherals, address maps, and interrupt controller structure
shared across the PIC32CZ CA80 9x variants.
Signed-off-by: Mohamed Azhar <mohamed.azhar@microchip.com>
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
