This probably should have been caught much earlier, but well, here we
are. The original license came from the following linux dt that
BeagleBoard.org uses [0]. However, due to differences between linux and
zephyr dt and the fact that zephyr does not yet support most of the
devices on this soc, the only lines same between the two files are the
`status = "disabled";`, and some of the address (not all since things
like GPIO are handled differently). Keeping that in mind, this file
should never have used that license or have TI Copyright.
If it's too late to change the license now, we can probably add this
file to exceptions, since the current license of the file, i.e. GPL-2.0
and MIT should cover all cases where Apache-2 can be used. Again,
apologies since there was no reason for this file to use the dual
license.
[0]:https://github.com/beagleboard/BeagleBoard-DeviceTrees/blob/v6.12.x-Beagle/src/arm64/ti/k3-am62-main.dtsi
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
This fix addresses the issue encountered when power management (pm)
is enabled, as the PWM test suites utilize the GPIO driver, which
now incorporates the latest power domain enhancements and requires
CONFIG_POWER_DOMAIN to be enabled. Power domain functionality
manages device power actions such as turning on and off.
Accordingly, the pm device support for the pwm_silabs_siwx91x
driver has been updated to align with the recent power domain
improvements.
Signed-off-by: S Mohamed Fiaz <Fiaz.Mohamed@silabs.com>
- Correct address and size for sdram-controller node
- Move sdram-controller node from r7fa8d1xh.dtsi to ra8x1.dtsi,
since all RA8x1 devices have this hardware IP
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
This patch fixes a bug where the siwg917 SoC didn't enter deep sleep
even when the CONFIG_PM Kconfig option was selected, due to the
default power state of the network coprocessor.
Users should only need to activate the CONFIG_PM Kconfig option
when they want to enable power management and be able to deep
sleep by default.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Clarify that the AMD Xilinx PS Triple Timer Counter (TTC) is used in both
Zynq UltraScale+ MPSoC (ZynqMP) and Versal platforms. Update the device
tree binding description and Kconfig accordingly.
Also, rephrase the Kconfig help text to fix grammar issues and improve
clarity.
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Uses the correct way to partition memory as per the linux binding,
also fixes names which were not compliant with the zephyr
devicetree guidelines
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Uses the correct way to partition memory as per the linux binding,
also fixes names which were not compliant with the zephyr
devicetree guidelines
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Updates the Port DTS nodes to use microchip gpio g1 driver.
Updates the file structure as per the ordering information.
Signed-off-by: Mohamed Azhar <mohamed.azhar@microchip.com>
1.Add "mux-1-dc-0-div" and "mux-2-dc-0-div" property
in mc_cgm device tree for STM clock divider setting
and set these properties in frdm_mcxe31b.dts
2.Enable STM peripheral clock in mc_cgm_clock_control_on
function
3.Support to get STM frequency from mc_cgm_get_subsys_rate
function
4.Configure STM clock in mc_cgm_init function
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Adds the pinctrl node and encapsulates the port nodes within
the pinctrl node for pic32cx sg series of socs.
Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
Added waveshare dsi panel driver. It is on I2C bus.
Signed-off-by: Winteri Wang <dongjie.wang@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com>
Added mcux_lcdifv3 driver and enabled runtime mmio configuration.
Signed-off-by: Winteri Wang <dongjie.wang@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com>
Add support for KSZ9131 (Gigabit Ethernet Transceiver with RGMII Support).
As first starter, 100MBit/s mode is tested.
https://www.microchip.com/en-us/product/ksz9131
Signed-off-by: Tony Han <tony.han@microchip.com>
Some variants of the PCA953x family support pull-up / pull-down
resistors through registers 0x43 and 0x44 (mostly the TCAL9538 variant).
We already support input latching and interrupt masking (which is also
only present on a few variants), so let's also add support for pull-up
and pull-down resistors.
The feature can be enabled with the has-pud property in the device tree.
Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
Document the AD4170-4, AD4190-4, and AD4195-4 low noise, high precision
24-bit ADCs, each supporting 4 differential or 8 single-ended inputs,
integrated PGA (0.5-128). All devices feature internal and external
buffered references, operate from 4.75-5.25V analog and 1.7-5.25V
digital supply.
Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com>
Update STM32 ADC binding description now that the STM32F3 ADC asynchronous
prescaler is set through the clock property.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Now that the ADC prescaler are set within the driver using the clock
system, the specific rcc compatibles for F1 and F3 are no longer useful.
Replace them with the standard one (from which they were derived).
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
To easily differentiate between the different clocks that can be configured
in device tree, make their naming mandatory, and explicit what the expected
names are.
Add these names in all dtsi and dts files that need them.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The Wi-Fi firmware image in the QSPI flash has always been located in
the last 512kB of the 16MB Flash device. This offset is 0xf80000, not
0xe80000 as it was mistakenly set. Fix.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
Add the definition for the Master Boot Record partition at the
beginning of the flash. This is used by existing Arduino 'Storage'
libraries to store partition table information.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
All the clocks names on SiWx91x follow the pattern "SIWX91X_CLK_xxx".
SIWX91X_ADC_CLK was an exception.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Move nxp,xspi.yaml from spi bindings to mtd, it should be flash
controllor rather than simple bus controller.
Delete the xspi flash mx25um51345g bindling yaml file which is useless.
Enable flash and two psrams on RT700 core0 and one psram on core1.
Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
Add an new boolean property `dma-driven` to indicate if the I2C
hardware module has a dedicated DMA support for the data transfer.
Add this property to `i2c_ctrlx` nodes in NPCKn variant SoCs.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The Analog Device AD5601, AD5611, and AD5621 devices are 8, 10 and 12
bits DAC respectively.
These devices use a 16 bits SPI communication protocol.
The 2 first bit encode the low power mode (this driver do not use the
low power mode, it always run in the 'normal' mode).
The next 14 bits contain the left aligned value. The 2, 4, or 6
remaining bits (depending on the resolution) are set to 0.
Signed-off-by: Mickael Bosch <mickael.bosch@linux.com>
When GPIO works with IOPCTL, the PIO instance offset in IOPCTL
can't be calculated easily. It should be recorded in DTS based on
SOC integration.
When IOPCTL is used, add PIO reigster address in DTS, gpio_mcux
driver will configure the PIO register based on this address.
Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
Remove the handling of cross domain pins from nrf drivers. To use
cross domain in tests, force on constlat and disable power domains
for the test.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add more functionality in clock control driver.
Add bindings for dfll, fdpll, gclk generator, mclk cpu, osc32k, rtc clock
and xosc.
Signed-off-by: Sunil Abraham <sunil.abraham@microchip.com>
