dts: arm: ti: mspm0: Add a support for TI MSPM0 Timer Counter

Add a support for TI MSPM0 Timer which has sub module for Counter,
Timer Capture and Timer Compare.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
This commit is contained in:
Saravanan Sekar 2025-05-08 21:57:31 +05:30 committed by Daniel DeGrasse
commit 3fe1eda7fb

View file

@ -26,4 +26,22 @@
status = "disabled";
};
};
soc {
gpt0: timg@40084000 {
compatible = "ti,mspm0-timer";
reg = <0x40084000 0x2000>;
clocks = <&ckm MSPM0_CLOCK_LFCLK>;
interrupts = <16 0>;
clk-prescaler = <255>;
clk-div = <1>;
status = "disabled";
counter0: counter {
compatible = "ti,mspm0-timer-counter";
resolution = <16>;
status = "disabled";
};
};
};
};