Clear scan_in_progress and notify the application when
nrf_wifi_disp_scan_res_get_zep() fails. Do not clear the flag
early on success; let the final result event own teardown.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Assisted-by: Cursor:Auto
- Add pclk-hb-disable DTS property to control PCLK toggling
during horizontal blank periods. Different camera receivers may
have different requirement on this configuration.
- Reorder initialization sequence to apply format settings after
the common initialization table. Different format may apply differnt
configurations and overwrite the default configurations.
- Change the input XCLK frequency from 6MHz to 24MHz. According to
the data sheet and software application note, the camera sensor
requires the clock to be within the range of 10~48 MHz and the
typical value is 24 MHz. It can work with 6MHz XCLK but the
performance is not ideal. For example it glitches with VGA resolution.
- Fix resolution-specific register tables for QCIF, CIF, and VGA modes
with corrected timing and gamma settings for OV7670. When the OV7670
driver was originally enabled with the camera receiver smartdma, only
the QVGA resolution is tested, since smartdma can only support this
resolution, the others are not tested.
- Fix comment typo: case 352 is CIF, not QCIF
- Fix array size bug in QVGA format selection
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
Default overrides in Kconfig can makeuse of configdefault instead of
config to preserve the dependency checks.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Make sure to have enough even packets for every ACL TX packets we want to
respond. Declare (BT_EVT_RX_COUNT) as (BT_ACL_TX_COUNT + 1).
Signed-off-by: Josuah Demangeon <me@josuah.net>
Add target (peripheral) mode to the Espressif SPI driver. The scattered
transfer buffers are coalesced into one FIFO transfer and the received
data is scattered back on completion. Socs with the integrated SPI-DMA
use DMA, as their CPU/FIFO slave path drops the final received byte.
Also fix the controller chip-select hold to track the remaining length
so trailing zero-length buffers no longer keep the line asserted.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
To avoid MXC_SPI_Shutdown having an invalid state (for DMA channels,
specifically), add a call to initialize the internal state of the SPI
driver before calling shutdown. This avoids a bug with DMA channels being
released that shouldn't be by shutdown.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Pull the code for checking if a given peripheral has DMA channels assigned
into a shared inline function.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
To avoid accidentally sending bogus data placed into the dummy buffer
during an RX, use dedicated two-byte buffers for TX/RX each.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Add support for target mode for the MAX32 SPI peripheral, including testing
support for the APARD32690 board.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Fixes for properly setting half duplex mode for the SPI peripheral, and
handle fifo/interrupts properly for that mode of operation.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Add a hwinfo backend that reports the reset cause on NXP MCUs that use
the MC_RGM (Reset Generation Module), such as the MCXE family, rather
than the Kinetis RCM/SIM blocks. The driver decodes the MC_RGM DES
(Destructive Event Status) and FES (Functional/External Reset Status)
registers into Zephyr RESET_* flags.
DES and FES status bits are write-1-to-clear, so
hwinfo_clear_reset_cause() writes back the latched bits it just read.
The backend binds to the existing "nxp,mc-rgm" compatible and reaches the
register block through the MC_RGM_Type CMSIS layout at the node's reg
address, so no fsl HAL component is required.
hwinfo_get_device_id is intentionally left as the weak -ENOSYS default:
the MCXE family exposes no per-die unique identifier (only SIUL2 MIDR
part identification), so reporting it as a device ID would be misleading.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
If possible, use 64 bit access instead of the default memcpy which
uses byte access. For example, on nrf54l15dk it reduces copying time
from 5 ms to 2 ms.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add handling of the optional property which indicates that VPR core
is indicating its readiness by setting a specific VPR event. Mailbox
is polling for readiness before sending the signal. Feature is
optional and used only for instances with nordic-vpr-ready-event
property.
Add optional setting of the event in VPR initialization.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Do not clean events during the initialization as there might be
some pending events that were set before the driver is initialized.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
CACHE_MANAGEMENT depends on DCACHE,
therfore we should also only select it, if it is
enabled and not just if the cache exists, as the
user could disable DCACHE and then there
would be a problem.
DCACHE btw depends on CPU_HAS_DCACHE
and is enabled by default.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Sustained CMUX and PPP data transfer can overrun the modem UART when
neither side can pause the other. Send AT+IFC=2,2 during init, enabling
RTS/CTS hardware flow control on the modem UART for boards that wire
those lines.
Signed-off-by: Paulo Santos <pauloxrms@gmail.com>
The EG25-G defined no set_baudrate script, so
CONFIG_MODEM_CELLULAR_NEW_BAUDRATE was ignored and the link stayed at
115200. Add the script (AT+IPR) behind the same mechanism the other
vendors use, compiled only when a non-default rate is configured, and
derive the AT+CMUX port-speed field from the configured rate so the
modem moves its multiplexer UART to match. Rates without a defined
port-speed code fail the build rather than silently mismatching.
Raise the baudrate-change delay default to the 1000 ms the EG25-G needs
to switch rate.
Signed-off-by: Paulo Santos <pauloxrms@gmail.com>
The iMX GPIO IMR and ISR registers are not reset by a warm reset.
If a pin had its interrupt enabled in a previous boot, it remains
active after reset. This causes a spurious ISR to fire the moment
irq_enable() is called during driver init, before any Zephyr driver
has called gpio_pin_interrupt_configure() for that pin.
Fix this by: (1) clearing IMR to 0 to disable all interrupt sources,
(2) writing 0xFFFFFFFF to ISR (write-1-to-clear) to flush
any pending interrupt flags — all before irq_enable().
Tested with tests/drivers/gpio/gpio_basic_api for
mimxrt1020_evk.
Fixes#108056
Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
This reverts commit 8c2a903829.
Chunk transfers are now handled in spi_nrfx_spim_common.c to support
both DMM, RAM and EasyDMA limits for spim and spim_rtio drivers.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The nrfx_spim drivers need to handle transfers larger than the
internal buffers and DMA capabilities by splitting them into chunks.
Additionally, DMM and RAM buffers are mutually exclusive.
Update the common code to split the transfer internally, and update
the event callback to include the result of the transfer, since the
transfer can now fail. Update the spim and spim_rtio drivers to use
the new callback. Add new kconfig for DMM chunk size and update both
common code and kconfig to make it clear DMM and RAM buf are mutually
exclusive.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add build assert which validates that memory region has been defined
for SPIM instance if HAS_NORDIC_DMM is enabled.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Since nordic DMM has been introduced, the SPIM RAM buffer is no
longer used in case DMM is enabled. Before DMM the SPIM RAM buffer
was manually placed in the DMM linker section, now the driver
allocates a buffer from the DMM linker section dynamically instead.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Get/put PM state lock for suspend-to-ram mode when CONFIG_PM_S2RAM
is enabled to prevent clocks are switch off while an I2C transfer
is on-going.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add i2c_stm32_pm_get() and i2c_stm32_pm_put() helper functions for
all STM32 I2C driver flavors to get and put PM resources when the
I2C bus is used. Use them in the I2C master mode sequences instead
of using local implementation.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Check that the controller and PHY clock devices are ready, then
enable the clocks with clock_control_on() before calling
clock_control_set_rate().
This lets the host EHCI driver bring up RT7xx USB clocks from the
devicetree clock description.
Signed-off-by: Aiden Hu <weiwei.hu@nxp.com>
This commit fixes an issue where a framing error is never cleared
on the PL011 serial peripheral.
Assisted-by: Claude:claude-opus-4.7
Signed-off-by: Perry Naseck <pnaseck@media.mit.edu>
Added option to nrf gswdt drivers to be able to configure
maximum timeout window and also to be able to stop gswdt.
This features are only available when gswdt service is
supported by local domain, otherwise gswdt can still be
used but with fixed timeout and cant be stopped.
Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
New driver based on sysctrl acting as a watchdog.
After global software watchdog setup sysctrl will monitor
pings from particular local domain and reset SOC if ping
doesnt arrive before 6s timeout expires.
This software watchdog will be active only if local
domain will do wdt setup procedure.'
Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
Add tfm-nrf-mramc to zephyr MRAMC driver, since mramc is secure only
peripheral. Access of nrf-mramc need nrf mramc service.
Bugfix for unaligned write should be done byte by byte instead of word
by word.
Flash write in normal write mode, previously nrf_mramc driver write use
DIRECT_WRITE_MODE in mramc. It is a not reliable method of handling
flash write since the write buffer may lost content when the write is
interrupted. This change is to switch to normal write mode and the
every write should align to 16 bytes which is the write-block-size.
Signed-off-by: Travis Lam <travis.lam@nordicsemi.no>
Physical write block size of mram is 16 for nrf7120. While using
direct write mode for write. Writing 32-bits word is handled by
mramc hardware itself.
In nrf7120 is capable to disable busfault when word written is
corrupted. Data verification is added after write/erase to
ensure a write is robust.
Signed-off-by: Travis Lam <travis.lam@nordicsemi.no>
qspi_read_jedec_id() builds the JEDEC Read ID (0x9F) command with
.AddressMode set to QSPI_ADDRESS_1_LINE, while intending to send no
address phase: .AddressSize is set to QSPI_ADDRESS_NONE, which is the
AddressMode "none" constant (0x0) and, used as an address size, equals
QSPI_ADDRESS_8_BITS.
Because the STM32 HAL emits an address phase whenever
AddressMode != QSPI_ADDRESS_NONE, the controller clocks out a phantom
8-bit address after the opcode. This shifts the returned data by one
byte and drops the manufacturer ID: flash_read_jedec_id() returns e.g.
40 19 00 instead of EF 40 19 for a Winbond W25Q256JV.
Set .AddressMode to QSPI_ADDRESS_NONE so the Read ID command issues no
address phase, as the 0x9F command requires.
Signed-off-by: Lucas Zampar Bernardi <lucas.zampar@gmail.com>
Expose the chunk size used when downloading the nRF70 firmware patches
to the RPU as NRF70_PATCH_DL_CHUNK_SIZE. It defaults to 4096 bytes, and
to 2048 bytes on the nRF54H.
Each chunk maps to a single SPI/QSPI transfer, so it has to fit both the
host EasyDMA MAXCNT and any DMA bounce region the bus driver relies on.
The previous hard-coded 8192 overran the 13-bit EasyDMA MAXCNT on nRF91
(max 8191 bytes) and the 4 KB cpuapp DMA bounce region on nRF54H20. The
oversized transfer was rejected and the error dropped on the write path,
leaving the RPU with a corrupt patch and a bad boot signature.
On the nRF54H the bounce buffer comes from the small 4 KB cpuapp DMA
region that is shared with the console UART and other peripherals, so
even a 4096 byte chunk cannot find contiguous space there. Default to
2048 on that SoC and keep 4096 elsewhere, which also stays within the
nRF91 MAXCNT while keeping the chunk count low.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Assisted-by: Cursor:Auto
- Added `phy_channel` to track actual PHY hardware state
- Created `rf_change_channel()` as single entry point for all changes
- Implemented `rf_restore_main_channel()` for automatic restoration
- Added `rf_restart_rx_if_enabled()` helper to avoid code duplication
- Restored `rf_set_channel()` as low-level PHY configuration helper
Signed-off-by: Baptiste Coffin <baptiste.coffin_1@nxp.com>
Wrap each node-label arm of OSPI_INST_NUM() in
COND_CODE_1(DT_NODE_EXISTS(...)) so DT_NODELABEL(octospiN) is only
expanded when that node exists in the current DTS. The macro
previously referenced octospi1 and octospi2 unconditionally, which
broke the build on parts that do not have both instances. An
unknown node now resolves to 0 instead of silently defaulting to 1.
Guard the OSPIM-only helpers (DT_OSPI_IO_PORT_PROP_OR and
OSPI_INST_IO_{LOW,HIGH}_PORT) with #if defined(OCTOSPIM) and
provide neutral zero stubs otherwise, so the driver compiles on
STM32 parts without the OCTOSPI I/O Manager (e.g. STM32L4/L5).
Add a BUILD_ASSERT in MSPI_STM32_INIT to reject at compile time a
DTS node that is neither octospi1 nor octospi2 (the trailing 0
case).
Zero-initialize s_MemMappedCfg so no uninitialized fields are
passed to HAL_OSPI_MemoryMapped().
Signed-off-by: Kirill Shypachov <kshypachov@outlook.com>
Add OSPI_INST_NUM() to determine the hardware OSPI instance
number (1, 2, ...) from the devicetree node label instead of the
DT_INST ordinal index. The ordinal depends on enumeration order
and does not necessarily match the hardware instance, so the
default OSPIM port values could be assigned to the wrong
controller.
Use OSPI_INST_NUM() and the new OSPI_INST_IO_{LOW,HIGH}_PORT()
helpers for the clk, ncs and IO port defaults, replacing the
(index == 0) assumption that index 0 is always OCTOSPI1.
Collapse the identical OCTOSPI1 and OCTOSPI2 branches in
mspi_stm32_ospi_config() into a single assignment and keep only
the instance validity check.
Drop a duplicate DataDtrMode assignment in
mspi_stm32_ospi_prepare_cmd().
Signed-off-by: Kirill Shypachov <kshypachov@outlook.com>
Fix reading the OSPIM port settings from devicetree. The values
were resolved with a runtime dev_id passed to devicetree macros,
so the macros always fell back to defaults instead of the DTS
values. Read the ports from the device config, populated at
build time, instead.
Add an STM32U5 errata 2.6.1 workaround: set DQSE in WCCR for
memory-mapped writes, otherwise every memory-mapped write
returns an AHB error (Bus Fault).
Enable the bus inactivity timeout when the OCTOSPI I/O Manager
runs in multiplexed mode (OCTOSPI1/OCTOSPI2 share CS, CLK and
IO0-IO3). Without it one peripheral can hold the bus
indefinitely; the timeout forces nCS release. The value 0x34
was chosen empirically. This is gated on OCTOSPIM/MUXEN, not on
the U5 series.
Signed-off-by: Kirill Shypachov <kshypachov@outlook.com>
Extend the mspi_stm32_conf structure with fields to store the
OSPIM module port settings (clk, dqs, ncs, io low/high) that
are read from the devicetree.
Signed-off-by: Kirill Shypachov <kshypachov@outlook.com>
Enable Wi-FI keep-alive by default. If not configured,
devices may experience unintended disconnections from certain APs.
Signed-off-by: Kapil Bhatt <kapil.bhatt@nordicsemi.no>
on_cmd_socknotifyev() scanned for quote delimiters using `len` (the
attacker-controlled frame length) as the loop bound, while the data was
linearized into a fixed 40-byte `value` buffer. A long response walked
past the buffer and the value[p2] = '\0' store wrote out of bounds.
Bound the scanning loops by out_len (the linearized length) instead.
Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The +CGCONTRDP handler computed each address field length from
delimiter positions in the network-supplied response and used it
unbounded in strncpy() into the fixed temp_addr_str stack buffer (and
the smaller dns_v4_string), allowing a malicious network to overflow the
stack.
Bound each field length against the destination buffer before the copy.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Numerous AT response handlers called net_buf_linearize(dst, sizeof(dst),
...) and then wrote dst[out_len] = 0. net_buf_linearize() can return a
count equal to its destination-length argument, so when a field exactly
filled the buffer the terminating NUL was written one byte past the end,
corrupting adjacent context fields. One site additionally passed the
wire length as the destination size, allowing a full overflow.
Pass sizeof(dst) - 1 (and a correct bound for the IMSI and KCELLMEAS
sites) so the NUL write always stays in bounds, matching the already
correct handler.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
- Kconfigs in modules/ should not define configs with an SOC_ prefix.
Furthermore, these options are SDK specific, not SoC specific.
- The simplicity_sdk configs do the same.
Signed-off-by: Michael Zimmermann <michael.zimmermann@sevenlab.de>
