drivers: i3c: stm32: fix clock init for i2c fast mode plus
The logic of clock initialization for i2c fast mode (FM) and fast mode plus (FMP) is as follows: 1 compute how many system clock cycles for SCL to be low 2 compute how many system clock cycles for SCL to be high by subtracting the low duration computed above from the SCL period 3 verify the high duration computed in 2 is larger than a minimum The bug is that the step 3 for the FMP is compared with the minimum value for FM, and causes it to fail. The fix corrects the bug. Signed-off-by: Hu Dou <hugh.dou@gmail.com>
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1 changed files with 8 additions and 7 deletions
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@ -473,15 +473,16 @@ static int i3c_stm32_calc_scll_od_sclh_i2c(const struct device *dev, uint32_t i2
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1000000000ull) -
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1;
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*sclh_i2c = DIV_ROUND_UP(i3c_clock, i2c_bus_freq) - *scll_od - 2;
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if (*sclh_i2c <
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(DIV_ROUND_UP(STM32_I3C_SCLH_I2C_MIN_FM_NS * i3c_clock,
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1000000000ull) - 1)
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) {
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LOG_ERR("Cannot find a combination of SCLL_OD and SCLH_I2C at "
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"current I3C clock frequency for FM I2C bus");
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return -EINVAL;
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}
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}
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if (*sclh_i2c <
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DIV_ROUND_UP(STM32_I3C_SCLH_I2C_MIN_FM_NS * i3c_clock, 1000000000ull) - 1) {
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LOG_ERR("Cannot find a combination of SCLL_OD and SCLH_I2C at current I3C "
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"clock "
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"frequency for FM I2C bus");
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return -EINVAL;
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}
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} else {
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if (config->drv_cfg.dev_list.num_i2c > 0) {
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enum i3c_bus_mode mode = i3c_bus_mode(&config->drv_cfg.dev_list);
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