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drivers: dma: siwx91x: Use DT to declare descriptors

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Silabs siwx91x hardware use specific memory areas to store descriptors
for DMA requests. These areas are tightly coupled between the CPU and
the hardware. This helps in reducing the wait cycles.

Until now these addresses was also hard coded in the DT and in the
linker script. This patch leverage the zephyr,memory-region driver to
centralize the information in the DT.

Then, with this new implementation, the memory mapping is easier to
understand for the reader.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
This commit is contained in:
Jérôme Pouiller 2025-03-11 15:22:29 +01:00 • committed by Benjamin Cabé
commit 164bbdf294
4 changed files with 23 additions and 29 deletions
Download patch file Download diff file Expand all files Collapse all files

2
drivers/dma/dma_silabs_siwx91x.c
View file

@ -670,7 +670,7 @@ static DEVICE_API(dma, siwx91x_dma_api) = {
.clock_subsys = (clock_control_subsys_t)DT_INST_PHA(inst, clocks, clkid), \
.reg = (UDMA0_Type *)DT_INST_REG_ADDR(inst), \
.irq_number = DT_INST_PROP_BY_IDX(inst, interrupts, 0), \
.sram_desc_addr = (RSI_UDMA_DESC_T *)DT_INST_PROP(inst, silabs_sram_desc_addr), \
.sram_desc_addr = DT_REG_ADDR(DT_INST_PHANDLE(inst, silabs_sram_region)), \
.irq_configure = siwx91x_dma_irq_configure_##inst, \
}; \
DEVICE_DT_INST_DEFINE(inst, &siwx91x_dma_init, NULL, &dma_data_##inst, &dma_cfg_##inst, \

20
dts/arm/silabs/siwg917.dtsi
View file

@ -6,6 +6,7 @@
#include <arm/armv7-m.dtsi>
#include <zephyr/dt-bindings/clock/silabs/siwx91x-clock.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
#include <freq.h>
/ {
@ -27,9 +28,24 @@
sram0: memory@0 {
compatible = "mmio-sram";
/* remove sram_dma0 region at the end of the sram */
reg = <0x00000000 DT_SIZE_K(191)>;
};
sram_dma0: memory-dma@2fc00 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x0002fc00 DT_SIZE_K(1)>;
zephyr,memory-region = "dma0";
zephyr,memory-attr = <DT_MEM_ARM(ATTR_MPU_RAM)>;
};
sram_dma1: memory-dma@24061c00 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x24061c00 DT_SIZE_K(1)>;
zephyr,memory-region = "dma1";
zephyr,memory-attr = <DT_MEM_ARM(ATTR_MPU_RAM)>;
};
bt_hci0: bt_hci {
compatible = "silabs,siwx91x-bt-hci";
status = "disabled";
@ -243,7 +259,7 @@
interrupts = <33 0>;
interrupt-names = "dma0";
clocks = <&clock0 SIWX91X_CLK_DMA0>;
silabs,sram-desc-addr = <0x2fc00>;
silabs,sram-region = <&sram_dma0>;
#dma-cells = < 1>;
dma-channels = <32>;
status = "disabled";
@ -257,7 +273,7 @@
interrupts = <10 0>;
interrupt-names = "ulpdma";
clocks = <&clock0 SIWX91X_CLK_ULP_DMA>;
silabs,sram-desc-addr = <0x24061c00>;
silabs,sram-region = <&sram_dma1>;
#dma-cells = < 1>;
dma-channels = <12>;
status = "disabled";

11
dts/bindings/dma/silabs,siwx91x-dma.yaml
View file

@ -8,15 +8,12 @@ properties:
reg:
required: true
silabs,sram-desc-addr:
type: int
silabs,sram-region:
type: phandle
required: true
description: |
SRAM Address for UDMA Descriptor Storage. This address must correspond to the location
of the udma_addr0 section in the linker script for the dma0 node, and the udma_addr1
section for the ulpdma node. Ensure that the value specified for the SRAM address matches
the respective section defined in the linker file for each UDMA node, as this alignment
is critical for proper descriptor management and data transfer.
SRAM Address for UDMA Descriptor Storage. This address must match to the
location used by the hardware.
"#dma-cells":
const: 1

19
soc/silabs/silabs_siwx91x/siwg917/linker.ld
View file

@ -5,29 +5,10 @@
*/
#include <zephyr/arch/arm/cortex_m/scripts/linker.ld>
MEMORY
{
udma0 (rwx) : ORIGIN = 0x0002fc00, LENGTH = 0x00000400
udma1 (rwx) : ORIGIN = 0x24061c00, LENGTH = 0x00000400
}
SECTIONS
{
.common_tcm_code :
{
*(.common_tcm_code*)
} > FLASH
/* These regions of SRAM is where the UDMA descriptors are stored. The corresponding
section must be properly declared in the linker script to ensure correct data transfer
and proper functioning of the UDMA module */
.udma_addr0 :
{
*(.udma_addr0*)
} > udma0 AT> FLASH
.udma_addr1 :
{
*(.udma_addr1*)
} > udma1 AT> FLASH
}