Added IW416 SoC support to enable Bluetooth HCI driver perform
firmware load, and works with blueooth HCI interface.
Removed cmake file from bt_controller/, added support in hal_nxp
module to fetch firmware blobs for iW416/nw612 BT Only FW.
Signed-off-by: Nirav Agrawal <nirav.agrawal@nxp.com>
Add driver support for xlnx SD/EMMC host controller. The driver
currently support SD host controller version 3.0 and EMMC host
controller version 5.1. This driver functions with the SDHC subsystem to
perform operations on device.
Driver support both interrupt and polled mode data transfer. Uses ADMA2
to perform data transfer.
Signed-off-by: Paul Alvin <alvin.paulp@amd.com>
This adds support of ED scanning to cc13xx/cc26xx.
This could be required to select the least busy channel
or to found neighboring networks.
Note:
Although the scanning is working, OpenThread still fails
to discover OpenThread networks.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Even though through code-inspection there isn't a clear path where the
guard wouldn't act upon the length reaching the limit, this check is
moved up to unconditially validate it on every read.
Fixes#84731.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
printf is failing in hello_world sample due to current
uart driver init level. This reverts back to PRE_KERNEL_1.
As uart depends on GDMA, set it also to same level.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
rename LINK_*_*BASE_T to LINK_*_*BASE
speed options for ethernet drivers shouldn't end with a _T, implying
that ethernet is only supported via a twisted pair cable.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
The UDC driver for this beautiful USB controller is mostly rewritten
from scratch. USB Pad Calibration and clock handling are copied from the
usb_dc_sam0 driver.
The driver uses multipacket transfers for all endpoints except the OUT
control endpoint. The OUT control endpoint has a buffer that is always
mapped to the endpoint buffer register so that it always has a valid
buffer. The driver provides up to 7 IN and 7 OUT endpoints that support
any type of transfer. Double buffering is not used, for the possible
case of isochronous transfers some changes would be required in the
future.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Have ov7670 and video smartdma use video interfaces binding. With
this, we can fix the chicken-egg issue in init priority and don't need
the workaround anymore.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
The CH32V003 CPU is a QingKe V2A while others in the CH32V00x series
use the QingKe V2C. Prepare for adding support for the CH32V006 moving
to the more specifc qingke-v2a, moving some cases of SOC_CH32V003
actually meaning SOC_FAMILY_QINGKE_V2A.
Signed-off-by: Michael Hope <michaelh@juju.nz>
The bmp581 driver currently returns pressure in pascals, when
the sensor_channel enum specifies kilopascals.
Signed-off-by: Maxmillion McLaughlin <max@sorcerer.earth>
Flexram is really not a memory controller, and does not belong in memc
namespace or directory. Move it to it's own misc directory and remove
memc_ from the namespace.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Moved to: include/zephyr/drivers/misc/flexram/memc_nxp_flexram.h
This change makes it so that the .h file does not need to be pulled in
using the CMakeLists.txt file, and can be included like other public
includes.
Removes drivers/memc/memc_nxp_flexram.h
Add memc_nxp_flexram.h to include/zephyr/drivers/misc/flexram
Modify drivers/memc/memc_nxp_flexram.c to use the new include path.
Modifies the mimxrt1170 magic_addr sample to include the driver using
the new include path.
Modify the soc file: soc/nxp/imxrt/imxrt11xx/soc.c to use the new path.
Add relevant information to migration-guide-4.2.rst.
Signed-off-by: Jacob Wienecke <jacob.wienecke@nxp.com>
Co-authored-by: Declan Snyder <declan.snyder@nxp.com>
Adds taking of the task semaphore after creating the display thread
to ensure that the thread is run once, executing the SDL init.
Adjust the threads priority to match the main thread.
Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
Add PM action for the NXP LCDIC driver so that we can
recover from a lower power mode where we lose the register
settings and we need to reconfigure the block.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Commit 857e5793f1 fix
the flash_mcux_flexspi_nor.c driver to wait for the
FlexSPI to be idle before performing write/erase
operations. Add a similar check to these drivers that
also use the FlexSPI NOR block.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Add support for transmitting using the asynchronous API. The
asynchronous portion is simulated through a dedicated polling thread.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add support for transmitting using the asynchronous API. The
asynchronous portion is simulated through the system workqueue.
Signed-off-by: Jordan Yates <jordan@embeint.com>
move phy_link_callback_set() to the iface init,
so we don't have to manually check the link state,
as phy_link_callback_set() will also invoke the callback.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Add a simple non-XIP transaction before deactivating the QSPI after
a XIP transaction is performed. This prevents a CPU hang from occuring
when another XIP transaction is attempted after the QSPI is activated
again.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
MAX31855 driver had a wrong position of sign bits causing
invalid reading of negative temperature values. Fixed by
shifting position of sign bit by one bit.
Signed-off-by: Petr Vilím <petr.vilim@proton.me>
Streaming mode now supported through In-band Interrupts (I3C).
By default, a dedicated INT GPIO is prioritized, even if the sensor
is on an I3C bus.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
I3C is now a bus supported, by relying on RTIO IODEV which is supported
for all buses (I2C, I3C and SPI). Tested backwards compatibility: I2C
and I3C.
No IBI support yet.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Add clock control support for RZ/A2M
Signed-off-by: Hoang Nguyen <hoang.nguyen.jx@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
Use cache API for disabling and enabling ICACHE. The driver handles waiting
for ongoing cache invalidation.
Signed-off-by: Henrik Lindblom <henrik.lindblom@vaisala.com>
STM32 Cortex-M33, such as the L5/H5/U5 series, have a cache peripheral for
instruction and data caches, which are not present in the C-M33
architecture spec.
The driver defaults to direct mapped cache as it uses less power than the
alternative set associative mapping [1]. This has also been the default in
stm32 soc initialization code for chips that have the ICACHE peripheral,
which makes it the safest choice for backward compatibility. The exception
to the rule is STM32L5, which has the n-way cache mode selected in SOC
code.
[1]: https://en.wikipedia.org/wiki/Cache_placement_policies
Signed-off-by: Henrik Lindblom <henrik.lindblom@vaisala.com>
This change refactors the mdio_read / mdio_write functions into an
mdio_wransfer, and utilizes it to implement
mdio_{read,write,read_c45,write_c45}.
Heavily inspired by the implementation in drivers/mdio/mdio_sam.c
Signed-off-by: John Barbero Unenge <git@lsrkttn.com>
The TXFTLR register has 2 major fields which are TFT for triggering
interrupt threshold and TXFTLR for starting transfer threshold. This is
to ensure that sufficient data is ready for starting transfer.
Signed-off-by: Younghyun Park <younghyunpark@google.com>
Move initialization of 'enabled' variable together with declaration.
This fixes the following compiler error:
error: 'enabled' may be used uninitialized [-Werror=maybe-uninitialized]
This is not really an error but the compiler is tricked by the
K_SPINLOCK() macro.
Fixes: https://github.com/zephyrproject-rtos/zephyr/issues/88996
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Add locally generated info for deauth process. If deauthentication
frame is coming from AP it will be set, in other cases
(Beacon loss, New connection from user in connected state,
disconnection from user) flag will not be set.
Signed-off-by: Kapil Bhatt <kapil.bhatt@nordicsemi.no>
There are warnings generated within NVMe. `prp` is a `void *` which
is 32bits wide on 32bit systems. This adds a cast to first cast it
to a `uintptr_t` and then casts it to a `uint64_t` to supress the
warning.
This also fix an issue where `int n_prp` is defined under a case
statement. This adds the { } around the block underneath it.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
