drivers: espi: npcx: ensure the host receives the value from eSPI VW
This commit adds an option to verify weather the host has read the value after the wire 3-0 bits have been updated. Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
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3 changed files with 30 additions and 0 deletions
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@ -60,6 +60,19 @@ config ESPI_NPCX_PERIPHERAL_DEBUG_PORT_80_RING_BUF_SIZE
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The size of the ring buffer in byte used by the Port80 ISR to store
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Postcodes from Host.
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config ESPI_NPCX_VWIRE_ENABLE_SEND_CHECK
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bool "Check the value was read by host after wire bits changed"
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help
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This option enables the function to check whether the host has read the value
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after the wire data changes.
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config ESPI_NPCX_WIRE_SEND_TIMEOUT_US
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int "eSPI virtual wire send timeout count"
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default 1000
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help
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The times to check status after sending the eSPI virtual wire signal. The unit
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is microseconds (µs).
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config ESPI_TAF_NPCX
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bool "Nuvoton NPCX embedded controller (EC) ESPI TAF driver"
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depends on SOC_SERIES_NPCX4
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@ -859,9 +859,25 @@ static int espi_npcx_send_vwire(const struct device *dev,
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if (signal >= ESPI_VWIRE_SIGNAL_TARGET_GPIO_0) {
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SET_FIELD(inst->VWGPSM[reg_idx], NPCX_VWEVSM_WIRE, val);
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reg_val = inst->VWGPSM[reg_idx];
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if (IS_ENABLED(CONFIG_ESPI_NPCX_VWIRE_ENABLE_SEND_CHECK)) {
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if (!WAIT_FOR(!IS_BIT_SET(inst->VWGPSM[reg_idx], NPCX_VWEVSM_DIRTY),
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CONFIG_ESPI_NPCX_WIRE_SEND_TIMEOUT_US, NULL)) {
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LOG_ERR("%s signal %d timeout", __func__, signal);
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return -ETIMEDOUT;
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}
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}
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} else {
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SET_FIELD(inst->VWEVSM[reg_idx], NPCX_VWEVSM_WIRE, val);
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reg_val = inst->VWEVSM[reg_idx];
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if (IS_ENABLED(CONFIG_ESPI_NPCX_VWIRE_ENABLE_SEND_CHECK)) {
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if (!WAIT_FOR(!IS_BIT_SET(inst->VWEVSM[reg_idx], NPCX_VWEVSM_DIRTY),
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CONFIG_ESPI_NPCX_WIRE_SEND_TIMEOUT_US, NULL)) {
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LOG_ERR("%s signal %d timeout", __func__, signal);
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return -ETIMEDOUT;
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}
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}
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}
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LOG_DBG("Send VW: %s%d 0x%08X", reg_name, reg_idx, reg_val);
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@ -727,6 +727,7 @@ struct espi_reg {
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#define NPCX_VWEVSM_INDEX FIELD(8, 7)
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#define NPCX_VWEVSM_INDEX_EN 15
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#define NPCX_VWEVSM_BIT_VALID(n) (4+n)
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#define NPCX_VWEVSM_DIRTY 16
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#define NPCX_VWEVSM_HW_WIRE FIELD(24, 4)
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#define NPCX_VWGPSM_INDEX_EN 15
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#define NPCX_OOBCTL_OOB_FREE 0
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