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Introduce a CODEOWNERS file for auto-assign of review by GitHub Right now keep it simple for testing, we can decide how we want to go forward with this vs MAINTAINERs file, etc. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-07-07 08:56:05 -05:00
# CODEOWNERS for autoreview assigning in github
CODEOWNERS: Clarify behaviour Clarify the last matching rule, as it is not too intuitive (developers may have expected that all matching regexes would be added as code owners) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-06-15 11:17:01 +02:00
# https://help.github.com/en/articles/about-code-owners#codeowners-syntax
# Order is important; for each modified file, the last matching
# pattern takes the most precedence.
# That is, with the last pattern being
CODEOWNERS: add @nashif for docs Add @nashif as codeowner for docs temporarily until we have a dedicated owner. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-29 22:57:08 -05:00
# *.rst @nashif
# if only .rst files are being modified, only nashif is
CODEOWNERS: Clarify behaviour Clarify the last matching rule, as it is not too intuitive (developers may have expected that all matching regexes would be added as code owners) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-06-15 11:17:01 +02:00
# automatically requested for review, but you can manually
# add others as needed.
CODEOWNERS: Add for drivers/wifi same reviewers as for drivers/ethernet drivers/wifi/ is closely related to the (IP) network stack, so shouldn't be left without owners, so use the same as for Ethernet. Also, extend, don't replace reviewers for drivers/wifi/eswifi based on the above change and CODEOWNERS processing order. Also, add a reminder about this processing order at the top of file. Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2018-11-23 13:12:14 +03:00
CODEOWNERS: more tweaks Do not apply source code wide wildcard to idenitify the missing portions of the code that need entries. the * entry will be added at a later stage when we have more coverage. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-07-22 05:55:20 -04:00
# Do not use wildcard on all source yet
# * @galak @nashif
maintainers: update CODEOWNERS from MAINTAINERS file Converted using the script below with a few manual edits: from __future__ import print_function, unicode_literals, with_statement from glob import glob import email.utils seen = set() emails = set() with open('MAINTAINERS', 'rb') as f: new = False for line in f: line = line.decode('utf-8') if line.startswith('M:'): if new: emails = set() new = False print("") pattern = line.partition(':')[2].strip() emails.add(email.utils.parseaddr(pattern)[1]) elif line.startswith('F:'): new = True pattern = line.partition(':')[2].strip() if pattern.endswith("/"): pattern = pattern + "*" print("%s %s" %(pattern, " ".join(emails))) seen.add(pattern) Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-07-20 13:08:45 +03:00
CODEOWNERS: Add stephanosio as .github codeowner Add @stephanosio as a codeowner for the GitHub infrastructure-related files. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-03-18 23:13:36 +09:00
/.github/ @nashif @stephanosio
ci: github: west: Add a GH workflow to run the west command tests Replace running west command tests in run_ci.sh with a github workflow. This provides some benefits in that we can run the west command tests on multiple python versions and host OSes (linux, mac and windows). Also have the benefit that the tests are only run on modifications to files in scripts/west_commands/ or scripts/west-commands.yml. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 16:04:36 -06:00
/.github/workflows/ @galak @nashif
MAINTAINERS: remove maintainer-ship status for ioannisg Removing maintainer and/or collaborator status on - nRF platforms - TF-M - userspace - cmsis-dsp - MAINTAINERS file for ioannisg. Replace with @anangl or others, where applicable. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-16 16:18:09 +01:00
/MAINTAINERS.yml @MaureenHelm
CODEOWNERS: Add evgeniy-paltsev as an ARC part owner Add @evgeniy-paltsev as an ARC part owner in addition to @abrodkin and @ruuddw, so he will be chosen as a reviewer automatically. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-22 19:46:53 +03:00
/arch/arc/ @abrodkin @ruuddw @evgeniy-paltsev
CODEOWNERS: update architecture owners Update owners for both x86 and ARM. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-03 07:01:27 -04:00
/arch/arm/ @MaureenHelm @galak @ioannisg
arch: arm: Move ARM code to AArch32 sub-directory Before introducing the code for ARM64 (AArch64) we need to relocate the current ARM code to a new AArch32 sub-directory. For now we can assume that no code is shared between ARM and ARM64. There are no functional changes. The code is moved to the new location and the file paths are fixed to reflect this change. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-11-09 17:49:36 +00:00
/arch/arm/core/aarch32/cortex_m/cmse/ @ioannisg
/arch/arm/include/aarch32/cortex_m/cmse.h @ioannisg
arch: arm: aarch32: Rename `cortex_r` to `cortex_a_r` This commit renames the `cortex_r` directory under the AArch32 to `cortex_a_r`, in preparation for the AArch32 Cortex-A support. The rationale for this renaming is that the Cortex-A and Cortex-R share the same base design and the difference between them, other than the MPU vs. MMU, is minimal. Since most of the architecture port code and configurations will be shared between the Cortex-A and Cortex-R architectures, it is advantageous to have them together in the same directory. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-22 23:19:22 +09:00
/arch/arm/core/aarch32/cortex_a_r/ @MaureenHelm @galak @ioannisg @bbolen @stephanosio
arm/arm64: Fix misc and trivials for ARM/ARM64 split Fix the header guards, comments, github labeler, CODEOWNERS and MAINTAINERS files. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-26 15:22:59 +01:00
/arch/arm64/ @carlocaione
arch: arm64: Armv8-R AArch64 MPU implementation Armv8-R AArch64 MPU can support a maximum 16 memory regions, and the actual region number can be retrieved from the system register(MPUIR) during MPU initialization. Current MPU driver only suppots EL1. Signed-off-by: Haibo Xu <haibo.xu@arm.com> Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2021-03-04 17:51:11 +08:00
/arch/arm64/core/cortex_r/ @povergoing
xenvm: drivers: serial: Implement serial interface to Xen PV console This commit adds minimal support of Xen hypervisor console via UART-like driver. Implementation allows to use poll_in/poll_out char interface for uart_console.c driver directly to HV console instead of using Xen virtual PL011 UART. Future implementation will support interrupt driven interface on Xen event channels, currently it is under development. Also this commit introduces early console_io Xen interface, which allows to receive printk/stdout messages quickly after start, but requires Xen, built with CONFIG_DEBUG option. Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2021-07-02 11:31:56 +03:00
/arch/arm64/core/xen/ @lorc @firscity
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/arch/common/ @ioannisg @andyross
arch: add MIPS architecture support MIPS (Microprocessor without Interlocked Pipelined Stages) is a instruction set architecture (ISA) developed by MIPS Computer Systems, now MIPS Technologies. This commit provides MIPS architecture support to Zephyr. It is compatible with the MIPS32 Release 1 specification. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2020-12-01 13:29:58 +03:00
/arch/mips/ @frantony
CODEOWNERS: Add evgeniy-paltsev as an ARC part owner Add @evgeniy-paltsev as an ARC part owner in addition to @abrodkin and @ruuddw, so he will be chosen as a reviewer automatically. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-22 19:46:53 +03:00
/soc/arc/snps_*/ @abrodkin @ruuddw @evgeniy-paltsev
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 09:25:23 -05:00
/soc/nios2/ @nashif
CODEOWNERS: update architecture owners Update owners for both x86 and ARM. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-03 07:01:27 -04:00
/soc/arm/ @MaureenHelm @galak @ioannisg
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/soc/arm/arm/mps2/ @fvincenzo
soc: arm: Add Aspeed ast10x0 series support Aspeed ast10x0 series SoCs contain a ARM Cortex-M4F processor. This processor operates at 200MHz and executes on SRAM. This patch adds support for ast1030 as the first SoC of this series which is targeted but not limited at the bridge IC in a server system. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Change-Id: I668af1ff8a36a05da791c3329ae08f5ae712bdd4
2021-11-26 17:21:31 +08:00
/soc/arm/aspeed/ @aspeeddylan
soc: arm: atmel: Introduce sam4l SoC Introduce SAM4L SoC initial files. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-18 20:05:31 -03:00
/soc/arm/atmel_sam/common/*_sam4l_*.c @nandojve
CODEOWNERS: code-owner for SAM3X Adding Code-Owner for Atmel SAM3X SOC (Cortex-M3). Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-03-04 23:05:05 +01:00
/soc/arm/atmel_sam/sam3x/ @ioannisg
CODEOWNERS: add owner for the same4 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-11-04 19:43:05 -03:00
/soc/arm/atmel_sam/sam4e/ @nandojve
soc: arm: atmel: Introduce sam4l SoC Introduce SAM4L SoC initial files. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-18 20:05:31 -03:00
/soc/arm/atmel_sam/sam4l/ @nandojve
CODEOWNERS: fix syntax for directories Add trailing "/" to signify directories. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 19:32:55 -05:00
/soc/arm/atmel_sam/sam4s/ @fallrisk
CODEOWNERS: Add SAM E70 code owner Add @nandojve, the SAM V71 platform maintainer, as a code owner for the SAM E70 platform, as these two platforms share the same base and are practically identical. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-24 16:40:45 +09:00
/soc/arm/atmel_sam/same70/ @nandojve
CODEOWNERS: add owner for the samv71 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-12-11 22:50:06 -03:00
/soc/arm/atmel_sam/samv71/ @nandojve
CODEOWNERS: Update codeowners for Infineon/Cypress sources - Add Ian Fyall (@ifyall) as codeowner for Infineon/Cypress sources. - Add Nazar Palamar (@npal-cy) as codeowner for Infineon/Cypress sources. - Remove Gerson Fernando Budke (@nandojve) from codeowner of Cypress sources. Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2022-03-25 11:54:07 +02:00
/soc/arm/cypress/ @ifyall @npal-cy
arm: Add Broadcom Valkyrie SoC support Add initial support for Broadcom Valkyrie SoC as part of Zephyr. Signed-off-by: Scott Branden <scott.branden@broadcom.com>
2020-01-08 13:18:10 -08:00
/soc/arm/bcm*/ @sbranden
CODEOWNERS: Add nandojve for gigadevices Add myself as codeowners for GigaDevice related files. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-09-19 14:29:24 -03:00
/soc/arm/gigadevice/ @nandojve
CODEOWNERS: Update codeowners for Infineon/Cypress sources - Add Ian Fyall (@ifyall) as codeowner for Infineon/Cypress sources. - Add Nazar Palamar (@npal-cy) as codeowner for Infineon/Cypress sources. - Remove Gerson Fernando Budke (@nandojve) from codeowner of Cypress sources. Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2022-03-25 11:54:07 +02:00
/soc/arm/infineon_cat1/ @ifyall @npal-cy
soc: arm: add infineon_xmc series support Add infineon xmc series with XMC4500 support. XMC series comes with, - CPU operates upto 120MHz - 3 RAM (PSRAM1 - code, DSRAM1 - data and DSRAM2 - communiation) - upto 1MB flash init: clock control & gpio is not done, so SoC initialization directly relies on HAL. Core operating clock is stored in no_init section, which is kept under DSRAM1. Only DSRAM1 is used until clock support. Using PSRAM1 and DSRAM1 needs adaptation in linker script - planned for next revision. Note: SystemInit cannot be consumed directly due to vector table + HAL linker dependency. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-04-21 11:37:42 +02:00
/soc/arm/infineon_xmc/ @parthitce
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 09:23:57 -05:00
/soc/arm/nxp*/ @mmahadevan108 @dleach02
codeowners: add owner for NXP S32 platforms Add ownership to NXP S32 platform related files. Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-08-07 05:00:25 +07:00
/soc/arm/nxp_s32/ @manuargue
MAINTAINERS: remove maintainer-ship status for ioannisg Removing maintainer and/or collaborator status on - nRF platforms - TF-M - userspace - cmsis-dsp - MAINTAINERS file for ioannisg. Replace with @anangl or others, where applicable. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-16 16:18:09 +01:00
/soc/arm/nordic_nrf/ @anangl
CODEOWNERS: remove the inactive code owner WealianLiao is unable to support Zephyr for npcx chip for the foreseeable future. Remove him from the CODEOWNERS file. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-08-26 11:36:43 +08:00
/soc/arm/nuvoton_npcx/ @MulinChao @ChiHuaL
soc: arm: rename soc/arm/nuvoton as soc/arm/nuvoton_numicro We try to reduce the ambiguity between 'soc/nuvoton/' and 'soc/nuvoton_npcx' folders. Most if soc vendors name their soc folder by the company name with SOC_FAMILY suffix instead of the company name directly. It is clearer if the soc company has different product lines that aim to specific markets. In this CL, the 'numicro' suffix is used for Nuvoton Microcontroller production line. It distinguishes the 'npcx' suffix that used for Nuvoton Embedded Controller (EC) of Notebook PC product line. Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-07-19 23:47:15 -07:00
/soc/arm/nuvoton_numicro/ @ssekar15
MAINTAINERS: update CODEOWNERS and MAINTAINERS.yml This commit updates the outdated entries of CODEWONERS and MAINAINERS.yml files. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-08-09 09:59:23 +02:00
/soc/arm/quicklogic_eos_s3/ @fkokosinski @kgugala
soc: Added support for Raspberry Pi's RP2040 SoC Added basic support for the RP2040 SoC. Support includes booting and starting the kernel, on one core only. Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com> Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-29 23:51:48 +02:00
/soc/arm/rpi_pico/ @yonsch
soc: silabs_exx32: Add support for SiLabs EFM32PG1B SoC This commit adds support for Silicon Labs EFM32PG1B (Pearl Gecko) SoC. Signed-off-by: Rafael Dias Menezes <rdmeneze@gmail.com>
2021-01-09 14:14:16 +01:00
/soc/arm/silabs_exx32/efm32pg1b/ @rdmeneze
soc: silabs_exx32: Add support for SiLabs EFR32MG21 SoC This commit adds support for Silicon Labs EFR32MG21 (Mighty Gecko) SoC. Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
2020-07-13 17:31:19 +02:00
/soc/arm/silabs_exx32/efr32mg21/ @l-alfred
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/soc/arm/st_stm32/ @erwango
CODEOWNERS: Add reviewers on stm32 components Based on recent contributions, add reviewers on some STM32 components. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-09-04 13:49:30 +02:00
/soc/arm/st_stm32/*/power.c @FRASTM
CODEOWNERS: update arnop2 ownership name Following update of the Github username,replace owner from arnop2 to arnopo. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-12-06 17:00:08 +01:00
/soc/arm/st_stm32/stm32mp1/ @arnopo
CODEOWNERS: Add codeowner for TI CC13x2 / CC26x2 files Add myself as codeowner for TI CC13x2 / CC26x2 related files. Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-03 11:47:13 -05:00
/soc/arm/ti_simplelink/cc13x2_cc26x2/ @bwitherspoon
CODEOWNERS: Update code ownership for TI SimpleLink code Updated for SimpleLink-related code in ext, board and soc. Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-02-26 14:34:29 -08:00
/soc/arm/ti_simplelink/cc32xx/ @vanti
CODEOWNERS: fix syntax for directories Add trailing "/" to signify directories. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 19:32:55 -05:00
/soc/arm/ti_simplelink/msp432p4xx/ @Mani-Sadhasivam
CODEOWNERS: owner for SoC Zynq-7000, board qemu_cortex_a9 Set code ownership for: - soc/arm/xilinx_zynq7000 - boards/arm/qemu_cortex_a9 Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-01-04 10:06:58 +01:00
/soc/arm/xilinx_zynq7000/ @ibirnbaum
CODEOWNERS: Add Xilinx ZynqMP platform codeowner Add @stephanosio as a code owner for the Xilinx ZynqMP platform, which is used as the primary testing platform for the Cortex-R architecture. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 17:35:44 +09:00
/soc/arm/xilinx_zynqmp/ @stephanosio
MAINTAINERS: add maintainers for Renesas R-Car platform Update codeowners. Add maintainers. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-12-02 10:21:44 +01:00
/soc/arm/renesas_rcar/ @aaillet @pmarzin
arm/arm64: Fix misc and trivials for ARM/ARM64 split Fix the header guards, comments, github labeler, CODEOWNERS and MAINTAINERS files. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-26 15:22:59 +01:00
/soc/arm64/ @carlocaione
/soc/arm64/qemu_cortex_a53/ @carlocaione
/soc/arm64/bcm_vk/ @abhishek-brcm
CODEOWNERS: add myself as Layerscape code-owner Add myself to be NXP Layserscape SoC and LS1046A board code-owner. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-04-07 12:09:14 +08:00
/soc/arm64/nxp_layerscape/ @JiafeiPan
xenvm: drivers: serial: Implement serial interface to Xen PV console This commit adds minimal support of Xen hypervisor console via UART-like driver. Implementation allows to use poll_in/poll_out char interface for uart_console.c driver directly to HV console instead of using Xen virtual PL011 UART. Future implementation will support interrupt driven interface on Xen event channels, currently it is under development. Also this commit introduces early console_io Xen interface, which allows to receive printk/stdout messages quickly after start, but requires Xen, built with CONFIG_DEBUG option. Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2021-07-02 11:31:56 +03:00
/soc/arm64/xenvm/ @lorc @firscity
CODEOWNERS: imx8m/p/n: update codeowner Add me to be codeowner of platform imx8mm/p/n ARM64 platforms. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2022-09-02 16:43:14 +08:00
/soc/arm64/nxp_imx/ @MrVan @JiafeiPan
soc: arm64: Add FVP AEMv8R AArch64 soc Add essential files to create a new soc. Introduce a new type of soc series named fvp_aemv8r. Add a new soc named fvp_aemv8r_aarch64. Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2020-11-23 15:57:21 +08:00
/soc/arm64/arm/ @povergoing
board: arm64: Add FVP Base RevC 2xAEMv8A board Add support for the FVP Base RevC 2xAEMv8A board to be emulated using the same FVP. For now the virtual platform is only exposing one core and the basic set of peripherals (GICv3, ARM arch timer, PL011, etc...). INFO - Total complete: 256/ 256 100% skipped: 933, failed: 0 Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-04-09 16:39:46 +02:00
/soc/arm64/arm/fvp_aemv8a/ @carlocaione
CODEOWNERS: Update the CODEOWNERS This is to update the CODEOWNERS file and to add owner for these two directories 1) /soc/arm64/intel_socfpga 2) /dts/arm64/intel/*intel_socfpga* Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
2022-06-22 15:43:23 +08:00
/soc/arm64/intel_socfpga/* @siclim
CODEOWNERS: Add soc/Kconfig and boards/Kconfig ownership Adds previously missed files. Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2023-04-12 12:31:18 +01:00
/soc/Kconfig @tejlmand @galak @nashif @nordicjm
MAINTAINERS: move to my ampere account I'm using a new account now. Do the corresponding CODEOWNERS change just for consistency as well. Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
2023-07-28 13:41:14 -07:00
/submanifests/* @mbolivar-ampere
CODEOWNERS: remove inactive owners Remove inactive owners. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-07-13 11:27:25 +00:00
/arch/x86/ @jhedberg @nashif
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 09:25:23 -05:00
/arch/nios2/ @nashif
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/arch/posix/ @aescolar @daor-oti
MAINTAINERS/CODEOWNERS: Remove nategraff-sifive Nate hasn't been active for some time and its my understanding that Nate is no longer at SiFive. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-26 11:35:27 -06:00
/arch/riscv/ @kgugala @pgielda
soc: mips: add Qemu Malta support The MIPS Malta is an ATX form factor evaluation board made by MIPS Technologies. Malta board is the most popular platform for MIPS full-system emulation. See https://www.linux-mips.org/wiki/MIPS_Malta for details. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Remy Luisant <remy@luisant.ca>
2020-12-03 01:33:36 +03:00
/soc/mips/ @frantony
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/soc/posix/ @aescolar @daor-oti
MAINTAINERS/CODEOWNERS: Remove nategraff-sifive Nate hasn't been active for some time and its my understanding that Nate is no longer at SiFive. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-26 11:35:27 -06:00
/soc/riscv/ @kgugala @pgielda
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 09:23:57 -05:00
/soc/riscv/openisa*/ @dleach02
riscv: Move directory to *-privileged Because the spec is "privileged" not "privilege". Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-06-09 10:40:43 +02:00
/soc/riscv/riscv-privileged/andes_v5/ @cwshu @kevinwang821020 @jimmyzhe
/soc/riscv/riscv-privileged/neorv32/ @henrikbrixandersen
/soc/riscv/riscv-privileged/gd32vf103/ @soburi
/soc/riscv/riscv-privileged/niosv/ @sweeaun
CODEOWNERS: remove inactive owners Remove inactive owners. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-07-13 11:27:25 +00:00
/soc/x86/ @dcpleung @nashif
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/arch/xtensa/ @dcpleung @andyross @nashif
/soc/xtensa/ @dcpleung @andyross @nashif
MAINTAINERS: Add new collaborator and code owner for SPARC and LEON Add @julius-barendt as collaborator and code owner for areas related to SPARC and LEON. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2022-06-22 10:50:58 +02:00
/arch/sparc/ @julius-barendt
/soc/sparc/ @julius-barendt
CODEOWNERS: Add evgeniy-paltsev as an ARC part owner Add @evgeniy-paltsev as an ARC part owner in addition to @abrodkin and @ruuddw, so he will be chosen as a reviewer automatically. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-22 19:46:53 +03:00
/boards/arc/ @abrodkin @ruuddw @evgeniy-paltsev
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/boards/arm/ @MaureenHelm @galak
/boards/arm/96b_argonkey/ @avisconti
boards: arm: Add 96Boards Avenger96 board support Add board support for 96Boards Avenger96 board from Arrow Electronics based on STM32MP157A MPU from ST Microelectronics. This board is one of the consumer editions boards of the 96Boards family following the Extented CE form factor. More information about this board can be found in 96Boards website: https://www.96boards.org/product/avenger96/ By default Zephyr console output is available via RAM console, but it can also be changed to UART7 exposed as UART0 on 40 pin LS header. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-06-12 23:09:13 +05:30
/boards/arm/96b_avenger96/ @Mani-Sadhasivam
CODEOWNERS: remove rsalveti This GitHub account has been disabled for over a year (it was replaced by a `ricardosalveti` account). Remove from CODEOWNERS. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-04-15 10:16:19 -07:00
/boards/arm/96b_carbon/ @idlethread
boards: arm: Add support for 96Boards Meerkat96 board Add board suppor for 96Boards Meerkat96 board from Novtech based on NXP i.MX7 multi core processor. Zephyr is ported to run on the single core Cortex-M co-processor on this board. More information about this board can be found in 96Boards website: https://www.96boards.org/product/imx7-96/ By default Zephyr console output is available via UART1 available at the 40pin LS connector. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-06-13 22:55:31 +05:30
/boards/arm/96b_meerkat96/ @Mani-Sadhasivam
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/boards/arm/96b_nitrogen/ @idlethread
/boards/arm/96b_neonkey/ @Mani-Sadhasivam
/boards/arm/96b_stm32_sensor_mez/ @Mani-Sadhasivam
CODEOWNERS: Add codeowner for 96b_wistrio Add myself as the codeowner for 96Boards Wistrio. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 17:26:50 +05:30
/boards/arm/96b_wistrio/ @Mani-Sadhasivam
CODEOWNERS: add code-owner for Arduino Due Assigning code-owner for Arduino Due board. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-03-14 16:10:04 +01:00
/boards/arm/arduino_due/ @ioannisg
boards: acn52832: Add support for acn52832 The aconno acn52832 is a small module featuring the nRF52832 SOC. Signed-off-by: Sven Herrmann <sven.herrmann@posteo.de>
2023-02-05 12:25:57 +01:00
/boards/arm/acn52832/ @sven-hm
CODEOWNERS: add codeowner of arduino_mkrzero Add myself as codeowner of previously committed boards. - #45076 Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-02-15 10:45:19 +09:00
/boards/arm/arduino_mkrzero/ @soburi
CODEOWNERS: Add LingaoM for bbc_microbit_v2 board Add myself as codeowner for the bbc_microbit_v2 driver Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2021-12-15 13:25:48 +08:00
/boards/arm/bbc_microbit_v2/ @LingaoM
CODEOWNERS: Add codeowner for Laird Connectivity BL* modules Add myself as codeowner for BL* modules Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
2022-03-14 08:56:59 +00:00
/boards/arm/bl5340_dvk/ @lairdjm
/boards/arm/bl65*/ @lairdjm
codeowners: add code owner for blackpill_f401ce, blackpill_f411ce Add @coderkalyan (Kalyan Sriram <coder.kalyan@gmail.com>) as code owner for blackpill_f401ce, blackpill_f411ce boards. Signed-off-by: Kalyan Sriram <kalyan@coderkalyan.com>
2021-04-29 09:20:44 -07:00
/boards/arm/blackpill_f401ce/ @coderkalyan
/boards/arm/blackpill_f411ce/ @coderkalyan
CODEOWNERS: Add Laird Connectivity BT510 and BT610 codeowner Assign @greg-leach as owner of BT510 and BT610 boards Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
2022-03-14 08:58:58 +00:00
/boards/arm/bt*10/ @greg-leach
CODEOWNERS: Add codeowner for TI CC13x2 / CC26x2 files Add myself as codeowner for TI CC13x2 / CC26x2 related files. Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-03 11:47:13 -05:00
/boards/arm/cc1352r1_launchxl/ @bwitherspoon
/boards/arm/cc26x2r1_launchxl/ @bwitherspoon
CODEOWNERS: Update code ownership for TI SimpleLink code Updated for SimpleLink-related code in ext, board and soc. Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-02-26 14:34:29 -08:00
/boards/arm/cc3220sf_launchxl/ @vanti
CODEOWNERS: Update codeowners for Infineon/Cypress sources - Add Ian Fyall (@ifyall) as codeowner for Infineon/Cypress sources. - Add Nazar Palamar (@npal-cy) as codeowner for Infineon/Cypress sources. - Remove Gerson Fernando Budke (@nandojve) from codeowner of Cypress sources. Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2022-03-25 11:54:07 +02:00
/boards/arm/cy8ckit_062_ble/ @ifyall @npal-cy
board: add cy8ckit 062 pioneer Tested with hello_world and blinky projects Signed-off-by: David Ullmann <davidl.ullmann@gmail.com>
2023-07-15 19:21:35 -04:00
/boards/arm/cy8ckit_062s4/ @DaWei8823
CODEOWNERS: Update codeowners for Infineon/Cypress sources - Add Ian Fyall (@ifyall) as codeowner for Infineon/Cypress sources. - Add Nazar Palamar (@npal-cy) as codeowner for Infineon/Cypress sources. - Remove Gerson Fernando Budke (@nandojve) from codeowner of Cypress sources. Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2022-03-25 11:54:07 +02:00
/boards/arm/cy8ckit_062_wifi_bt/ @ifyall @npal-cy
/boards/arm/cy8cproto_062_4343w/ @ifyall @npal-cy
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/boards/arm/disco_l475_iot1/ @erwango
soc: silabs_exx32: Add support for SiLabs EFM32PG1B SoC This commit adds support for Silicon Labs EFM32PG1B (Pearl Gecko) SoC. Signed-off-by: Rafael Dias Menezes <rdmeneze@gmail.com>
2021-01-09 14:14:16 +01:00
/boards/arm/efm32pg_stk3401a/ @rdmeneze
boards: arm: add FaZe board support The FaZe board can be found in the Seagate FireCuda Gaming SSD devices. A NVMe SSD and two chips are embedded: an ASMedia ASM2364 USB-to-PCIe bridge controller and a NXP LPC11U67 MCU. The former is handling the USB type-C to SSD I/Os while the latter is dedicated to the LED effects. The two chips are connected together through I2C and GPIOs. This Zephyr port is running on the LPC11U67 MCU. Here is a list of the devices connected to the LPC11U67 on a FaZe board: - ASMedia ASM2364 USB-to-PCIe bridge (I2C master on port O) - 6 RGB LEDs connected connected to a TI LP5030 LED controller (I2C device on port 1) - 1 white LED (SSD activity blinking) Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com> Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-05-14 16:43:18 +02:00
/boards/arm/faze/ @mbittan @simonguinot
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 09:23:57 -05:00
/boards/arm/frdm*/ @mmahadevan108 @dleach02
/boards/arm/frdm*/doc/ @dleach02 @MeganHansen
CODEOWNERS: Add nandojve for gigadevices Add myself as codeowners for GigaDevice related files. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-09-19 14:29:24 -03:00
/boards/arm/gd32*/ @nandojve
board: arm: Add google_kukui board This adds support for the EC (embedded controller) on a Google reference board with codename "kukui". This board uses the STM32F098RC chip. We built an application for the board and verified UART functionality on the board. Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-25 16:16:32 -06:00
/boards/arm/google_*/ @jackrosenthal
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 09:23:57 -05:00
/boards/arm/hexiwear*/ @mmahadevan108 @dleach02
/boards/arm/hexiwear*/doc/ @dleach02 @MeganHansen
arm: Add code owner for the Segger's ip_k66f board I would like to add myself as a co-maintainer for the ip_k66f board. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2021-03-31 13:35:55 +02:00
/boards/arm/ip_k66f/ @parthitce @lmajewski
boards: arm: Add Legend 2.5" boards This commit adds support for the Legend 2.5" boards (legend25_ssd and legend25_hdd) based on the STM32F070CB MCU. These boards can be found in the Seagate FireCuda Gaming Drive, Gaming Drive for Xbox, SSD Gaming Drive for Xbox, and Gaming Drive for PlayStation devices. Both boards contain the following hardware components: - A B1414 LED strip connected to the PA7 pin (SPI MOSI) - A SPI flash (FM25F005) connected on SPI2 bus The Legend 2.5" HDD board also contains an activity LED connected on TIM3 CH3 Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com> Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-10-22 18:43:41 +02:00
/boards/arm/legend/ @mbittan @simonguinot
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 09:23:57 -05:00
/boards/arm/lpcxpresso*/ @mmahadevan108 @dleach02
/boards/arm/lpcxpresso*/doc/ @dleach02 @MeganHansen
CODEOWNERS: add MG100 board owner Add myself. Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2022-09-06 22:11:41 -05:00
/boards/arm/mg100/ @rerickson1
CODEOWNERS: Add myself as the codeowner for imx8m evk and uart driver Add myself as the codeowner for imx8m evk and uart driver. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-11-23 19:03:16 +05:30
/boards/arm/mimx8mm_evk/ @Mani-Sadhasivam
boards: arm: add PhyBOARD Polis (i.MX8MM) Add board definitions to run Zephyr on the M4-Core of the i.MX8M Mini SoC on the PhyBOARD Polis. Signed-off-by: Peter Fecher <p.fecher@phytec.de>
2022-08-17 10:08:42 +02:00
/boards/arm/mimx8mm_phyboard_polis @pefech
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 09:23:57 -05:00
/boards/arm/mimxrt*/ @mmahadevan108 @dleach02
/boards/arm/mimxrt*/doc/ @dleach02 @MeganHansen
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/boards/arm/mps2_an385/ @fvincenzo
/boards/arm/msp_exp432p401r_launchxl/ @Mani-Sadhasivam
CODEOWNERS: remove the inactive code owner WealianLiao is unable to support Zephyr for npcx chip for the foreseeable future. Remove him from the CODEOWNERS file. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-08-26 11:36:43 +08:00
/boards/arm/npcx7m6fb_evb/ @MulinChao @ChiHuaL
MAINTAINERS: remove maintainer-ship status for ioannisg Removing maintainer and/or collaborator status on - nRF platforms - TF-M - userspace - cmsis-dsp - MAINTAINERS file for ioannisg. Replace with @anangl or others, where applicable. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-16 16:18:09 +01:00
/boards/arm/nrf*/ @carlescufi @lemrey
CODEOWNERS: remove commas in reviewers' listing Reviewers shall not be separated by commas. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-08 15:23:29 +02:00
/boards/arm/nucleo*/ @erwango @ABOSTM @FRASTM
CODEOWNERS: remove rsalveti This GitHub account has been disabled for over a year (it was replaced by a `ricardosalveti` account). Remove from CODEOWNERS. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-04-15 10:16:19 -07:00
/boards/arm/nucleo_f401re/ @idlethread
board: arm: add support for nuvoton pfm m487 add support for nuvoton pfm m487 development board Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2020-04-24 16:22:12 +02:00
/boards/arm/nuvoton_pfm_m487/ @ssekar15
CODEOWNERS: Add Laird Connectivity Pinnacle 100 codeowner Assign @rerikson1 as codeowner of Pinnacle 100 board Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
2022-03-14 08:58:07 +00:00
/boards/arm/pinnacle_100_dvk/ @rerickson1
CODEOWNERS: owner for SoC Zynq-7000, board qemu_cortex_a9 Set code ownership for: - soc/arm/xilinx_zynq7000 - boards/arm/qemu_cortex_a9 Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-01-04 10:06:58 +01:00
/boards/arm/qemu_cortex_a9/ @ibirnbaum
CODEOWNERS: Add Xilinx ZynqMP platform codeowner Add @stephanosio as a code owner for the Xilinx ZynqMP platform, which is used as the primary testing platform for the Cortex-R architecture. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 17:35:44 +09:00
/boards/arm/qemu_cortex_r*/ @stephanosio
MAINTAINERS: remove maintainer-ship status for ioannisg Removing maintainer and/or collaborator status on - nRF platforms - TF-M - userspace - cmsis-dsp - MAINTAINERS file for ioannisg. Replace with @anangl or others, where applicable. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-16 16:18:09 +01:00
/boards/arm/qemu_cortex_m*/ @ioannisg @stephanosio
MAINTAINERS: update CODEOWNERS and MAINTAINERS.yml This commit updates the outdated entries of CODEWONERS and MAINAINERS.yml files. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-08-09 09:59:23 +02:00
/boards/arm/quick_feather/ @fkokosinski @kgugala
boards: arm: Add RAK4631 Wisblock Core LPWAN board Add rak4631 board from RAKWireless based on nrf52840 and SX1262. Board Documentation is completed Signed-off-by: Guillaume Paquet <guillaume.paquet@smile.fr>
2021-04-05 20:11:45 +02:00
/boards/arm/rak4631_nrf52840/ @gpaquet85
boards: arm: nordic: rakwireless Introduce rak5010_nrf52840 board Add rak5010 board from RAKWireless based on nrf52840. Board Documentation is completed Signed-off-by: Guillaume Paquet <guillaume.paquet@smile.fr>
2020-09-08 16:20:17 +02:00
/boards/arm/rak5010_nrf52840/ @gpaquet85
boards: Added support for the Raspberry Pi Pico board Added support for Raspberry Pi's Pico board, using the RP2040 SoC. Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2021-11-30 00:05:15 +02:00
/boards/arm/rpi_pico/ @yonsch
board: arm: ronoth_lodev: add Ronoth LoDev board support The Ronoth LoDev in an open source board which uses the AcSIP S76S. Signed-off-by: Dean Weiten <dmw@weiten.com>
2021-03-03 08:15:34 -06:00
/boards/arm/ronoth_lodev/ @NorthernDean
board: arm: add support for infineon relax kit Add support for relax kit with infineon xmc4500 SoC. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-04-21 12:30:02 +02:00
/boards/arm/xmc45_relax_kit/ @parthitce
CODEOWNERS: add owner for the same4 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-11-04 19:43:05 -03:00
/boards/arm/sam4e_xpro/ @nandojve
boards: arm: atmel: Introduce sam4l_ek board Add initial version. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-18 20:40:21 -03:00
/boards/arm/sam4l_ek/ @nandojve
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/boards/arm/sam4s_xplained/ @fallrisk
CODEOWNERS: Add SAM E70 code owner Add @nandojve, the SAM V71 platform maintainer, as a code owner for the SAM E70 platform, as these two platforms share the same base and are practically identical. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-24 16:40:45 +09:00
/boards/arm/sam_e70_xplained/ @nandojve
CODEOWNERS: add owner for the samv71 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-12-11 22:50:06 -03:00
/boards/arm/sam_v71_xult/ @nandojve
boards: Add Space Cubics OBC Module 1 This is a single board computer for spacecraft OBC (On-board Computer). It has a Xilinx FPGA with Cortex ARM M3 core with peripherals, UART, CAN and others. Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2021-11-16 16:22:43 +09:00
/boards/arm/scobc_module1/ @yashi
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/boards/arm/v2m_beetle/ @fvincenzo
/boards/arm/olimexino_stm32/ @ydamigos
codeowners: add owner for NXP S32 platforms Add ownership to NXP S32 platform related files. Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-08-07 05:00:25 +07:00
/boards/arm/s32*/ @manuargue
boards: arm: Add support for SensorTile.box board The SensorTile.box is a board designed for IoT applications embedding a wide range of intelligent low power MEMS sensors, a STM32L4 microcontroller to manage sensor configuration and process sensor output data, a micro-USB battery charging interface and an ST Bluetooth Low Energy module for wireless communication with a BLE-enabled smartphone. Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-08-05 12:57:25 +02:00
/boards/arm/sensortile_box/ @avisconti
boards: arm: Add steval_fcu001v1 board support BSP for steval_fcu001v1 resubmitted as per PR #18746 Signed-off-by: NavinSankar Velliangiri <navin@linumiz.com>
2019-10-06 13:31:17 +05:30
/boards/arm/steval_fcu001v1/ @Navin-Sankar
boards: add stm32l1 discovery Tested apps: hello_world, blinky Tested peripherals: UART, SPI Signed-off-by: Karl Palsson <karlp@etactica.com>
2019-10-01 23:12:31 +00:00
/boards/arm/stm32l1_disco/ @karlp
CODEOWNERS: remove commas in reviewers' listing Reviewers shall not be separated by commas. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-08 15:23:29 +02:00
/boards/arm/stm32*_disco/ @erwango @ABOSTM @FRASTM
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/boards/arm/stm32f3_disco/ @ydamigos
CODEOWNERS: remove commas in reviewers' listing Reviewers shall not be separated by commas. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-08 15:23:29 +02:00
/boards/arm/stm32*_eval/ @erwango @ABOSTM @FRASTM
MAINTAINERS: add maintainers for Renesas R-Car platform Update codeowners. Add maintainers. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-12-02 10:21:44 +01:00
/boards/arm/rcar_h3ulcb/ @aaillet @pmarzin
boards: arm: Modify BMD-345-EVAL support Modify support for u-blox BMD-345-EVAL which uses the nRF52840 and a Skyworks RFX2411 FEM. These edits follow the naming cnoventions that is used with the other u-blox EVKs recently added, or in progress This board is similar to the nRF52840dk_nrf52840 with the addition of a FEM. Four Arduino GPIO pins have been reassigned to the PA_LNA control pins. u-blox would prefer to use this naming convention to match other BMD-3xx-EVAL and EVK-NINA-Bx boards recently submitted. Tested with blinky, button, and Bluetooth peripheral_hr Checking dts files Updated CODEOWNERS to rename bmd_345_eval to ubx_bmd345eval_nrf52840 Added CMakeLists.txt, updated board.c Signed-off-by: Bob Recny <bob.recny@u-blox.com>
2021-04-21 23:41:10 +00:00
/boards/arm/ubx_bmd345eval_nrf52840/ @Navin-Sankar @brec-u-blox
CODEOWNERS: boards/arm/nrf5340_audio_dk_nrf5340 Relevant users added as codeowners Signed-off-by: Kristoffer Rist Skøien <kristoffer.skoien@nordicsemi.no>
2023-01-16 10:36:02 +01:00
/boards/arm/nrf5340_audio_dk_nrf5340 @koffes @alexsven @erikrobstad @rick1082 @gWacey
MAINTAINERS: move to my ampere account I'm using a new account now. Do the corresponding CODEOWNERS change just for consistency as well. Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
2023-07-28 13:41:14 -07:00
/boards/common/ @mbolivar-ampere
cmake: deprecation of board names This commit introduces boards/deprecated.cmake to allow deprecation of existing boards, when a board is renamed. This allows users to still specify the old board name, and let Zephyr build system to select the new board name. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-03-16 15:36:52 +01:00
/boards/deprecated.cmake @tejlmand
boards: mips: add Qemu Malta support The MIPS Malta is an ATX form factor evaluation board made by MIPS Technologies. Malta board is the most popular platform for MIPS full-system emulation. See https://www.linux-mips.org/wiki/MIPS_Malta for details. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2020-12-01 11:24:45 +03:00
/boards/mips/ @frantony
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 09:25:23 -05:00
/boards/nios2/ @nashif
/boards/nios2/altera_max10/ @nashif
CODEOWNERS, MAINTAINERS.yml: Update github username GitHub username @cbsiddharth was changed to @sidcha. Update CODEOWNERS and MAINTAINERS.yml entries. Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2021-05-08 23:57:34 +02:00
/boards/arm/stm32_min_dev/ @sidcha
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/boards/posix/ @aescolar @daor-oti
/boards/posix/nrf52_bsim/ @aescolar @wopu-ot
MAINTAINERS/CODEOWNERS: Remove nategraff-sifive Nate hasn't been active for some time and its my understanding that Nate is no longer at SiFive. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-26 11:35:27 -06:00
/boards/riscv/ @kgugala @pgielda
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 09:23:57 -05:00
/boards/riscv/rv32m1_vega/ @dleach02
codeowners: update codeowners of andes_v5 SoC series Add Andes developers, kevinwang821020 and jimmyzhe as reviewers for andes_v5 soc, board, dts, and drivers. Remove Teng-Shih-Wei from reviewers because he doesn't maintain Zephyr RTOS currently. Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-11-12 09:55:05 +08:00
/boards/riscv/adp_xc7k_ae350/ @cwshu @kevinwang821020 @jimmyzhe
boards: riscv: Add SiPeed Longan Nano platform SiPeed Longan Nano is a minimal development board based on GigaDevice's RISC-V processor. There are 2 board variations. longan_nano: GDGD32VF103CBT6 (128K Flash/32K SRAM) longan_nano_lite: GDGD32VF103C8T6 ( 64K Flash/20K SRAM) Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-10-18 07:44:47 -07:00
/boards/riscv/longan_nano/ @soburi
CODEOWNERS: take ownership of neorv32 specific files Take ownership of all the neorv32 specific files (dts bindings, soc implementation, drivers, and board definition). Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-08-26 19:57:56 +02:00
/boards/riscv/neorv32/ @henrikbrixandersen
codeowners: Add code owner for INTEL FPGA Nios V/g Add code owner for INTEL FPGA Nios V/g dts, SoC and board. Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
2023-06-08 10:39:21 +08:00
/boards/riscv/niosv*/ @sweeaun
CODEOWNERS: add codeowner of sparkfun_red_v_thingsplus Add myself as codeowner of previously committed boards. - #53166 Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-02-15 10:47:13 +09:00
/boards/riscv/sparkfun_red_v_things_plus/ @soburi
CODEOWNERS: Add codeowner to boards/shields Following new shield introduction in #14057, it has been highlighted there was no codeowner for boards/shields/. Assign erwango as codeowner. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-11 09:31:53 +01:00
/boards/shields/ @erwango
boards: shields: Introduce atmel_rf2xx module shield The Atmel RF2xx module shield is a generic solution to enable any Atmel AT86RF2xx IEEE 802.15.4 transceiver. This module enables IEEE 802.15.4 RF2xx Zephyr driver. The Atmel RF2xx module shield enables any board with an Atmel Xplained, Xplained-Pro, Arduino or MikroBus expansion header to connect to networks operation with IEEE 802.15.4, OpenThread or any other stack based on this media type. The Atmel RF2xx module is configured to allow interoperate with other medias like Ethernet. User need configure network stack properlly. Fixes #26259. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-07-05 00:52:14 -03:00
/boards/shields/atmel_rf2xx/ @nandojve
CODEOWNERS: Add boards/shields/esp_8266 owner The esp_8266 shield was added without owner on #24710. Add myself as an owner of esp_8266 shield files. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-07-11 14:50:40 -03:00
/boards/shields/esp_8266/ @nandojve
boards: shields: Introduce inventek es-WIFI shield Add Inventek es-WIFI modules shield. This shield exposes es-WIFI driver using Arduino Uno R3 header by UART or SPI interfaces. It shows how user can create their own overlay and expose es-WIFI driver. The current Inventek's EVB doesn't have all pins necessary to control the module by Arduino hearder. This shows how to wire to get ISM43xx EVB working. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-10-23 09:41:41 -03:00
/boards/shields/inventek_eswifi/ @nandojve
CODEOWNERS: remove inactive owners Remove inactive owners. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-07-13 11:27:25 +00:00
/boards/x86/ @dcpleung @nashif
CODEOWNERS: add owners for acrn development Adding myself @enjiamai as codeowners for /board/x86/acrn for development. Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
2021-07-29 16:53:18 +08:00
/boards/x86/acrn/ @enjiamai
CODEOWNERS: update owners and added xcc/s1000 related lines Updated for board and toolchain and a few minor fixes. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-24 13:04:38 -05:00
/boards/xtensa/ @nashif @dcpleung
boards/xtensa: Add support for ODROID-GO Game Kit Add support for ODROID-GO Game Kit Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-16 13:19:28 +03:00
/boards/xtensa/odroid_go/ @ydamigos
CODEOWNERS: add codeowner for SOF with Zephyr on NXP i.MX8 Add myself and Daniel Baluta as codeowners for i.MX8 related files for SOF with Zephyr OS. Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-07-05 19:11:35 +03:00
/boards/xtensa/nxp_adsp_imx8/ @iuliana-prodan @dbaluta
MAINTAINERS: Add new collaborator and code owner for SPARC and LEON Add @julius-barendt as collaborator and code owner for areas related to SPARC and LEON. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2022-06-22 10:50:58 +02:00
/boards/sparc/ @julius-barendt
arm/arm64: Fix misc and trivials for ARM/ARM64 split Fix the header guards, comments, github labeler, CODEOWNERS and MAINTAINERS files. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-26 15:22:59 +01:00
/boards/arm64/qemu_cortex_a53/ @carlocaione
/boards/arm64/bcm958402m2_a72/ @abhishek-brcm
CODEOWNERS: imx8m/p/n: update codeowner Add me to be codeowner of platform imx8mm/p/n ARM64 platforms. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2022-09-02 16:43:14 +08:00
/boards/arm64/mimx8mm_evk/ @MrVan @JiafeiPan
/boards/arm64/mimx8mp_evk/ @MrVan @JiafeiPan
/boards/arm64/mimx8mn_evk/ @JiafeiPan
codeowners: add entry for arm64 board mimx93_evk Add myself to be owner for board mimx93_evk_a55. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2022-12-08 10:40:27 +08:00
/boards/arm64/mimx93_evk/ @JiafeiPan
CODEOWNERS: add myself as Layerscape code-owner Add myself to be NXP Layserscape SoC and LS1046A board code-owner. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-04-07 12:09:14 +08:00
/boards/arm64/nxp_ls1046ardb/ @JiafeiPan
xenvm: drivers: serial: Implement serial interface to Xen PV console This commit adds minimal support of Xen hypervisor console via UART-like driver. Implementation allows to use poll_in/poll_out char interface for uart_console.c driver directly to HV console instead of using Xen virtual PL011 UART. Future implementation will support interrupt driven interface on Xen event channels, currently it is under development. Also this commit introduces early console_io Xen interface, which allows to receive printk/stdout messages quickly after start, but requires Xen, built with CONFIG_DEBUG option. Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2021-07-02 11:31:56 +03:00
/boards/arm64/xenvm/ @lorc @firscity
board: arm64: Add FVP BaseR AEMv8R board Add essential files to create a new board. Enable arch timer, uart, multi-threading. Set memory map for flash and sram. The new board name is fvp_baser_aemv8r with the fvp_aemv8r_aarch64 soc. Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2020-11-24 14:14:08 +08:00
/boards/arm64/fvp_baser_aemv8r/ @povergoing
board: arm64: Add FVP Base RevC 2xAEMv8A board Add support for the FVP Base RevC 2xAEMv8A board to be emulated using the same FVP. For now the virtual platform is only exposing one core and the basic set of peripherals (GICv3, ARM arch timer, PL011, etc...). INFO - Total complete: 256/ 256 100% skipped: 933, failed: 0 Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-04-09 16:39:46 +02:00
/boards/arm64/fvp_base_revc_2xaemv8a/ @carlocaione
codeowners: Add code owners for Intel SoC FPGA Agilex Add code owners for Intel SoC FPGA Agilex board and clock drivers. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-04-21 17:41:05 +08:00
/boards/arm64/intel_socfpga_agilex_socdk/ @siclim @ngboonkhai
CODEOWNERS: Add code owners for Intel Agilex5 platform drivers Code owners for all the required Intel Agilex5 platform drivers. Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-06 15:07:44 +00:00
/boards/arm64/intel_socfpga_agilex5_socdk/ @chongteikheng
CODEOWNERS: Add soc/Kconfig and boards/Kconfig ownership Adds previously missed files. Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2023-04-12 12:31:18 +01:00
/boards/Kconfig @tejlmand @galak @nashif @nordicjm
CODEOWNERS: add cmake owners Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-31 08:31:34 -04:00
# All cmake related files
CODEOWNERS: Re-assign reviews from SebastianBoe to tejlmand Transfer review assignments from SebastianBoe to tejlmand. Sebastian Bøe's role is being transferred to Torsten Rasmussen (tejlmand). Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2020-03-26 04:12:59 -07:00
/cmake/ @tejlmand @nashif
CODEOWNERS: Add reviewers on Synopsys metaware toolchain Adding Synopsys developers as reviewers on arcmwdt components. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-09-14 09:59:59 +02:00
/cmake/*/arcmwdt/ @abrodkin @evgeniy-paltsev @tejlmand
CODEOWNERS: Re-assign reviews from SebastianBoe to tejlmand Transfer review assignments from SebastianBoe to tejlmand. Sebastian Bøe's role is being transferred to Torsten Rasmussen (tejlmand). Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2020-03-26 04:12:59 -07:00
/CMakeLists.txt @tejlmand @nashif
CODEOWNERS: Add myself as doc/ codeowner This entry was stale, update it with me so I am assigned to reviews. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-04-08 12:50:17 +02:00
/doc/ @carlescufi
MAINTAINERS: update doc section locations Update file with changed locations. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-04-04 11:48:04 -04:00
/doc/develop/tools/coccinelle.rst @himanshujha199640 @JuliaLawall
CODEOWNERS: Remove Andrzej Puzdrowski from most maintainerships Andrzej is no longer involved directly in Zephyr, but remains connected to the MCUboot project. Replace his maintainership with either other people from Nordic or leave the subsystem "orphaned" (i.e. labeled as odd fixes). Also add @nordicjm to the SMP/MCUmgr maintainership, as he is already an SMP/MCUmgr collaborator. Finally, removed @aunsbjerg from mcumgr path maintainership, since he's already assigned to the UDP platform implementation, which is what he is an owner of. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-10-18 11:56:28 +02:00
/doc/services/device_mgmt/smp_protocol.rst @de-nordic @nordicjm
/doc/services/device_mgmt/smp_groups/ @de-nordic @nordicjm
CODEOWNERS: Add code owners for Sensing Subsystem Add lixuzha, ghu0510, qianruh for the Sensor Subsystem. Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
2023-04-11 13:04:49 +08:00
/doc/services/sensing/ @lixuzha @ghu0510 @qianruh
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/doc/CMakeLists.txt @carlescufi
doc: move scripts to _scripts Move Sphinx related content to folders with underscore prefix. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-03-29 20:50:01 +02:00
/doc/_scripts/ @carlescufi
MAINTAINERS: update doc section locations Update file with changed locations. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-04-04 11:48:04 -04:00
/doc/connectivity/bluetooth/ @alwa-nordic @jhedberg @Vudentz
MAINTAINERS: move to my ampere account I'm using a new account now. Do the corresponding CODEOWNERS change just for consistency as well. Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
2023-07-28 13:41:14 -07:00
/doc/build/dts/ @galak @mbolivar-ampere
CODEOWNERS: Add self to sysbuild Add myself to sysbuild entry and adds additional folders. Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2023-03-08 09:52:28 +00:00
/doc/build/sysbuild/ @tejlmand @nordicjm
CODEOWNERS: Fix issues reported by check_compliance.py Fix issues with paths, files removed, etc in CODEOWNERS reported by check_compliance.py Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-13 16:56:10 -05:00
/doc/hardware/peripherals/canbus/ @alexanderwachter @henrikbrixandersen
codeowners: Add owners to security documentation Add myself and David Brown as owners for security documentation. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-18 15:27:16 -07:00
/doc/security/ @ceolin @d3zd3z
CODEOWNERS: adapt for debug and tracing add subsys/tracing and include/tracing and drivers/debug Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-02-06 21:00:50 -05:00
/drivers/debug/ @nashif
drivers: i2c: Introduce SAM4L i2c TWIM driver The SAM4L have a unique I2C driver. It shares simultaneously pins for both master and slave controllers. Each controller have their own instance. This introduces the TWIM controller that handles only the master part. The TWIM controller uses no copy and the driver was prepared to work with both 7 and 10 bits address. The controller can handler up to 256 bytes for a single transfer allowing long data communication with almost no CPU intervention. The driver was wrote specifically to Zephyr. It receives a transfer list of from upper layers to a specific device on the bus. It programs the first and second transfer, if it exists, before start. At end of full read/write interrupt, will program the next data block. This process repeats until all transfers be executed. The driver uses interrupt from TWIM to check for erros or program next tranfer. Future work can enable low power mode on the driver allowing long transfers with low power consumption. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-05-10 12:25:38 -03:00
/drivers/*/*sam4l* @nandojve
CODEOWNERS: Add codeowner for TI CC13x2 / CC26x2 files Add myself as codeowner for TI CC13x2 / CC26x2 related files. Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-03 11:47:13 -05:00
/drivers/*/*cc13xx_cc26xx* @bwitherspoon
CODEOWNERS: Add nandojve for gigadevices Add myself as codeowners for GigaDevice related files. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-09-19 14:29:24 -03:00
/drivers/*/*gd32* @nandojve
CODEOWNERS: simplify LiteX-related entries This adds a generic entry for all LiteX-related drivers. Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-05-27 10:30:04 +02:00
/drivers/*/*litex* @mateusz-holenko @kgugala @pgielda
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 09:23:57 -05:00
/drivers/*/*mcux* @mmahadevan108 @dleach02
CODEOWNERS: remove commas in reviewers' listing Reviewers shall not be separated by commas. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-08 15:23:29 +02:00
/drivers/*/*stm32* @erwango @ABOSTM @FRASTM
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/drivers/*/*native_posix* @aescolar @daor-oti
CODEOWNERS: remove commas in reviewers' listing Reviewers shall not be separated by commas. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-08 15:23:29 +02:00
/drivers/*/*lpc11u6x* @mbittan @simonguinot
CODEOWNERS: remove the inactive code owner WealianLiao is unable to support Zephyr for npcx chip for the foreseeable future. Remove him from the CODEOWNERS file. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-08-26 11:36:43 +08:00
/drivers/*/*npcx* @MulinChao @ChiHuaL
codeowners: update codeowners of andes_v5 SoC series Add Andes developers, kevinwang821020 and jimmyzhe as reviewers for andes_v5 soc, board, dts, and drivers. Remove Teng-Shih-Wei from reviewers because he doesn't maintain Zephyr RTOS currently. Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-11-12 09:55:05 +08:00
/drivers/*/*andes* @cwshu @kevinwang821020 @jimmyzhe
CODEOWNERS: Update codeowners for Infineon/Cypress sources - Add Ian Fyall (@ifyall) as codeowner for Infineon/Cypress sources. - Add Nazar Palamar (@npal-cy) as codeowner for Infineon/Cypress sources. - Remove Gerson Fernando Budke (@nandojve) from codeowner of Cypress sources. Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2022-03-25 11:54:07 +02:00
/drivers/*/*ifx_cat1* @ifyall @npal-cy
CODEOWNERS: take ownership of neorv32 specific files Take ownership of all the neorv32 specific files (dts bindings, soc implementation, drivers, and board definition). Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-08-26 19:57:56 +02:00
/drivers/*/*neorv32* @henrikbrixandersen
codeowners: add owner for NXP S32 platforms Add ownership to NXP S32 platform related files. Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-08-07 05:00:25 +07:00
/drivers/*/*_s32* @manuargue
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/drivers/adc/ @anangl
adc: ads1x1x: add CODEOWNER add myself as a CODEOWNER for adc_adx1x1x.c Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
2022-06-08 10:31:50 -07:00
/drivers/adc/adc_ads1x1x.c @XenuIsWatching
drivers: adc: add driver support for ADC1 of stm32 This commit adds driver support for ADC1 on all 8 supported series of stm32 with resolution and conversion time selection and calibration. Currently DMA is not supported for all series, and without it, zephyr won't be able to catch up ADC's end of conversion interrupt, so this version of the driver supports one channel conversion only. Users want multi-channel conversion should use multiple sequences in their app code. This driver uses LL lib rather than HAL because the current HAL lib for ADC will call HAL_DMA_* functions rather than using zephyr's common DMA interface, so that way the driver will break the consistency of the code. This driver has been tested on multiple nucleo boards including NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/F746ZG/L073RZ/L476RG and all passed the test cases in tests/drivers/adc/adc_api. If the external ADC line is floating, it may fail the tests since ADC may get 0V and the test cases think 0 is failing. Connect it to any voltage source between 0-3.3V will help passing the test cases. Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-05-07 16:37:35 +08:00
/drivers/adc/adc_stm32.c @cybertale
drivers: audio: dmic: Add support for nRF PDM peripherals Add a shim that allows using the nrfx PDM driver via the Zephyr API. Add also missing devicetree nodes representing the PDM peripherals in the nRF52 Series SoCs. Extend the "nordic,nrf-pdm" binding with a new property that allows specifying the clock source to be used by the PDM peripheral (so that it is possible to use HFXO for better accuracy of the peripheral clock or, in the nRF53 Series SoCs, to use the dedicated audio oscillator). Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-08-19 17:11:46 +02:00
/drivers/audio/*nrfx* @anangl
CODEOWNERS: Add self as PT6314 maintainer Add myself as PT6314 maintainer. Signed-off-by: Chen Xingyu <hi@xingrz.me>
2023-06-24 23:32:25 +08:00
/drivers/auxdisplay/*pt6314* @xingrz
CODEOWNERS: Add self as aux display maintainer Add myself as auxiliary display maintainer. Signed-off-by: Jamie McCrae <spam@helper3000.net>
2022-11-29 21:38:15 +00:00
/drivers/auxdisplay/* @thedjnK
nuvoton: battery-backed ram Add bindings and entry for the battery-backed ram in the nuvoton npcx. This commit is an upstream port of https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/ec/zephyr/dts/bindings/cros_bbram/nuvoton,npcx-cros-bbram.yaml;l=1;drc=e9af813c36b7b411bf2a01cbc1b09d5fdec49b8a Along with a bit of cleaning up and an emulator. Signed-off-by: Yuval Peress <peress@chromium.org>
2021-01-25 00:51:17 -07:00
/drivers/bbram/* @yperess @sjg20 @jackrosenthal
CODEOWNERS: Replace joerchan with alwa-nordic I'm taking over for joerchan at Nordic Semiconductor as a Zephyr Bluetooth host collaborator. Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
2021-11-12 09:02:31 +01:00
/drivers/bluetooth/ @alwa-nordic @jhedberg @Vudentz
CODEOWNERS: Add myself for ESP32 BT HCI driver Add myself as codeowner for the ESP32 bluetooth HCI driver Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-12-27 23:54:39 -03:00
/drivers/bluetooth/hci/hci_esp32.c @sylvioalves
cache: Introduce external cache controller system support The cache API currently shipped in Zephyr is assuming that the cache controller is always on-core thus managed at the arch level. This is not always the case because many SoCs rely on external cache controllers as a peripheral external to the core (for example PL310 cache controller and the L2Cxxx family). In some cases you also want a single driver to control a whole set of cache controllers. Rework the cache code introducing support for external cache controllers. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-04-28 10:38:27 +02:00
/drivers/cache/ @carlocaione
drivers: syscon: Add support for multiple regions 1. Add support for multiple syscon entries (as a side effect, this also fixed syscon.c implementations which weren't being linked to their syscon.h counterparts). 2. Add support for different width registers in syscon. 3. Add tests for syscon Signed-off-by: Yuval Peress <peress@chromium.org>
2021-08-03 23:43:58 -06:00
/drivers/syscon/ @carlocaione @yperess
CODEOWNERS: add myself as additional codeowner for CAN Add myself as additional codeowner for the various CAN driver and subsystem components. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-02-25 09:15:00 +01:00
/drivers/can/ @alexanderwachter @henrikbrixandersen
drivers: can: mcp2515: Add driver for MCP2515 CAN controller The MCP2515 is a CAN controller that can be connected via SPI to an host MCU. This driver adds support for the MCP2515 as a new driver in the CAN subsystem. As it is a SPI peripheral it uses a thread for its interrupt handling and the received message filtering is done inside this interrupt thread, as the MCP2515 filter capabilities are not sufficient for the Zephyr CAN interface. The driver was validated with an external CAN logger and the adjusted CAN sample application. Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
2018-06-12 08:23:20 +02:00
/drivers/can/*mcp2515* @karstenkoenig
MAINTAINERS: add maintainers for Renesas R-Car platform Update codeowners. Add maintainers. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-12-02 10:21:44 +01:00
/drivers/can/*rcar* @aaillet @pmarzin
CODEOWNERS: Add code owners for Intel Agilex5 platform drivers Code owners for all the required Intel Agilex5 platform drivers. Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-06 15:07:44 +00:00
/drivers/clock_control/*agilex* @siclim @gdengi
drivers: clock_control: nrf: reimplementation including API updates Reimplementation of clock control driver for nrf platform. It includes latest API changes: asynchronous starting and getting clock status. Additionally, it implements calibration algorithm which optionally skips calibration based on no temperature change. Internal temperature sensor is used for that. Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2019-06-26 13:27:31 +02:00
/drivers/clock_control/*nrf* @nordic-krch
CODEOWNERS: update ESP32 source files ownership glaubermaroto is no longer maintaining this sources. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-05-11 11:48:24 -03:00
/drivers/clock_control/*esp32* @extremegtx @sylvioalves
drivers: clock: rcar: Deploy a driver for each soc This commit rewrite renesas R-Car clock driver in order to be able to support any new SoC easier. This work is so creating a clock driver per soc alongside a common driver for all reneasas r-car boars. - drivers: create a driver per soc - create a common driver - create a common header used by soc & common driver - create a soc specific driver calling for common driver - dts: use new compatible - use old yaml as common yaml - create a new "child" yaml to define the new compatible field - change compatible in device tree As in Linux, the driver can support both r8a77951 and r8a77950 SoC's so we decided to name the new driver as in Linux with Zephyr prefix : "clock_control_r8a7795_cpg_mssr.c". Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2022-05-12 09:56:43 +02:00
/drivers/clock_control/*cpg_mssr* @aaillet
CODEOWNERS: Set @nordic-krch as the codeowner of the counter driver As the author of the latest rework of the counter driver API, @nordic-krch is a more appropriate person than me to be the codeowner of this driver. Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2019-03-27 10:58:14 +01:00
/drivers/counter/ @nordic-krch
CODEOWNERS: Add ipm_console codeowner. Add @finikorg as codeowner for ipm_console. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-02-19 12:37:18 +02:00
/drivers/console/ipm_console.c @finikorg
console: Add semihosting console Many chips have only one serial port. When the serial port is occupied by other devices, there is a lack of a console to output debugging information. Semihosting can provide a console. The disadvantage of semihosting is that a debugger must be connected, so it can only be used for online debugging. Signed-off-by: ZhongYao Luo <LuoZhongYao@gmail.com> Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-11-29 15:07:21 +08:00
/drivers/console/semihost_console.c @luozhongyao
drivers: console: add jailhouse debug console Support jailhouse hypervisor debug console Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-03-01 15:54:13 +08:00
/drivers/console/jailhouse_debug_console.c @MrVan
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/drivers/counter/counter_cmos.c @dcpleung
CODEOWNERS: Add kentjhall for STM32 counter driver Add myself as codeowner for the STM32 counter driver. Signed-off-by: Kent Hall <kjh2166@columbia.edu>
2021-12-14 23:34:15 -05:00
/drivers/counter/counter_ll_stm32_timer.c @kentjhall
CODEOWNERS: update ESP32 source files ownership glaubermaroto is no longer maintaining this sources. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-05-11 11:48:24 -03:00
/drivers/counter/*esp32* @sylvioalves
drivers: crypto: add driver for nRF ECB add driver for nRF AES Electronic CodeBook (ECB) peripheral Signed-off-by: Maciej Fabia <maciej.fabia@nordicsemi.no>
2020-03-20 01:17:31 +01:00
/drivers/crypto/*nrf_ecb* @maciekfabia @anangl
drivers: display: Add support for Raydium RM68200 Add support for the Raydium RM68200 MIPI DSI panel. Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-02-23 14:42:50 -06:00
/drivers/display/*rm68200* @mmahadevan108
drivers: display: ili9342c display driver This driver implement basic functions of ili9342c controller which comes mostly with IPS displays. Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2023-03-06 20:58:54 +00:00
/drivers/display/display_ili9342c.* @extremegtx
drivers: dac: Add API for DAC peripherals DAC (digital to analog converter) peripheral driver with a generic API suitable for most MCUs (only basic DAC features considered). Signed-off-by: Martin Jäger <martin@libre.solar>
2020-01-10 10:10:12 +01:00
/drivers/dac/ @martinjaeger
Driver: dai: add author to codeowners Add Marcin Szkudlinski to codeowners Add Adrian Bonislawski to codeowners Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com> Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-05-11 16:18:12 +02:00
/drivers/dai/ @juimonen @marcinszkudlinski @abonislawski
/drivers/dai/intel/ @juimonen @marcinszkudlinski @abonislawski
/drivers/dai/intel/ssp/ @juimonen @marcinszkudlinski @abonislawski
/drivers/dai/intel/dmic/ @marcinszkudlinski @abonislawski
/drivers/dai/intel/alh/ @abonislawski
CODEOWNERS: Adding owner on DW DMA driver Just to make CI happy. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-17 08:32:59 +01:00
/drivers/dma/*dw* @tbursztyka
codeowners: add code owner for dma intel_adsp Add code owner for dma intel_adsp Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-09-08 18:10:38 +02:00
/drivers/dma/*dw_common* @abonislawski
CODEOWNERS: Add ownership for SAM0 DMA driver Add myself as owner for the SAM0 DMA driver. Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-04-29 17:29:00 -06:00
/drivers/dma/*sam0* @Sizurka
CODEOWNERS: remove commas in reviewers' listing Reviewers shall not be separated by commas. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-08 15:23:29 +02:00
/drivers/dma/dma_stm32* @cybertale @lowlander
drivers: dma: Add pl330 dma driver Add PL330 dma driver support, this driver - supports 32 bit memory to memory operation - supports 36 bit memory to memory operation under a config flag DMA_64BIT - supports secure channel Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2020-05-03 09:27:19 +05:30
/drivers/dma/*pl330* @raveenp
drivers: dma: Add iProc PAXDMA driver Add PAX[PCIE<->AXI] DMA driver which supports DMA transfers between host and target memory over PCIe link. Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2020-07-29 19:47:30 +05:30
/drivers/dma/*iproc_pax* @raveenp
codeowners: add code owner for dma intel_adsp Add code owner for dma intel_adsp Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-09-08 18:10:38 +02:00
/drivers/dma/*intel_adsp* @teburd @abonislawski
drivers: dma: Add infineon xmc4xxx dma support Adds dma drivers for xmc4xxx SoCs. Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-12-14 19:30:58 -05:00
/drivers/dma/*xmc4xxx* @talih0
CODEOWNERS: Adding drivers/edac owner Adding myself to the list for drivers/edac. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-12-18 11:29:39 +02:00
/drivers/edac/ @finikorg
drivers: eeprom: add API for EEPROM devices Add API for accessing Electrically Erasable Programmable Read-Only Memory (EEPROM) devices. EEPROMs have an erase block size of 1 byte, a long lifetime, and allows overwriting data on byte-by-byte access. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-10-20 21:22:03 +02:00
/drivers/eeprom/ @henrikbrixandersen
drivers: eeprom: add driver support for EEPROM of STM32L1 Could not find a supported LL with EEPROM. So I used HAL. Tested with: 96b_wistrio Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2019-12-10 11:44:44 +09:00
/drivers/eeprom/eeprom_stm32.c @KwonTae-young
MAINTAINERS: replace yurvyn by andy-liu-telink Replaced yurvyn by andy-liu-telink. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-06-22 17:47:22 +03:00
/drivers/entropy/*b91* @andy-liu-telink
entropy: bt_hci: driver added Adds an entropy driver that uses Bluetooth HCI commands as its source of randomness. As this method is blocking, the ISR API is not supported. As this method will range from relatively slow (same core Bluetooth HCI controller) to extremely slow (UART HCI Bluetooth controller), use the xoshiro PRNG by default for RNG generation. Implements #37186 Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2021-12-23 09:27:19 +10:00
/drivers/entropy/*bt_hci* @JordanYates
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 09:23:57 -05:00
/drivers/entropy/*rv32m1* @dleach02
CODEOWNERS: aplhabetical sorting Some lines were not at the expected place. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-09-04 12:12:34 +02:00
/drivers/entropy/*litex* @mateusz-holenko @kgugala @pgielda
MAINTAINER: change microchip maintainer Change maintainer from scottwcpg to jvasanth1 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-04 12:42:39 -05:00
/drivers/espi/ @albertofloyd @franciscomunoz @sjvasanth1
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/drivers/ethernet/ @tbursztyka
ethernet: Synopsys DesignWare MAC driver This is a driver for the Synopsys DesignWare MAC. It should work with the "DesignWare Cores Ethernet Quality-of-Service" versions 4.x and 5.x. This driver uses a zero-copy strategy, meaning that the hardware reads and writes data directly from/to packet fragment buffers provided by the network subsystem without first copying the data into a dedicated DMA bounce buffer. Platform specific setup is necessary for the hardware to work. Currently, only the STM32H7X series is implemented and tested. While this part needs refinement, this driver performs better and uses far less code space than the HAL-based alternative. Not yet implemented: - MDIO (it is WIP, currently relying on default PHY config) - PTP support - VLAN support - various hardware offloads (when available) Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-09-07 23:56:31 -04:00
/drivers/ethernet/*dwmac* @npitre
CODEOWNERS: Remove comma Fixes incorrect syntax in CODEOWNERS file to restore automatic GitHub reviewer assignments. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-10-06 19:30:43 -05:00
/drivers/ethernet/*stm32* @Nukersson @lochej
drivers: eth: add driver for w5500 Ethernet Controller Add driver for w5500 Ethernet Controller Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-09-02 10:36:48 +02:00
/drivers/ethernet/*w5500* @parthitce
CODEOWNERS: add code owner for Xilinx GEM driver Add the code owner entries for all files related to the Xilinx GEM Ethernet device driver. Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-06-23 17:13:00 +02:00
/drivers/ethernet/*xlnx_gem* @ibirnbaum
CODEOWNER: Add code owner for the smsc91x driver Add code owner for the smsc91x driver Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2023-03-16 15:37:06 +08:00
/drivers/ethernet/*smsc91x* @sgrrzhf
drivers: ethernet: add adin2111 Adds initial ADIN2111 2-Port 10BASE-T1L (SPE) switch support. Works over SPI. The driver creates 2 interfaces, 1 per port (PHY). Configures multicast and broadcast filters. The same unicast is applied to both ports. Supports: - Link state detection - CRC enable/disable - Ports config set - Ports ETH stats Provides functions for MDIO driver. Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2023-05-12 14:49:53 +02:00
/drivers/ethernet/*adin2111* @GeorgeCGV
drivers: Add Ethernet PHY API This commit adds support for Ethernet PHY drivers via a PHY API. It also includes a driver for a generic MII compliant PHY which supports most PHYs on the market. Separating PHY driver from the SoC specific Ethernet driver simplifies the Ethernet driver code and enables code re-use. Drivers for specific PHYs with more advanced features, such as RGMII delay in PHY can be developed independent of the Ethernet MAC driver. Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
2021-05-02 21:06:30 -04:00
/drivers/ethernet/phy/ @rlubos @tbursztyka @arvinf
drivers: phy: add adin2111 Adds PHY driver. Works via MDIO API and exposed ADIN2111 MDIO Clause 45 functions. Link status detection is triggered by ADIN2111 driver within offloaded IRQ handler. Supports: - LED0, LED1 enable/disable - Fatal HW error detection - AN 2.4V tx mode enable/disable The initialization order is important. PHY 2 must be initialized after PHY1. Therefore, it shall be defined after the 1st one in the devicetree. Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2023-05-12 15:03:06 +02:00
/drivers/ethernet/phy/*adin2111* @GeorgeCGV
drivers: Add mdio API This commit adds support for MDIO bus. The bus is used by Ethernet MACs to communicate with PHYs. Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
2021-05-02 20:49:04 -04:00
/drivers/mdio/ @rlubos @tbursztyka @arvinf
drivers: mdio: add adin2111 Adds MDIO driver. Works via exposed ADIN2111 functions. It is possible to access Clause 45 and 22 registers. Due to MDIO API limitation Clause 45 access is done using driver specific MDIO functions. Provides API and functions for PHY driver. Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2023-05-12 14:59:03 +02:00
/drivers/mdio/*adin2111* @GeorgeCGV
CODEOWNERS: Remove Andrzej Puzdrowski from most maintainerships Andrzej is no longer involved directly in Zephyr, but remains connected to the MCUboot project. Replace his maintainership with either other people from Nordic or leave the subsystem "orphaned" (i.e. labeled as odd fixes). Also add @nordicjm to the SMP/MCUmgr maintainership, as he is already an SMP/MCUmgr collaborator. Finally, removed @aunsbjerg from mcumgr path maintainership, since he's already assigned to the UDP platform implementation, which is what he is an owner of. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-10-18 11:56:28 +02:00
/drivers/flash/ @nashif @de-nordic
CODEOWNERS: Add entry for stm32 QSPI driver I would like to add myself (@lmajewski) as the code owner for stm32's QSPI driver. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2022-01-03 15:51:06 +01:00
/drivers/flash/*stm32_qspi* @lmajewski
MAINTAINERS: replace yurvyn by andy-liu-telink Replaced yurvyn by andy-liu-telink. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-06-22 17:47:22 +03:00
/drivers/flash/*b91* @andy-liu-telink
codeowners: Add code owner for Cadence QSPI NOR Flash Driver Add code owner for Cadence QSPI NOR Flash Driver. Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
2022-03-22 10:51:29 +08:00
/drivers/flash/*cadence* @ngboonkhai
drivers: flash: introduce on-chip flash driver for TI CC13xx/CC26xx This includes a basic driver for built-in flash on the Texas Intruments SimpleLink CC13xx/CC26xx SoC series. The driver makes use of driverlib HAL from TI's SDK and was tested on two LaunchXL development boards with CC1352R and CC2652R SoCs: - CC1352R1 LaunchXL - CC26x2R1 LaunchXL Tests were done using: - flash shell sample (samples/drivers/flash_shell) - littlefs filesystem sample (samples/subsys/fs/littlefs)* - MCUboot (bootloader/mcuboot/boot/zephyr)* * additional changes in DTS for the boards were required (partitions table) and are not part of this changeset (will be introduced later) Some additional information about the implementation: 1. TI's Technical Reference Manual for CC13x2 and CC26x2 points out that "An individual 64-bit word can be programmed to change bits 1 to 0" but it seems this 'alignment' requirement is handled internally by the ROM function and thus 'write-block-size' is set to 1. 2. Interrupts, VIMS and line buffers are disabled during flash content update (write or erase) and restored afterwards as recommended by TI. 3. Only RAM to flash write is supported (source of data to be written to flash can't point to flash). 4. The driver doesn't take care of flash sector protection disable as that functionality is handled by CCFG. Write or erase requests which refer to a protected area will fail. Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
2022-04-27 10:15:25 +02:00
/drivers/flash/*cc13xx_cc26xx* @pepe2k
CODEOWNERS: Remove Andrzej Puzdrowski from most maintainerships Andrzej is no longer involved directly in Zephyr, but remains connected to the MCUboot project. Replace his maintainership with either other people from Nordic or leave the subsystem "orphaned" (i.e. labeled as odd fixes). Also add @nordicjm to the SMP/MCUmgr maintainership, as he is already an SMP/MCUmgr collaborator. Finally, removed @aunsbjerg from mcumgr path maintainership, since he's already assigned to the UDP platform implementation, which is what he is an owner of. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-10-18 11:56:28 +02:00
/drivers/flash/*nrf* @de-nordic
CODEOWNERS: update ESP32 source files ownership glaubermaroto is no longer maintaining this sources. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-05-11 11:48:24 -03:00
/drivers/flash/*esp32* @sylvioalves
drivers: fpga controller: add eos_s3 fpga driver This adds driver for EOS_S3 SoC FPGA. Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com> Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
2021-06-23 09:45:20 +02:00
/drivers/fpga/ @tgorochowik @kgugala
CODEOWNERS: remove my assignments I won't be supporting Zephyr for the foreseeable future, so remove my association with specific subsystems. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2021-03-17 08:51:38 -05:00
/drivers/gpio/ @mnkp
MAINTAINERS: replace yurvyn by andy-liu-telink Replaced yurvyn by andy-liu-telink. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-06-22 17:47:22 +03:00
/drivers/gpio/*b91* @andy-liu-telink
drivers: adc: add LMP90xxx ADC driver with GPIO Add driver for the Texas Instruments LMP90xxx series of multi-channel, low-power 16-/24-bit sensor analog frontends (AFEs). The functionality is split into two drivers; an ADC driver and a GPIO driver. Tested with LMP90080 and LMP90100. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-10-07 13:08:44 +02:00
/drivers/gpio/*lmp90xxx* @henrikbrixandersen
CODEOWNERS: remove the inactive code owner WealianLiao is unable to support Zephyr for npcx chip for the foreseeable future. Remove him from the CODEOWNERS file. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-08-26 11:36:43 +08:00
/drivers/gpio/*nct38xx* @MulinChao @ChiHuaL
CODEWONERS: Update for gpio_stm32 driver Change codeowner following driver indeep rework. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-10-15 09:35:28 +02:00
/drivers/gpio/*stm32* @erwango
MAINTAINERS: update CODEOWNERS and MAINTAINERS.yml This commit updates the outdated entries of CODEWONERS and MAINAINERS.yml files. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-08-09 09:59:23 +02:00
/drivers/gpio/*eos_s3* @fkokosinski @kgugala
MAINTAINERS: add maintainers for Renesas R-Car platform Update codeowners. Add maintainers. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-12-02 10:21:44 +01:00
/drivers/gpio/*rcar* @aaillet
CODEOWNERS: update ESP32 source files ownership glaubermaroto is no longer maintaining this sources. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-05-11 11:48:24 -03:00
/drivers/gpio/*esp32* @sylvioalves
drivers: gpio: Added support for raspberry pi Added GPIO support for the RP2040 SoC. Only one core is supported. Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2021-11-30 00:49:38 +02:00
/drivers/gpio/*rpi_pico* @yonsch
CODEOWNERS: add owner for Xilinx PS GPIO controller driver Add code ownership for the Xilinx Processor System MIO / EMIO GPIO controller driver. Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-02-14 14:49:26 +01:00
/drivers/gpio/*xlnx_ps* @ibirnbaum
CODEOWNERS: Add hwinfo ownership Add @alexanderwachter as hwinfo maintainer. Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-02-25 17:22:06 +01:00
/drivers/hwinfo/ @alexanderwachter
drivers: i2c: Add a dump routine Add a function to dump out a set of I2C messages. It uses debug logging so it only useful for debugging. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-04 15:08:13 -06:00
/drivers/i2c/i2c_common.c @sjg20
emul: i2c: Add support for I2C emulators Add an emulation controller which routes I2C traffic to attached emulators depending on the I2C address selected. This allows drivers for I2C peripherals to be tested on systems that don't have that peripheral attached, with the emulator handling the I2C traffic. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-08-20 08:14:35 -06:00
/drivers/i2c/i2c_emul.c @sjg20
ITE: drivers/i2c: I2C driver divided into two compatibles As mentioned in #42882, the I2C of IT8XXX2 is designed for two different IP blocks, so this PR divides this I2C driver into two compatibles. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-02-24 18:24:25 +08:00
/drivers/i2c/i2c_ite_enhance.c @GTLin08
drivers/i2c: add i2c driver on it8xxx2 platform This commit is about the it8xxx2 i2c master driver which includes six SMBus channels. The enhanced channel i2c3, i2c4, i2c5 are controller which are designed to support the I2C protocol. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2020-12-22 21:29:02 +08:00
/drivers/i2c/i2c_ite_it8xxx2.c @GTLin08
i2c: add i2c shell with scan cmd Add a shell to interact with I2C devices. Currently scanning for devices is supported. Example output: uart:~$ i2c scan I2C_1 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- 18 -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: 40 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- 2 devices found on I2C_1 uart:~$ i2c scan I2C_3 i2c - I2C commands Subcommands: I2C_1 :I2C_1 I2C_2 :I2C_2 uart:~$ i2c scan I2C_2 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1e -- 20: -- -- -- -- -- -- -- -- -- 29 -- -- -- 2d -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- 56 -- -- -- -- -- -- 5d -- 5f 60: -- -- -- -- -- -- -- -- -- -- 6a -- -- -- -- -- 70: -- -- -- -- -- -- -- -- 7 devices found on I2C_2 This shell is based on the a sample that did the same thing and was limited in support. The sample is now removed in favour of this generic shell module. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-08 17:36:01 -05:00
/drivers/i2c/i2c_shell.c @nashif
emul: i2c: Add support for I2C emulators Add an emulation controller which routes I2C traffic to attached emulators depending on the I2C address selected. This allows drivers for I2C peripherals to be tested on systems that don't have that peripheral attached, with the emulator handling the I2C traffic. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-08-20 08:14:35 -06:00
/drivers/i2c/Kconfig.i2c_emul @sjg20
drivers/i2c: add i2c driver on it8xxx2 platform This commit is about the it8xxx2 i2c master driver which includes six SMBus channels. The enhanced channel i2c3, i2c4, i2c5 are controller which are designed to support the I2C protocol. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2020-12-22 21:29:02 +08:00
/drivers/i2c/Kconfig.it8xxx2 @GTLin08
i2c: Update API terminology Updates the API and types to match updated I2C terminology. Replaces master with controller and slave with target. Updates all drivers to match the changed macros, types, and API signatures. Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-05-23 12:15:02 -05:00
/drivers/i2c/target/*eeprom* @henrikbrixandersen
MAINTAINERS: move to my ampere account I'm using a new account now. Do the corresponding CODEOWNERS change just for consistency as well. Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
2023-07-28 13:41:14 -07:00
/drivers/i2c/Kconfig.test @mbolivar-ampere
/drivers/i2c/i2c_test.c @mbolivar-ampere
drivers: i2c: add Renesas R-Car driver This patch add support for I2C on the Renesas R-Car. This I2C hardware block can be found on various Renesas R-Car SoC series. It allows to perfom read and write on I2C buses in an interrupt based way on R-Car Gen3 H3ULCB board. Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-05-11 09:48:22 +02:00
/drivers/i2c/*rcar* @aaillet
drivers: i2s: Add LiteX I2S controller driver This introduces LiteX I2S driver supporting the following features: - 8,16,24,32 bit sample width, - mono/stereo sound, - different sample frequencies - big/little-endian data format, - concatenated channels mode (for selected sample widths only), - slave/master mode operation. Signed-off-by: Pawel Sagan <psagan@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-03-12 17:54:08 +01:00
/drivers/i2s/*litex* @mateusz-holenko @kgugala @pgielda
drivers: i2s: Add support for nRF I2S peripherals Add a shim that allows using the nrfx I2S driver via the Zephyr API. Add also missing devicetree nodes representing the I2S peripherals in the nRF52 Series SoCs. Extend the "nordic,nrf-i2s" binding with a new property that allows specifying the clock source to be used by the I2S peripheral (so that it is possible to use HFXO for better accurracy of the peripheral clock or, in the nRF53 Series SoCs, to use the dedicated audio oscillator). Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-04-13 15:00:03 +02:00
/drivers/i2s/i2s_ll_stm32* @avisconti
/drivers/i2s/*nrfx* @anangl
drivers: i3c: introduce I3C API for controllers This introduces the I3C API for I3C controllers. Currently, this supports one controller per bus under Zephyr. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-07-18 13:21:12 -07:00
/drivers/i3c/ @dcpleung
i3c: add cdns i3c driver This gives initial support to the cadence i3c controller Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2022-10-31 22:03:47 -07:00
/drivers/i3c/i3c_cdns.c @XenuIsWatching
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 18:18:40 +03:00
/drivers/ieee802154/ @rlubos @tbursztyka
MAINTAINERS: replace yurvyn by andy-liu-telink Replaced yurvyn by andy-liu-telink. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-06-22 17:47:22 +03:00
/drivers/ieee802154/*b91* @andy-liu-telink
CODEOWNERS: add codeowner for nRF IEEE 802.15.4 This commit adds @jciupis as a codeowner of Nordic's IEEE 802.15.4 files. Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
2022-03-25 11:06:58 +01:00
/drivers/ieee802154/ieee802154_nrf5* @jciupis
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 18:18:40 +03:00
/drivers/ieee802154/ieee802154_rf2xx* @tbursztyka @nandojve
MAINTAINERS: Add vaishnavachath as maintainer for TI Platforms Add myself as a maintainer for existing TI platforms, currently I am an employee with Texas Instruments Inc. in the Embedded Processors software department and has worked on the supported simplelink platforms in Zephyr for the last 2 years. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2023-02-01 21:32:37 +05:30
/drivers/ieee802154/ieee802154_cc13xx* @bwitherspoon @cfriedt @vaishnavachath
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/drivers/interrupt_controller/ @dcpleung @nashif
CODEOWNERS: Add ARM GIC interrupt controller driver codeowner Add @stephanosio as a code owner for the ARM Generic Interrupt Controller (GIC) driver. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 17:31:04 +09:00
/drivers/interrupt_controller/intc_gic.c @stephanosio
CODEOWNERS: update ESP32 source files ownership glaubermaroto is no longer maintaining this sources. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-05-11 11:48:24 -03:00
/drivers/interrupt_controller/*esp32* @sylvioalves
drivers: interrupt-controller: add Nuclei ECLIC driver Add support for the ECLIC interrupt controller which is used with the Nuclei processor core. Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-11-15 08:34:11 +09:00
/drivers/interrupt_controller/intc_nuclei_eclic.c @soburi
drivers: ipm: mhu: Add MHU driver for V2M Musca MHU (Message Handling Unit) enables software to raise interrupts to the processor cores. It is enabled in SSE 200 subsystems. This patch aims to implement inter processor communication. Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-01-18 23:06:48 +08:00
/drivers/ipm/ipm_mhu* @karl-zh
MAINTAINERS: remove maintainer-ship status for ioannisg Removing maintainer and/or collaborator status on - nRF platforms - TF-M - userspace - cmsis-dsp - MAINTAINERS file for ioannisg. Replace with @anangl or others, where applicable. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-16 16:18:09 +01:00
/drivers/ipm/Kconfig.nrfx @masz-nordic
/drivers/ipm/Kconfig.nrfx_ipc_channel @masz-nordic
CODEOWNERS: Add ipm_cavs_host New driver needs owners (hijack the earlier cAVS wildcard for the intra-DSP, it's now a legacy thing and essentially unrelated, but is for the same platform). Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-02-24 07:41:05 -08:00
/drivers/ipm/ipm_cavs* @dcpleung @andyross
MAINTAINERS: remove maintainer-ship status for ioannisg Removing maintainer and/or collaborator status on - nRF platforms - TF-M - userspace - cmsis-dsp - MAINTAINERS file for ioannisg. Replace with @anangl or others, where applicable. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-16 16:18:09 +01:00
/drivers/ipm/ipm_nrfx_ipc.c @masz-nordic
/drivers/ipm/ipm_nrfx_ipc.h @masz-nordic
CODEOWNERS: update arnop2 ownership name Following update of the Github username,replace owner from arnop2 to arnopo. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-12-06 17:00:08 +01:00
/drivers/ipm/ipm_stm32_ipcc.c @arnopo
CODEOWNERS: add owners for stm32 hsem ipm driver Add condeowner for STM32 HSEM IPM driver files. Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
2021-08-03 10:34:30 +08:00
/drivers/ipm/ipm_stm32_hsem.c @cameled
drivers: ipm: esp32: added IPM driver implemented by software for esp32 dual core variants. Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-07-14 18:34:05 -03:00
/drivers/ipm/ipm_esp32.c @uLipe
drivers: ipm: added IPM over IVSHMEM driver This driver is built on top of the IVSHMEM doorbell notification mechanism providing an unified way to generate inter VM interrupts. Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2023-07-17 09:44:44 -03:00
/drivers/ipm/ipm_ivshmem.c @uLipe
MAINTAINER: change microchip maintainer Change maintainer from scottwcpg to jvasanth1 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-04 12:42:39 -05:00
/drivers/kscan/ @VenkatKotakonda @franciscomunoz @sjvasanth1
/drivers/kscan/*xec* @franciscomunoz @sjvasanth1
CODEOWNERS: Remove myself of KSCAN and PS/2 subsytem codeowner Not enough time to review changes in these subsystems. Propose to have VenkatKotakonda as KSCAN subsystem owner instead. Adding SoC-specific driver owners. Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-06-25 14:47:51 -07:00
/drivers/kscan/*ft5336* @MaureenHelm
drivers: ht16k33: convert keyscan driver from gpio API to kscan API Convert the keyscan portion of the Holtek HT16K33 driver to adhere to the kscan API instead of the GPIO API. When this driver was introduced the kscan API was not present. The keyscan driver was therefore implemented as a GPIO interrupt driver. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-06-14 22:58:56 +02:00
/drivers/kscan/*ht16k33* @henrikbrixandersen
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/drivers/led/ @Mani-Sadhasivam
MAINTAINERS: move to my ampere account I'm using a new account now. Do the corresponding CODEOWNERS change just for consistency as well. Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
2023-07-28 13:41:14 -07:00
/drivers/led_strip/ @mbolivar-ampere
CODEOWNERS: Add entry for LoRa support Add CODEOWNERS entry for LoRa API, drivers and samples. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-07-22 20:42:47 +05:30
/drivers/lora/ @Mani-Sadhasivam
drivers: mbox: Introduce MBOX driver class One limitation of the current IPM API is that it is assuming that the hardware is only exporting one single channel through which the data can be sent or signalling can happen. If the hardware supports multiple channels, the IPM device must be instantiated (possibly in the DT) several times, one for each channel to be able to send data through multiple channels using the same hw peripheral. Also in the current IPM API only one callback can be registered, that means that only one driver is controlling all the signalling happening on all the channels. This patch is introducing a new MBOX API that is supporting multi-channel signalling and data exachange leveraging and extending the previous (and outdated) IPM API. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-10-15 11:55:56 +02:00
/drivers/mbox/ @carlocaione
drv: display: Initial FT800 display driver This patch includes initial support for FT800 display driver. It includes basic features. It can be easily extended with more FT800 display list and co-processor features. Signed-off-by: Hubert Miś <hubert.mis@gmail.com>
2021-02-08 21:14:29 +01:00
/drivers/misc/ @tejlmand
/drivers/misc/ft8xx/ @hubertmis
drivers: mm: add skeleton build files and common funcs This adds skeleton Kconfig/CMakeLists.txt and common implementation of some sys_mm_drv_*() functions. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-12-07 10:22:24 -08:00
/drivers/mm/ @dcpleung
CODEOWNERS: Replace @LairdCP/zephyr group Groups do not work well for CODEOWNERS. Replace LairdCP group with myself. Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2022-06-06 11:11:44 -07:00
/drivers/modem/hl7800.c @rerickson1
drivers: modem: Added simcom sim7080 modem driver. Implemented driver for the simcom sim7080 modem. This driver features Socket offloading, TCP, UDP, DNS, SMS, GPS and FTP. Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
2021-08-27 10:21:14 +02:00
/drivers/modem/simcom-sim7080.c @lgehreke
/drivers/modem/simcom-sim7080.h @lgehreke
CODEOWNERS: Replace @LairdCP/zephyr group Groups do not work well for CODEOWNERS. Replace LairdCP group with myself. Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2022-06-06 11:11:44 -07:00
/drivers/modem/Kconfig.hl7800 @rerickson1
drivers: modem: Added simcom sim7080 modem driver. Implemented driver for the simcom sim7080 modem. This driver features Socket offloading, TCP, UDP, DNS, SMS, GPS and FTP. Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
2021-08-27 10:21:14 +02:00
/drivers/modem/Kconfig.simcom-sim7080 @lgehreke
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/drivers/pcie/ @dcpleung @nashif @jhedberg
MAINTAINER: change microchip maintainer Change maintainer from scottwcpg to jvasanth1 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-04 12:42:39 -05:00
/drivers/peci/ @albertofloyd @franciscomunoz @sjvasanth1
CODEOWNERS: add myself to pinctrl Add myself as code owner for pinctrl drivers. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-09-15 16:34:37 +02:00
/drivers/pinctrl/ @gmarull
CODEOWNERS: update ESP32 source files ownership glaubermaroto is no longer maintaining this sources. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-05-11 11:48:24 -03:00
/drivers/pinctrl/*esp32* @sylvioalves
CODEOWNERS: Fix issues reported by check_compliance.py Fix issues with paths, files removed, etc in CODEOWNERS reported by check_compliance.py Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-13 16:56:10 -05:00
/drivers/pinctrl/*it8xxx2* @ite
CODEOWNERS: Add code owners for Intel Agilex5 platform drivers Code owners for all the required Intel Agilex5 platform drivers. Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-06 15:07:44 +00:00
/drivers/pm_cpu_ops/ @carlocaione @gdengi
/drivers/pm_cpu_ops/psci_shell.c @nbalabak @gdengi
codeowners: Add power domains to the list Add power domains directory and set it to myself. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-01-13 14:49:51 -08:00
/drivers/power_domain/ @ceolin
MAINTAINER: change microchip maintainer Change maintainer from scottwcpg to jvasanth1 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-04 12:42:39 -05:00
/drivers/ps2/ @franciscomunoz @sjvasanth1
/drivers/ps2/*xec* @franciscomunoz @sjvasanth1
CODEOWNERS: remove the inactive code owner WealianLiao is unable to support Zephyr for npcx chip for the foreseeable future. Remove him from the CODEOWNERS file. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-08-26 11:36:43 +08:00
/drivers/ps2/*npcx* @MulinChao @ChiHuaL
MAINTAINERS: replace yurvyn by andy-liu-telink Replaced yurvyn by andy-liu-telink. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-06-22 17:47:22 +03:00
/drivers/pwm/*b91* @andy-liu-telink
CODEOWNERS: take ownership of PCA9685 PWM driver Take ownership of the PCA9685 PWM driver. Signed-off-by: Nick Ward <nix.ward@gmail.com>
2022-12-07 21:15:26 +11:00
/drivers/pwm/*pca9685* @nixward
drivers: pwm: add pwm driver for rpi_pico Add pwm driver implementation for rpi pico family. Adds myself as codeowner of drivers/pwm/*rpi_pico* Signed-off-by: Joep Buruma <burumaj50@gmail.com>
2022-02-18 21:16:04 +01:00
/drivers/pwm/*rpi_pico* @burumaj
CODEOWNERS: take ownership of PWM capture helper functions Take ownership of the PWM capture helper functions. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-12-27 16:49:19 +01:00
/drivers/pwm/*rv32m1* @henrikbrixandersen
drivers: pwm: add a SAM0 TCC based PWM driver This runs the Timer/Counter for Control in 'normal' PWM mode. The number of channels and counter width depends on the device and is imported from DeviceTree. Signed-off-by: Michael Hope <mlhx@google.com>
2020-06-01 13:36:22 +02:00
/drivers/pwm/*sam0* @nzmichaelh
drivers: pwm: test driver Add a dummy driver for the `vnd,pwm` compatible to allow compilation of drivers utilising PWM when running "build_all" tests. Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2021-12-21 10:47:42 +10:00
/drivers/pwm/*test* @JordanYates
drivers: pwm: add driver for the Xilinx AXI Timer Add PWM controller driver for the Xilinx AXI Timer v2.0 IP. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-10-20 19:17:34 +02:00
/drivers/pwm/*xlnx* @henrikbrixandersen
CODEOWNERS: take ownership of PWM capture helper functions Take ownership of the PWM capture helper functions. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-12-27 16:49:19 +01:00
/drivers/pwm/pwm_capture.c @henrikbrixandersen
/drivers/pwm/pwm_shell.c @henrikbrixandersen
gecko pwm: add pwm driver for the gecko. pwm driver + Kconfig and Cmake files for the efr32 soc family. Signed-off-by: Sun Amar <sun681@gmail.com>
2021-03-22 00:18:04 +02:00
/drivers/pwm/*gecko* @sun681
ITE drivers/pwm: add PWM for it8xxx2 Add pulse width modulator (PWM) for it8xxx2. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
2021-06-07 15:21:22 +08:00
/drivers/pwm/*it8xxx2* @RuibinChang
CODEOWNERS: Add ownership for ESP32 PWM drivers Add myself as codeowner for the ESP32 LEDC and MCPWM drivers. Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-07-05 19:54:29 -03:00
/drivers/pwm/*esp32* @LucasTambor
drivers: pwm: add Renesas R-Car driver Add R-Car Gen3 PWM driver. Clock diviser is automatically adjusted according to requested period and duty-cycle in order to obtain as much accuracy as possible. Indeed, in order to improve PWM accurancy, the PWM clock has to fit the requested period. So use the given period_cycle to define if the clock as to be adapted. In such case, increase/decrease the clock diviser to adapt the period_cycle and be sure that it fits into the 10 bits counter of the PWM controller. Tested on H3ULCB on pwm0 and pwm4. Signed-off-by: Pierre Marzin <pierre.marzin@iot.bzh>
2022-01-27 18:14:13 +01:00
/drivers/pwm/*rcar* @pmarzin
codeowners: add entry for regulators Add myself as owner of regulators code. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 17:51:12 +01:00
/drivers/regulator/* @gmarull
CODEOWNERS: Remove files and update paths Some of the files have been deleted or moved. Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-11-21 17:23:59 -06:00
/drivers/regulator/regulator_pca9420.c @danieldegrasse
/drivers/regulator/regulator_shell.c @danieldegrasse
drivers: added file structure for Reset Controller Driver added needed files for reset controller driver Signed-off-by: Andrei-Edward Popa <andrei.popa105@yahoo.com>
2022-03-22 02:25:39 +02:00
/drivers/reset/ @andrei-edward-popa
CODEOWNERS: Add code owners for Intel Agilex5 platform drivers Code owners for all the required Intel Agilex5 platform drivers. Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-06 15:07:44 +00:00
/drivers/reset/reset_intel_socfpga.c @nbalabak
/drivers/reset/Kconfig.intel_socfpga @nbalabak
CODEOWNERS: minor cleanup Remove redundant lines and minor owner updates. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 14:42:35 -04:00
/drivers/sensor/ @MaureenHelm
CODEOWNERS: Add codeowner for ams iAQcore and ENS210 Add @alexanderwachter as codeowner for AMS iAQcore and ENS210 Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-03-02 16:17:04 +01:00
/drivers/sensor/ams_iAQcore/ @alexanderwachter
/drivers/sensor/ens210/ @alexanderwachter
drivers: sensor: Add support for grow_r502a fingerprint sensor Add driver support for grow_r502a fingerprint sensor Signed-off-by: Dinesh Kumar K <dinesh@linumiz.com>
2021-12-28 11:02:04 +05:30
/drivers/sensor/grow_r502a/ @DineshDK03
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/drivers/sensor/hts*/ @avisconti
CODEOWNERS: Add bbilas for INA23X driver Add myself as codeowners for INA23X driver files. Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-12-05 11:35:02 +01:00
/drivers/sensor/ina23*/ @bbilas
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/drivers/sensor/lis*/ @avisconti
/drivers/sensor/lps*/ @avisconti
/drivers/sensor/lsm*/ @avisconti
CODEOWNERS: Add codeowner for drivers/sensor/mpr Add myself as codeowner as this was not done in the initial PR for the mpr driver. Signed-off-by: Sven Herrmann <sven.herrmann@posteo.de>
2020-07-22 08:47:24 +00:00
/drivers/sensor/mpr/ @sven-hm
CODEOWNERS: add ownership of STM32 quadrature decoder driver Adding myself as the code owner for the STM32's quadrature encoder driver Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2022-09-07 15:34:42 +02:00
/drivers/sensor/qdec_stm32/ @valeriosetti
driver/sensor: add STTS751 temperature sensor Add support to STM STTS751 temperature sensor. Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-07-16 08:40:16 +02:00
/drivers/sensor/st*/ @avisconti
MAINTAINERS: replace yurvyn by andy-liu-telink Replaced yurvyn by andy-liu-telink. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-06-22 17:47:22 +03:00
/drivers/serial/*b91* @andy-liu-telink
CODEOWNERS: Add code owener for uart_altera_jtag.c Add code owener for uart_altera_jtag.c Signed-off-by: Goh Shun Jing <shun.jing.goh@intel.com>
2023-01-19 15:26:45 +08:00
/drivers/serial/uart_altera_jtag.c @nashif @gohshunjing
CODEOWNERS: Add code owener for uart_altera.c Add code owener for uart_altera.c Signed-off-by: Goh Shun Jing <shun.jing.goh@intel.com>
2023-01-12 13:48:01 +08:00
/drivers/serial/uart_altera.c @gohshunjing
CODEOWNERS: Add code owners for Intel Agilex5 platform drivers Code owners for all the required Intel Agilex5 platform drivers. Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-06 15:07:44 +00:00
/drivers/serial/*ns16550* @dcpleung @nashif @gdengi
codeowners: Remove Mieszko Mierunski from nRF drivers Mieszko is no longer a Nordic employee. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2023-05-04 12:33:04 +02:00
/drivers/serial/*nrfx* @anangl
drivers: serial: add LiteUART driver Add LiteX UART driver with bindings for this device. Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-03-28 14:37:03 +01:00
/drivers/serial/uart_liteuart.c @mateusz-holenko @kgugala @pgielda
CODEOWNERS: Add myself as the codeowner for imx8m evk and uart driver Add myself as the codeowner for imx8m evk and uart driver. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-11-23 19:03:16 +05:30
/drivers/serial/Kconfig.mcux_iuart @Mani-Sadhasivam
/drivers/serial/uart_mcux_iuart.c @Mani-Sadhasivam
drivers: serial: uart_rtt: Virtual UARTs over RTT channels Add support for virtual UART device that uses Segger RTT channels for data transfers. Due to the RTT principle, this driver supports only polling API. Signed-off-by: Pavel Kral <pavel.kral@omsquare.com>
2019-07-15 18:47:43 +02:00
/drivers/serial/Kconfig.rtt @carlescufi @pkral78
/drivers/serial/uart_rtt.c @carlescufi @pkral78
drivers: serial: Added support for raspberry pi Added a serial driver for the RP2040. Only polling API is supported. Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2021-11-30 00:40:43 +02:00
/drivers/serial/*rpi_pico* @yonsch
serial: Add Xilinx ZynqMP PS uart driver Add ZynqMP PS uart driver for Xilinx ZynqMP platform Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
2018-11-17 23:29:47 -08:00
/drivers/serial/Kconfig.xlnx @wjliang
/drivers/serial/uart_xlnx_ps.c @wjliang
drivers: serial: add driver for the Xilinx UART Lite IP Add serial driver for the Xilinx UART Lite IP. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-07-29 00:14:22 +02:00
/drivers/serial/uart_xlnx_uartlite.c @henrikbrixandersen
drivers: serial: add XMC seris UART support Add infineon XMC4 series UART support. Driver supports only poll mode using XMCLib. Out of 4 available UART's on SoC, only UART1 is confgired by default in UART mode until GPIO & pinctrl support. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-04-21 12:16:59 +02:00
/drivers/serial/*xmc4xxx* @parthitce
driver: serial: replace suffix nuvoton with numicro Replace the suffix "nuvoton" with "numicro" for Nuvoton microcontroller serial driver. Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-07-19 23:25:53 -07:00
/drivers/serial/*numicro* @ssekar15
MAINTAINERS: Add new collaborator and code owner for SPARC and LEON Add @julius-barendt as collaborator and code owner for areas related to SPARC and LEON. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2022-06-22 10:50:58 +02:00
/drivers/serial/*apbuart* @julius-barendt
drivers: serial: add Renesas R-Car driver This patch add support for polling based UART on the Renesas R-Car SCIF (Serial Communication Interface with FIFO) This hardware block can be found on various Renesas R-Car SoC series. It allows to get console on R-Car Gen3 H3ULCB board. Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-05-06 12:32:25 +02:00
/drivers/serial/*rcar* @aaillet
drivers: serial: add a dummy driver for vnd,serial This commit adds a serial dummy driver compatible to vnd,serial. This is needed that devices can access the uart device in tests like tests/drivers/build_all/... . Add myself as codeowner to avoid complicance check failure. Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-08 17:15:52 +02:00
/drivers/serial/Kconfig.test @str4t0m
/drivers/serial/serial_test.c @str4t0m
xenvm: drivers: serial: Implement serial interface to Xen PV console This commit adds minimal support of Xen hypervisor console via UART-like driver. Implementation allows to use poll_in/poll_out char interface for uart_console.c driver directly to HV console instead of using Xen virtual PL011 UART. Future implementation will support interrupt driven interface on Xen event channels, currently it is under development. Also this commit introduces early console_io Xen interface, which allows to receive printk/stdout messages quickly after start, but requires Xen, built with CONFIG_DEBUG option. Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2021-07-02 11:31:56 +03:00
/drivers/serial/Kconfig.xen @lorc @firscity
/drivers/serial/uart_hvc_xen.c @lorc @firscity
xenvm: drivers: serial: Add consoleio Xen serial driver for Domain 0 This commit adds Xen consoleio serial driver. It is needed to receive kernel messages from Zephyr in case it runs as Xen privileged domain (Dom0). There is no console ring buffer for such domain, so regular uart_hvc_xen driver can not be used (privileged domain input/output are possible only through consoleio interface). Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2021-10-07 17:58:42 +03:00
/drivers/serial/uart_hvc_xen_consoleio.c @lorc @firscity
ITE: drivers/serial: add the UART driver for the PM callback function IT8XXX2 uses shared ns16550.c driver which does not provide a power management callback(pm_action_cb), so create driver to handle IT8XXX2 specific UART features. note: pm_action_cb(old name: pm_control_fn) Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-10-21 15:05:50 +08:00
/drivers/serial/Kconfig.it8xxx2 @GTLin08
/drivers/serial/uart_ite_it8xxx2.c @GTLin08
smbus: Update CODEOWNERS and MAINTAINERS files Update CODEOWNERS and MAINTAINERS files. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-10-03 12:01:15 +03:00
/drivers/smbus/ @finikorg
CODEOWNER: Add code owner for sip_svc subsystem Add code owner for svc driver,sip_svc subsystem and sip_svc sample application Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
2023-03-17 08:01:46 +00:00
/drivers/sip_svc/ @maheshraotm
drivers: disk: cleanup after driver relocation Add common SDMMC_LOG_LEVEL and SDMMC_VOLUME_NAME. Initialize drivers at POST_KERNEL level. Update CODEOWNERS after sdmmc drivers relocation. Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-02-24 09:56:01 +01:00
/drivers/disk/ @jfischer-no
/drivers/disk/sdmmc_sdhc.h @JunYangNXP
/drivers/disk/sdmmc_stm32.c @anthonybrandon
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 18:18:40 +03:00
/drivers/net/ @rlubos @tbursztyka
/drivers/ptp_clock/ @tbursztyka
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/drivers/spi/ @tbursztyka
MAINTAINERS: replace yurvyn by andy-liu-telink Replaced yurvyn by andy-liu-telink. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-06-22 17:47:22 +03:00
/drivers/spi/*b91* @andy-liu-telink
drivers: spi: rv32m1: Add driver for RV32M1 LPSPI Add SPI driver and bindings for LPSPI peripheral for the RV32M1 SOC. Based heavily on the existing mcux LPSPI driver. Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
2019-08-07 17:13:35 +02:00
/drivers/spi/spi_rv32m1_lpspi* @karstenkoenig
CODEOWNERS: update ESP32 source files ownership glaubermaroto is no longer maintaining this sources. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-05-11 11:48:24 -03:00
/drivers/spi/*esp32* @sylvioalves
drivers: sdhc: Implement NXP USDHC SDHC driver Implement SDHC driver for NXP USDHC peripheral, supporting all api calls available in the sdhc driver. This implementation leverages NXP's HAL, and simply implements a shim layer over the HAL itself. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-02-16 13:53:54 -06:00
/drivers/sdhc/ @danieldegrasse
codeowners: drivers: timer: include Kconfig files Make the timer drivers expression more generic to cover both implementation and Kconfig files. Missing drivers were added to pass compliance checks. Owners added based on maintainership, driver author, etc. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-29 11:39:46 +01:00
/drivers/timer/*apic* @dcpleung @nashif
drivers/timer: Add x86 APIC TSC_DEADLINE driver Modern hardware all supports a TSC_DEADLINE mode for the APIC timer, where the same GHz-scale 64 bit TSC used for performance monitoring becomes the free-running counter used for cpu-local timer interrupts. Being a free running counter that does not need to be reset, it will not lose time in an interrupt. Being 64 bit, it needs no rollover or clamping logic in the driver when presented with a 32 bit tick count. Being a proper comparator, it will correctly trigger interrupts for times set "in the past" and thus needs no minimum/clamping logic. The counter is synchronized across the system architecturally (modulo one burp where firmware likes to change the adjustment value) so usage is SMP-safe by default. Access to the 64 bit counter and comparator value are single-instruction atomics even on 32 bit systems, so it beats even the RISC-V machine timer in complexity (which was our reigning champ for "simplest timer driver"). Really this is just ideal for Zephyr. So rather than try to add support for it to the existing APIC driver and increase complexity, make this a new standalone driver instead. All modern hardware has what it needs. The sole gotcha is that it's not easily emulatable (qemu supports it only under kvm where they can freeload on the host TSC) so it can be exercised only on hardware platforms right now. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-05-05 10:37:39 -07:00
/drivers/timer/apic_tsc.c @andyross
codeowners: drivers: timer: include Kconfig files Make the timer drivers expression more generic to cover both implementation and Kconfig files. Missing drivers were added to pass compliance checks. Owners added based on maintainership, driver author, etc. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-29 11:39:46 +01:00
/drivers/timer/*arm_arch* @carlocaione
/drivers/timer/*cortex_m_systick* @anangl
/drivers/timer/*altera_avalon* @nashif
/drivers/timer/*riscv_machine* @kgugala @pgielda
/drivers/timer/*ite_it8xxx2* @ite
/drivers/timer/*xlnx_psttc* @wjliang @stephanosio
soc: ti: cc13/26xx: clean up include hierarchy Removes duplicate code and inconsistencies in the naming of the cc13xx_cc26xx devicetree and RTC driver hierarchy and alignes it with the actual TI product series naming hierarchy. Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
2023-07-06 15:52:16 +02:00
/drivers/timer/*cc13xx_cc26xx_rtc* @vanti
codeowners: drivers: timer: include Kconfig files Make the timer drivers expression more generic to cover both implementation and Kconfig files. Missing drivers were added to pass compliance checks. Owners added based on maintainership, driver author, etc. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-29 11:39:46 +01:00
/drivers/timer/*cavs* @dcpleung
/drivers/timer/*stm32_lptim* @FRASTM
MAINTAINERS: Add new collaborator and code owner for SPARC and LEON Add @julius-barendt as collaborator and code owner for areas related to SPARC and LEON. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2022-06-22 10:50:58 +02:00
/drivers/timer/*leon_gptimer* @julius-barendt
timer: add support for MIPS CP0 timer This commit adds a kernel device driver for the MIPS CP0 timer. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2020-12-01 10:32:10 +03:00
/drivers/timer/*mips_cp0* @frantony
MAINTAINERS: add maintainers for Renesas R-Car platform Update codeowners. Add maintainers. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-12-02 10:21:44 +01:00
/drivers/timer/*rcar_cmt* @aaillet
codeowners: drivers: timer: include Kconfig files Make the timer drivers expression more generic to cover both implementation and Kconfig files. Missing drivers were added to pass compliance checks. Owners added based on maintainership, driver author, etc. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-29 11:39:46 +01:00
/drivers/timer/*esp32c3_sys* @uLipe
/drivers/timer/*sam0_rtc* @bendiscz
/drivers/timer/*arcv2* @ruuddw
/drivers/timer/*xtensa* @dcpleung
/drivers/timer/*rv32m1_lptmr* @mbolivar
/drivers/timer/*nrf_rtc* @anangl
/drivers/timer/*hpet* @dcpleung
MAINTAINERS: Remove myself as a USB maintainer I have not had time to work with USB recently, so removing myself from MAINTAINERS and CODEOWNERS for the USB subsystem. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2021-03-08 14:40:06 +02:00
/drivers/usb/ @jfischer-no
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/drivers/usb/device/usb_dc_stm32.c @ydamigos @loicpoulain
usb-c: Change dir name from usbc to usb_c For improved readability, change dir name from usbc to usb_c Signed-off-by: Sam Hurst <sbh1187@gmail.com>
2022-08-31 11:18:11 -07:00
/drivers/usb_c/ @sambhurst
CODEOWNERS: Add drivers/video path Add myself to owner of drivers/video. Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-07-01 17:29:42 +02:00
/drivers/video/ @loicpoulain
MAINTAINERS: replace yurvyn by andy-liu-telink Replaced yurvyn by andy-liu-telink. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-06-22 17:47:22 +03:00
/drivers/i2c/*b91* @andy-liu-telink
CODEOWNERS: stm32: Update on active members In early Zephyr days, STM32 code base greatly benefited from the care of a handful of people. These days are gone and so did these few people that haven't been contributing for at least a year now. CODEOWNERS file is updated to reflect current status of contribution, for the areas where the is an active contributor. Let them be thank for these initial contributions. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-08-28 09:20:21 +02:00
/drivers/i2c/i2c_ll_stm32* @ydamigos
drivers: i2c: rv32m1: add I2C driver for the RV32M1 RI5CY SoC Add driver and device tree binding for the Low Power Inter-Integrated Circuit (LPI2C) controllers found in the RV32M1 RI5CY SoC. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-04-01 21:09:44 +02:00
/drivers/i2c/i2c_rv32m1_lpi2c* @henrikbrixandersen
CODEOWNERS: Add ownership for SAM0 I2C driver Add myself as owner for the SAM0 I2C driver. Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-04-29 17:17:44 -06:00
/drivers/i2c/*sam0* @Sizurka
CODEOWNERS: change x86-related ownership Charles Youse (@gnuless) has left the organization. I will be taking over most of his areas of ownership, with Daniel minding the DW I2C driver. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-23 12:43:50 -07:00
/drivers/i2c/i2c_dw* @dcpleung
driver: i2c: TCA9546A: Rename to TCA954x Prepare the driver to upcoming support of more mux references. Rename all TCA9546A related files to TCA954x. Keep ti,tca9546a and ti,tca9546a-channel compatible for backward compatibility reasons. New tca954x-base binding embedding common properties, tca9546a binding inherits from it and define its own compatibles fields. Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-12-06 15:59:40 +01:00
/drivers/i2c/*tca954x* @kurddt
MAINTAINER: change microchip maintainer Change maintainer from scottwcpg to jvasanth1 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-04 12:42:39 -05:00
/drivers/*/*xec* @franciscomunoz @albertofloyd @sjvasanth1
CODEOWNERS: MAINTAINERS: Add entry for w1 support Add entries for w1 doc, api, drivers, and tests in the CODEOWNERS as well as the MAINTAINERS file. Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-08 14:15:29 +02:00
/drivers/w1/ @str4t0m
drivers/watchdog: Add support for SiLabs Gecko Watchdog Watchdog type is found on e.g. Pearl/Jade Gecko, often more than 1 is present. Driver supports timeout and (minimum) window configuration and reset or timeout interrupt support for now. Signed-off-by: Oane Kingma <o.kingma@interay.com>
2019-11-04 16:08:24 +01:00
/drivers/watchdog/*gecko* @oanerer
drivers: watchdog: implement SiFive FE310 watchdog driver This patch adds watchdog driver for HiFive1 rev.B that has SiFive Freedom E310 SoC. Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2020-11-28 23:02:03 +09:00
/drivers/watchdog/*sifive* @katsuster
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/drivers/watchdog/wdt_handlers.c @dcpleung @nashif
drivers: watchdog: cc32xx: Add support Impelement watchdog for ti_cc32xx family Signed-off-by: Pavlo Hamov <pasha.gamov@gmail.com>
2021-02-17 17:07:08 +02:00
/drivers/watchdog/*cc32xx* @pavlohamov
ITE driver/watchdog: add watchdog timer for it8xxx2 Add watchdog timer for it8xxx2. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
2021-01-20 15:29:19 +08:00
/drivers/watchdog/wdt_ite_it8xxx2.c @RuibinChang
/drivers/watchdog/Kconfig.it8xxx2 @RuibinChang
drivers: watchdog: Add software watchdog based on counter Added watchdog implementation which is using counter device to implement watchdog driver API. Watchdog timeout is called from counter interrupt context. Some counter implementations support using ZLI interrupt level which can be use here as well. Watchdog like this can be used along hardware watchdog to cover for its limitations, i.e. Nordic watchdog resets unconditionally after 62uS after triggering watchdog interrupt. It is not enough time to dump logging data. Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-10-22 13:12:43 +02:00
/drivers/watchdog/wdt_counter.c @nordic-krch
drivers: watchdog: Add Raspberry Pi Pico watchdog driver This adds basic support for the watchdog timer on the RP2040 MCU and Raspberry Pi Pico development board Signed-off-by: Jamie McCrae <spam@helper3000.net>
2022-03-02 22:47:25 +00:00
/drivers/watchdog/*rpi_pico* @thedjnK
drivers: watchdog: Add a new driver for Synopsys DesignWare watchdog This commit adds a base version of the driver for Synopsys DesignWare watchdog. Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2022-12-19 15:00:14 +01:00
/drivers/watchdog/*dw* @softwarecki
drivers: watchdog: Driver for Infineon watchdog Initial version of the driver for Infineon CAT1 devices Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2023-05-05 16:57:21 -07:00
/drivers/watchdog/*ifx* @sreeramIfx
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/drivers/wifi/ @rlubos @tbursztyka
drivers: wifi: esp_at: rename driver from esp Recently WiFi ESP32 driver (utilizing WiFi radio in ESP32 SoC) was introduced into drivers/wifi/esp32/ and it already caused confusion as there was existing drivers/wifi/esp/ directory for ESP-AT driver (utilizing external WiFi chip, by communicating using AT commands from any serial capable platform). So question has arisen whether it is good to merge both, while they are totally different drivers. Rename ESP-AT driver to be placed in drivers/wifi/esp_at/, so that it is easier to figure out difference between "esp32" and "esp_at" just by looking at driver name. Rename also DT compatible and all Kconfig options for the same reason. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-05-06 10:51:46 +02:00
/drivers/wifi/esp_at/ @mniestroj
drivers: wifi: eswifi: Add uart bus interface Add uart bus interface to extended esWIFI driver. This enables all Inventek modules with IWIN AT Commands firmware. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-10-22 21:23:49 -03:00
/drivers/wifi/eswifi/ @loicpoulain @nandojve
codeowners: Add myself to winc1500 Add myself as code owner for winc1500 driver. Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
2020-10-08 10:38:09 +02:00
/drivers/wifi/winc1500/ @kludentwo
CODEOWNERS: Adding /drivers/virtualization owner Adding myself there. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-12-16 16:11:07 +01:00
/drivers/virtualization/ @tbursztyka
xenvm: drivers: serial: Implement serial interface to Xen PV console This commit adds minimal support of Xen hypervisor console via UART-like driver. Implementation allows to use poll_in/poll_out char interface for uart_console.c driver directly to HV console instead of using Xen virtual PL011 UART. Future implementation will support interrupt driven interface on Xen event channels, currently it is under development. Also this commit introduces early console_io Xen interface, which allows to receive printk/stdout messages quickly after start, but requires Xen, built with CONFIG_DEBUG option. Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2021-07-02 11:31:56 +03:00
/drivers/xen/ @lorc @firscity
CODEOWNERS: Add evgeniy-paltsev as an ARC part owner Add @evgeniy-paltsev as an ARC part owner in addition to @abrodkin and @ruuddw, so he will be chosen as a reviewer automatically. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-22 19:46:53 +03:00
/dts/arc/ @abrodkin @ruuddw @iriszzw @evgeniy-paltsev
dts: arm: s76s: add AcSIP S76S SiP support The AcSIP S76S is a STM32L073+SX1276+PA SoC which supports LoRa communications. Signed-off-by: Dean Weiten <dmw@weiten.com>
2021-01-27 22:54:09 -06:00
/dts/arm/acsip/ @NorthernDean
soc: arm: Add Aspeed ast10x0 series support Aspeed ast10x0 series SoCs contain a ARM Cortex-M4F processor. This processor operates at 200MHz and executes on SRAM. This patch adds support for ast1030 as the first SoC of this series which is targeted but not limited at the bridge IC in a server system. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Change-Id: I668af1ff8a36a05da791c3329ae08f5ae712bdd4
2021-11-26 17:21:31 +08:00
/dts/arm/aspeed/ @aspeeddylan
CODEOWNERS: add owner for the same4 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-11-04 19:43:05 -03:00
/dts/arm/atmel/sam4e* @nandojve
dts: arm: atmel: Introduce sam4l SoC Introduce SAM4L SoC device tree definitions. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-18 18:04:45 -03:00
/dts/arm/atmel/sam4l* @nandojve
CODEOWNERS: Add code ownership for Atmel samr21 code Take ownership of external SDK files. Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2019-03-05 19:26:41 +01:00
/dts/arm/atmel/samr21.dtsi @benpicco
soc: atmel_sam0: Add SAME54 This adds supoprt for the Atmel SAME54 SoC. The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts. Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2019-03-14 15:18:59 +01:00
/dts/arm/atmel/sam*5*.dtsi @benpicco
CODEOWNERS: Add SAM E70 code owner Add @nandojve, the SAM V71 platform maintainer, as a code owner for the SAM E70 platform, as these two platforms share the same base and are practically identical. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-24 16:40:45 +09:00
/dts/arm/atmel/same70* @nandojve
CODEOWNERS: add owner for the samv71 platform Add recent collaborator as codeowner. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-12-11 22:50:06 -03:00
/dts/arm/atmel/samv71* @nandojve
dts: atmel sam: Add pinctrl support for SAM UART and USART Add pinctl support for the SAM UART and SAM USART devices. We update the UART and USART bindings to have pinctrl-0 bindings that are expected to have 2 phandles to the RX & TX pinctrl nodes. The pinctrl nodes will have an 'atmel,pins' property that describes the GPIO port, pin and periphal configuration for that pin. We add sam*-pinctrl.dtsi files with all the various pin ctrl configuration operations supported by the given SoC family. These files are based on data extracted from the Atmel ASF HAL (in include/sam<FAMILY>/pio/*.h). Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-07 08:19:32 -05:00
/dts/arm/atmel/ @galak
arm: Add Broadcom Valkyrie SoC support Add initial support for Broadcom Valkyrie SoC as part of Zephyr. Signed-off-by: Scott Branden <scott.branden@broadcom.com>
2020-01-08 13:18:10 -08:00
/dts/arm/broadcom/ @sbranden
CODEOWNERS: Update codeowners for Infineon/Cypress sources - Add Ian Fyall (@ifyall) as codeowner for Infineon/Cypress sources. - Add Nazar Palamar (@npal-cy) as codeowner for Infineon/Cypress sources. - Remove Gerson Fernando Budke (@nandojve) from codeowner of Cypress sources. Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2022-03-25 11:54:07 +02:00
/dts/arm/cypress/ @ifyall @npal-cy
CODEOWNERS: Add nandojve for gigadevices Add myself as codeowners for GigaDevice related files. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-09-19 14:29:24 -03:00
/dts/arm/gigadevice/ @nandojve
CODEOWNERS: Update codeowners for Infineon/Cypress sources - Add Ian Fyall (@ifyall) as codeowner for Infineon/Cypress sources. - Add Nazar Palamar (@npal-cy) as codeowner for Infineon/Cypress sources. - Remove Gerson Fernando Budke (@nandojve) from codeowner of Cypress sources. Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2022-03-25 11:54:07 +02:00
/dts/arm/infineon/xmc4* @parthitce @ifyall @npal-cy
/dts/arm/infineon/psoc6/ @ifyall @npal-cy
arm/arm64: Fix misc and trivials for ARM/ARM64 split Fix the header guards, comments, github labeler, CODEOWNERS and MAINTAINERS files. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-26 15:22:59 +01:00
/dts/arm64/ @carlocaione
dts: arm64: Add dtsi and dts binding for cortex-R82 Add armv8-r dtsi. Add dts binding yaml file for cortex-R82. Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2020-11-24 13:37:22 +08:00
/dts/arm64/armv8-r.dtsi @povergoing
CODEOWNERS: Update the CODEOWNERS This is to update the CODEOWNERS file and to add owner for these two directories 1) /soc/arm64/intel_socfpga 2) /dts/arm64/intel/*intel_socfpga* Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
2022-06-22 15:43:23 +08:00
/dts/arm64/intel/*intel_socfpga* @siclim
board: nxp_ls1046ardb: add 2 cores smp for running in Jailhouse 1. add a seperate 2 cores SMP board configuration to run in Jailhouse inmate Cell, root Cell Linux will use Core0 and Core1, Zephyr will run on Core2 and Core3. 2. Refine the code of dts, move SoC common dts nodes into dtsi fiel in dts/arm64/nxp/ directory. 3. Add myself to be code owner of directory dts/arm64/nxp/. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-04-20 11:48:00 +08:00
/dts/arm64/nxp/ @JiafeiPan
MAINTAINERS: update CODEOWNERS and MAINTAINERS.yml This commit updates the outdated entries of CODEWONERS and MAINAINERS.yml files. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-08-09 09:59:23 +02:00
/dts/arm/quicklogic/ @fkokosinski @kgugala
dts: arm: introduce seeed lora-e5 module This commit adds the dts definitons for the seeed lora-e5 module. Additionally I add myself as codeowner for the new dts/arm/seeed directory. This module packages a stm32wle5jc Sub-GHz Wireless Soc, together with a 32MHz TCXO, a 32.768KHz crystal oscillator, and power and RF circuitry. With the introduction of lora support definitions for the radio will be added in a future commit. Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-06-29 15:25:27 +02:00
/dts/arm/seeed/ @str4t0m
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/dts/arm/st/ @erwango
CODEOWNERS: Add codeowner for TI CC13x2 / CC26x2 files Add myself as codeowner for TI CC13x2 / CC26x2 related files. Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2019-05-03 11:47:13 -05:00
/dts/arm/ti/cc13?2* @bwitherspoon
/dts/arm/ti/cc26?2* @bwitherspoon
dts: arm: add device tree file for TI CC3235SF This dtsi file adds definitions for memory regions on the SoC. Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-04-25 15:37:55 -07:00
/dts/arm/ti/cc3235* @vanti
MAINTAINERS: remove maintainer-ship status for ioannisg Removing maintainer and/or collaborator status on - nRF platforms - TF-M - userspace - cmsis-dsp - MAINTAINERS file for ioannisg. Replace with @anangl or others, where applicable. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-16 16:18:09 +01:00
/dts/arm/nordic/ @anangl @carlescufi
CODEOWNERS: remove the inactive code owner WealianLiao is unable to support Zephyr for npcx chip for the foreseeable future. Remove him from the CODEOWNERS file. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-08-26 11:36:43 +08:00
/dts/arm/nuvoton/ @ssekar15 @MulinChao @ChiHuaL
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 09:23:57 -05:00
/dts/arm/nxp/ @mmahadevan108 @dleach02
codeowners: add owner for NXP S32 platforms Add ownership to NXP S32 platform related files. Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-08-07 05:00:25 +07:00
/dts/arm/nxp/nxp_s32* @manuargue
MAINTAINER: change microchip maintainer Change maintainer from scottwcpg to jvasanth1 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-04 12:42:39 -05:00
/dts/arm/microchip/ @franciscomunoz @albertofloyd @sjvasanth1
soc: Added support for Raspberry Pi's RP2040 SoC Added basic support for the RP2040 SoC. Support includes booting and starting the kernel, on one core only. Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com> Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-29 23:51:48 +02:00
/dts/arm/rpi_pico/ @yonsch
soc: silabs_exx32: Add support for SiLabs EFM32PG1B SoC This commit adds support for Silicon Labs EFM32PG1B (Pearl Gecko) SoC. Signed-off-by: Rafael Dias Menezes <rdmeneze@gmail.com>
2021-01-09 14:14:16 +01:00
/dts/arm/silabs/efm32_pg_1b.dtsi @rdmeneze
boards/arm: Add initial support for SiLabs Giant Gecko GG11 STK This commit adds initial support for the Silicon Labs EFM32 Giant Gecko GG11 StarterKit. Features supported for now are NVIC, SysTick, GPIO, Flash, Counter, I2C, UART and Ethernet. Support for Watchdog and ADC will follow as soon as their respective PRs are merged. Signed-off-by: Oane Kingma <o.kingma@interay.com>
2019-11-29 21:32:13 +01:00
/dts/arm/silabs/efm32gg11b* @oanerer
soc: silabs_exx32: Add support for SiLabs EFR32BG13P SoC This commit adds support for Silicon Labs EFR32BG13P (Blue Gecko) SoC. Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-01-26 22:37:50 +01:00
/dts/arm/silabs/efr32bg13p* @mnkp
soc: silabs_exx32: Add support for SiLabs EFR32BG22 SoC This commit adds support for Silicon Labs EFR32BG22 SoC. Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com> Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-09-07 11:06:30 +02:00
/dts/arm/silabs/efr32bg22* @kgugala @fkokosinski @pczarnecki
soc: silabs_exx32: Add support for EFR32FG13P SoC This commit adds support for Silicon Labs EFR32FG13P (Flex Gecko) SoC. Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2021-03-15 23:52:53 +02:00
/dts/arm/silabs/efr32xg13p* @mnkp
soc: silabs_exx32: Add support for SiLabs EFM32PG1B SoC This commit adds support for Silicon Labs EFM32PG1B (Pearl Gecko) SoC. Signed-off-by: Rafael Dias Menezes <rdmeneze@gmail.com>
2021-01-09 14:14:16 +01:00
/dts/arm/silabs/efm32pg1b* @rdmeneze
soc: silabs_exx32: Add support for SiLabs EFR32MG21 SoC This commit adds support for Silicon Labs EFR32MG21 (Mighty Gecko) SoC. Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
2020-07-13 17:31:19 +02:00
/dts/arm/silabs/efr32mg21* @l-alfred
soc: silabs_exx32: Add support for EFR32FG13P SoC This commit adds support for Silicon Labs EFR32FG13P (Flex Gecko) SoC. Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2021-03-15 23:52:53 +02:00
/dts/arm/silabs/efr32fg13* @yonsch
MAINTAINERS/CODEOWNERS: Remove nategraff-sifive Nate hasn't been active for some time and its my understanding that Nate is no longer at SiFive. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-26 11:35:27 -06:00
/dts/riscv/ @kgugala @pgielda
dts: riscv: ite: Move SoC devicetree includes under a vendor directory Cleans up SoC devicetree include file locations to follow the convention of dts/<arch>/<vendor>/ Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2022-04-29 15:03:31 -05:00
/dts/riscv/ite/ @ite
treewide: rename Microsemi to Microchip Do a treewide Microsemi to Microchip rename and update obsolete links in the board docs. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2023-04-28 14:37:21 +02:00
/dts/riscv/microchip/microchip-miv.dtsi @galak
CODEOWNERS: Fix issues reported by check_compliance.py Fix issues with paths, files removed, etc in CODEOWNERS reported by check_compliance.py Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-13 16:56:10 -05:00
/dts/riscv/openisa/rv32m1* @dleach02
riscv32: rename to riscv With the upcoming riscv64 support, it is best to use "riscv" as the subdirectory name and common symbols as riscv32 and riscv64 support code is almost identical. Then later decide whether 32-bit or 64-bit compilation is wanted. Redirects for the web documentation are also included. Then zephyrbot complained about this: " New files added that are not covered in CODEOWNERS: dts/riscv/microsemi-miv.dtsi dts/riscv/riscv32-fe310.dtsi Please add one or more entries in the CODEOWNERS file to cover those files " So I assigned them to those who created them. Feel free to readjust as necessary. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-07-17 13:17:05 -04:00
/dts/riscv/riscv32-litex-vexriscv.dtsi @mateusz-holenko @kgugala @pgielda
boards: risc-v: add BeagleV Starlight JH7100 board support Adding support for beagleV Starlight board based on Starfive JH7100 SoC. It's a base support, no drivers other than uart has been tested. Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal49@gmail.com>
2021-05-18 01:57:18 +01:00
/dts/riscv/starfive/ @rajnesh-kanwal
CODEOWNERS: Fix issues reported by check_compliance.py Fix issues with paths, files removed, etc in CODEOWNERS reported by check_compliance.py Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-13 16:56:10 -05:00
/dts/riscv/andes/andes_v5* @cwshu @kevinwang821020 @jimmyzhe
codeowners: Add code owner for INTEL FPGA Nios V/g Add code owner for INTEL FPGA Nios V/g dts, SoC and board. Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
2023-06-08 10:39:21 +08:00
/dts/riscv/niosv/ @sweeaun
arch: arm: Add initial support for Cortex-M55 Core Add initial support for the Cortex-M55 Core which is an implementation of the Armv8.1-M mainline architecture and includes support for the M‑profile Vector Extension (MVE). The support is based on the Cortex-M33 support that already exists in Zephyr. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-13 15:07:37 -06:00
/dts/arm/armv*m.dtsi @galak @ioannisg
soc: arm: dts: arm: xilinx: Zynq-7000 SoC init code, device tree data Add SoC-specific code, the basic device tree and Kconfig data as well as the corresponding linker command file for the Xilinx Zynq-7000 family of SoCs. This SoC - either as a QEMU simulation or on actual hardware such as the Avnet/Digilent ZedBoard - is suitable as an ini- tial target for the ARMv7 Cortex-A support. Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-07-15 13:05:54 +02:00
/dts/arm/armv7-a.dtsi @ibirnbaum
CODEOWNERS: Add Cortex-R arch codeowner Add @stephanosio as a code owner for the Cortex-R architecture-related directories and files. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 17:28:21 +09:00
/dts/arm/armv7-r.dtsi @bbolen @stephanosio
CODEOWNERS: Add Xilinx ZynqMP platform codeowner Add @stephanosio as a code owner for the Xilinx ZynqMP platform, which is used as the primary testing platform for the Cortex-R architecture. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-12 17:35:44 +09:00
/dts/arm/xilinx/ @bbolen @stephanosio
MAINTAINERS: add maintainers for Renesas R-Car platform Update codeowners. Add maintainers. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-12-02 10:21:44 +01:00
/dts/arm/renesas/ @aaillet @pmarzin
CODEOWNERS: Add missing x86 entries Add a new entry for x86 DTS files and add Johan to x86 architecture changes. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2020-12-10 21:07:32 +02:00
/dts/x86/ @jhedberg
dts: Restructure xtensa dts directory Restructure xtensa dts directory Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-16 14:17:06 +03:00
/dts/xtensa/xtensa.dtsi @ydamigos
CODEOWNERS: Add @dcpleung as owner for /dts/xtensa/intel/ Add Daniel Leung as code owner for all Intel xtensa dts files. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2019-12-20 13:26:33 +02:00
/dts/xtensa/intel/ @dcpleung
CODEOWNERS: update ESP32 source files ownership glaubermaroto is no longer maintaining this sources. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-05-11 11:48:24 -03:00
/dts/xtensa/espressif/ @sylvioalves
CODEOWNERS: add codeowner for SOF with Zephyr on NXP i.MX8 Add myself and Daniel Baluta as codeowners for i.MX8 related files for SOF with Zephyr OS. Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-07-05 19:11:35 +03:00
/dts/xtensa/nxp/ @iuliana-prodan @dbaluta
MAINTAINERS: Add new collaborator and code owner for SPARC and LEON Add @julius-barendt as collaborator and code owner for areas related to SPARC and LEON. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2022-06-22 10:50:58 +02:00
/dts/sparc/ @julius-barendt
CODEOWNERS: add owner for /dts/bindings/ @galak is now the proud owner of /dts/bindings/. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-03-28 09:13:40 -04:00
/dts/bindings/ @galak
CODEOWNERS: add myself as additional codeowner for CAN Add myself as additional codeowner for the various CAN driver and subsystem components. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-02-25 09:15:00 +01:00
/dts/bindings/can/ @alexanderwachter @henrikbrixandersen
dts: bindings: fix file names Make sure binding file names match their compatibles. Done with a script. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-10-19 09:39:01 -07:00
/dts/bindings/i2c/zephyr*i2c-emul*.yaml @sjg20
dts: bindings: move ADC devicetree bindings to top level Move the devicetree bindings for Analog-to-Digital Converters (ADCs) from dts/bindings/iio/adc to dts/bindings/adc as Zephyr does not have an IIO layer. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-09-21 11:34:52 +02:00
/dts/bindings/adc/st*stm32-adc.yaml @cybertale
CODEOWNERS: Replace @LairdCP/zephyr group Groups do not work well for CODEOWNERS. Replace LairdCP group with myself. Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2022-06-06 11:11:44 -07:00
/dts/bindings/modem/*hl7800.yaml @rerickson1
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/dts/bindings/serial/ns16550.yaml @dcpleung @nashif
drivers: wifi: esp_at: rename driver from esp Recently WiFi ESP32 driver (utilizing WiFi radio in ESP32 SoC) was introduced into drivers/wifi/esp32/ and it already caused confusion as there was existing drivers/wifi/esp/ directory for ESP-AT driver (utilizing external WiFi chip, by communicating using AT commands from any serial capable platform). So question has arisen whether it is good to merge both, while they are totally different drivers. Rename ESP-AT driver to be placed in drivers/wifi/esp_at/, so that it is easier to figure out difference between "esp32" and "esp_at" just by looking at driver name. Rename also DT compatible and all Kconfig options for the same reason. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-05-06 10:51:46 +02:00
/dts/bindings/wifi/*esp-at.yaml @mniestroj
CODEOWNERS: Add nandojve for gigadevices Add myself as codeowners for GigaDevice related files. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-09-19 14:29:24 -03:00
/dts/bindings/*/*gd32* @nandojve
CODEOWNERS: remove the inactive code owner WealianLiao is unable to support Zephyr for npcx chip for the foreseeable future. Remove him from the CODEOWNERS file. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-08-26 11:36:43 +08:00
/dts/bindings/*/*npcx* @MulinChao @ChiHuaL
CODEOWNERS: Update codeowners for Infineon/Cypress sources - Add Ian Fyall (@ifyall) as codeowner for Infineon/Cypress sources. - Add Nazar Palamar (@npal-cy) as codeowner for Infineon/Cypress sources. - Remove Gerson Fernando Budke (@nandojve) from codeowner of Cypress sources. Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2022-03-25 11:54:07 +02:00
/dts/bindings/*/*psoc6* @ifyall @npal-cy
/dts/bindings/*/*infineon*cat1* @ifyall @npal-cy
dts: nrf: Temp device node added to nRF5 devices with yaml binding 1. Temp device node added to all nRF5 DTSI files. 2. Added yaml binding for Nordic Temp node. 3. Set codeowner of nordic dts bindings to @anangl Signed-off-by: Gaute Gamnes <gaute.gamnes@nordicsemi.no>
2019-02-14 09:44:04 +01:00
/dts/bindings/*/nordic* @anangl
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 09:23:57 -05:00
/dts/bindings/*/nxp* @mmahadevan108 @dleach02
codeowners: add owner for NXP S32 platforms Add ownership to NXP S32 platform related files. Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-08-07 05:00:25 +07:00
/dts/bindings/*/nxp*s32* @manuargue
MAINTAINERS: Update NXP platforms maintainer Maureen Helm is moving on from NXP so moving David Leach to NXP platforms maintainer. Signed-off-by: David Leach <david.leach@nxp.com>
2021-09-17 09:23:57 -05:00
/dts/bindings/*/openisa* @dleach02
drivers: pinctrl: Added pinctrl driver for RPi Pico Added a pinctrl driver for the Raspberry Pi Pico series Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2021-11-30 00:29:09 +02:00
/dts/bindings/*/raspberrypi*pico* @yonsch
CODEOWNERS: remove use of commas Commas are not allowed in this file and prevents parsing by github. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 15:27:44 -04:00
/dts/bindings/*/st* @erwango
/dts/bindings/sensor/ams* @alexanderwachter
MAINTAINERS/CODEOWNERS: Remove nategraff-sifive Nate hasn't been active for some time and its my understanding that Nate is no longer at SiFive. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-26 11:35:27 -06:00
/dts/bindings/*/sifive* @mateusz-holenko @kgugala @pgielda
drivers: serial: add LiteUART driver Add LiteX UART driver with bindings for this device. Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-03-28 14:37:03 +01:00
/dts/bindings/*/litex* @mateusz-holenko @kgugala @pgielda
drivers: interrupt_controller: add LiteX interrupt controller driver Add LiteX interrupt controller driver and bindings for this device. Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-03-28 14:44:12 +01:00
/dts/bindings/*/vexriscv* @mateusz-holenko @kgugala @pgielda
codeowners: update codeowners of andes_v5 SoC series Add Andes developers, kevinwang821020 and jimmyzhe as reviewers for andes_v5 soc, board, dts, and drivers. Remove Teng-Shih-Wei from reviewers because he doesn't maintain Zephyr RTOS currently. Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-11-12 09:55:05 +08:00
/dts/bindings/*/andes* @cwshu @kevinwang821020 @jimmyzhe
CODEOWNERS: take ownership of neorv32 specific files Take ownership of all the neorv32 specific files (dts bindings, soc implementation, drivers, and board definition). Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-08-26 19:57:56 +02:00
/dts/bindings/*/neorv32* @henrikbrixandersen
CODEOWNER: Add code owner for the smsc91x driver Add code owner for the smsc91x driver Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2023-03-16 15:37:06 +08:00
/dts/bindings/*/*lan91c111* @sgrrzhf
drivers: i3c: introduce I3C API for controllers This introduces the I3C API for I3C controllers. Currently, this supports one controller per bus under Zephyr. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-07-18 13:21:12 -07:00
/dts/bindings/i3c/ @dcpleung
aarch64: pm_cpu_ops: Introduce pm_cpu_ops subsystem AArch64 has support for PSCI. This is especially useful for SMP because PSCI is used to power on the secordary cores. When the PSCI driver was introduced in Zephyr it was designed to rely on a very PSCI-centric subsystem / interface. There are two kinds of problems with this choice: 1. PSCI is only defined for the non-secure world and it is designed to boot CPU cores into non-secure state (that means that PSCI is only supposed to work if Zephyr is running in non-secure state) 2. There can be other ways or standards used to start / stop a core different from PSCI This patch is trying to fix the original wrong assumption by making the interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI only as an actual driver that is a user of this new interface / subsystem. For now the new subsystem is only exposing two methods: cpu_on and cpu_off, others will probably follow according to the needs. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-01 08:57:15 +01:00
/dts/bindings/pm_cpu_ops/* @carlocaione
CODEOWNERS: add code owner for Xilinx GEM driver Add the code owner entries for all files related to the Xilinx GEM Ethernet device driver. Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-06-23 17:13:00 +02:00
/dts/bindings/ethernet/*gem.yaml @ibirnbaum
CODEOWNERS: Add self as PT6314 maintainer Add myself as PT6314 maintainer. Signed-off-by: Chen Xingyu <hi@xingrz.me>
2023-06-24 23:32:25 +08:00
/dts/bindings/auxdisplay/*pt6314.yaml @xingrz
CODEOWNERS: Add self as aux display maintainer Add myself as auxiliary display maintainer. Signed-off-by: Jamie McCrae <spam@helper3000.net>
2022-11-29 21:38:15 +00:00
/dts/bindings/auxdisplay/* @thedjnK
CODEOWNERS: Removed vanwinkeljan Removed vanwinkeljan as codeowner from: * drivers/display * dts/posix * include/drivers/display.h * include/display * lib/gui * samples/subsys/display * samples/drivers/display * subsys/cpp * subsys/debug/asan_hacks.c * subsys/fs/fuse_fs_access.c Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2022-02-20 20:28:36 +01:00
/dts/posix/ @aescolar @daor-oti
dts : bindings : sensor : bme680 Added support for BME680 Added support to the dts for the BME680 Environmental sensor Signed-off-by: Bosch Sensortec <github@bosch-sensortec.com>
2018-09-27 19:16:44 +02:00
/dts/bindings/sensor/*bme680* @BoschSensortec
CODEOWNERS: Add bbilas for INA23X driver Add myself as codeowners for INA23X driver files. Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-12-05 11:35:02 +01:00
/dts/bindings/sensor/*ina23* @bbilas
CODEWONERS: syntax fix: Remove comma A comma was added to a new path in 9dbdd81abe22dcbc671ea066cfdfc041d71f3c83 But GitHub's CODEOWNERS parsing cannot handle commas in paths => Remove it Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-07-04 08:56:57 +02:00
/dts/bindings/sensor/st* @avisconti
CODEOWNERS: Add code owners for Sensing Subsystem Add lixuzha, ghu0510, qianruh for the Sensor Subsystem. Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
2023-04-11 13:04:49 +08:00
/dts/bindings/sensor/zephyr,sensing.yaml @lixuzha @ghu0510 @qianruh
/dts/bindings/sensor/zephyr,sensing*.yaml @lixuzha @ghu0510 @qianruh
smbus: Update CODEOWNERS and MAINTAINERS files Update CODEOWNERS and MAINTAINERS files. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-10-03 12:01:15 +03:00
/dts/bindings/smbus/ @finikorg
CODEOWNER: Add code owner for sip_svc subsystem Add code owner for svc driver,sip_svc subsystem and sip_svc sample application Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
2023-03-17 08:01:46 +00:00
/dts/bindings/sip_svc/ @maheshraotm
codeowners: Add code owner for INTEL FPGA NIOSV Add code owner for INTEL FPGA NIOSV dts, SoC and board. Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
2023-02-03 15:16:04 +08:00
/dts/bindings/cpu/intel,niosv.yaml @sweeaun
CODEOWNERS: Add code owners for Intel Agilex5 platform drivers Code owners for all the required Intel Agilex5 platform drivers. Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-06 15:07:44 +00:00
/dts/bindings/reset/intel,socfpga-reset.yaml @nbalabak
CODEOWNERS: Add code owner for dts/common Add @galak as codeowner for dts/common Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-20 18:44:00 +02:00
/dts/common/ @galak
CODEOWNERS: update file with new locations Adapt file to the new location of headers files in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 06:53:50 -04:00
/include/ @nashif @carlescufi @galak @MaureenHelm
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/drivers/*/*litex* @mateusz-holenko @kgugala @pgielda
/include/zephyr/drivers/adc.h @anangl
CODEOWNERS: Add self as aux display maintainer Add myself as auxiliary display maintainer. Signed-off-by: Jamie McCrae <spam@helper3000.net>
2022-11-29 21:38:15 +00:00
/include/zephyr/drivers/auxdisplay.h @thedjnK
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/drivers/can.h @alexanderwachter @henrikbrixandersen
/include/zephyr/drivers/can/ @alexanderwachter @henrikbrixandersen
/include/zephyr/drivers/counter.h @nordic-krch
/include/zephyr/drivers/dac.h @martinjaeger
/include/zephyr/drivers/espi.h @albertofloyd @franciscomunoz @sjvasanth1
/include/zephyr/drivers/bluetooth/ @alwa-nordic @jhedberg @Vudentz
CODEOWNERS: Remove Andrzej Puzdrowski from most maintainerships Andrzej is no longer involved directly in Zephyr, but remains connected to the MCUboot project. Replace his maintainership with either other people from Nordic or leave the subsystem "orphaned" (i.e. labeled as odd fixes). Also add @nordicjm to the SMP/MCUmgr maintainership, as he is already an SMP/MCUmgr collaborator. Finally, removed @aunsbjerg from mcumgr path maintainership, since he's already assigned to the UDP platform implementation, which is what he is an owner of. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-10-18 11:56:28 +02:00
/include/zephyr/drivers/flash.h @nashif @carlescufi @galak @MaureenHelm @de-nordic
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/drivers/i2c_emul.h @sjg20
drivers: i3c: introduce I3C API for controllers This introduces the I3C API for I3C controllers. Currently, this supports one controller per bus under Zephyr. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-07-18 13:21:12 -07:00
/include/zephyr/drivers/i3c.h @dcpleung
/include/zephyr/drivers/i3c/ @dcpleung
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/drivers/led/ht16k33.h @henrikbrixandersen
/include/zephyr/drivers/interrupt_controller/ @dcpleung @nashif
/include/zephyr/drivers/interrupt_controller/gic.h @stephanosio
CODEOWNERS: Replace @LairdCP/zephyr group Groups do not work well for CODEOWNERS. Replace LairdCP group with myself. Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2022-06-06 11:11:44 -07:00
/include/zephyr/drivers/modem/hl7800.h @rerickson1
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/drivers/pcie/ @dcpleung
/include/zephyr/drivers/hwinfo.h @alexanderwachter
/include/zephyr/drivers/led.h @Mani-Sadhasivam
MAINTAINERS: move to my ampere account I'm using a new account now. Do the corresponding CODEOWNERS change just for consistency as well. Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
2023-07-28 13:41:14 -07:00
/include/zephyr/drivers/led_strip.h @mbolivar-ampere
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/drivers/sensor.h @MaureenHelm
smbus: Update CODEOWNERS and MAINTAINERS files Update CODEOWNERS and MAINTAINERS files. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-10-03 12:01:15 +03:00
/include/zephyr/drivers/smbus.h @finikorg
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/drivers/spi.h @tbursztyka
CODEOWNER: Add code owner for sip_svc subsystem Add code owner for svc driver,sip_svc subsystem and sip_svc sample application Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
2023-03-17 08:01:46 +00:00
/include/zephyr/drivers/sip_svc/ @maheshraotm
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/drivers/lora.h @Mani-Sadhasivam
/include/zephyr/drivers/peci.h @albertofloyd @franciscomunoz @sjvasanth1
/include/zephyr/drivers/pm_cpu_ops.h @carlocaione
/include/zephyr/drivers/pm_cpu_ops/ @carlocaione
CODEOWNERS: Fix issues reported by check_compliance.py Fix issues with paths, files removed, etc in CODEOWNERS reported by check_compliance.py Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-13 16:56:10 -05:00
/include/zephyr/drivers/w1.h @str4t0m
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/app_memory/ @dcpleung
/include/zephyr/arch/arc/ @abrodkin @ruuddw @evgeniy-paltsev
/include/zephyr/arch/arc/arch.h @abrodkin @ruuddw @evgeniy-paltsev
/include/zephyr/arch/arc/v2/irq.h @abrodkin @ruuddw @evgeniy-paltsev
/include/zephyr/arch/arm/aarch32/ @MaureenHelm @galak @ioannisg
/include/zephyr/arch/arm/aarch32/cortex_a_r/ @stephanosio
/include/zephyr/arch/arm64/ @carlocaione
/include/zephyr/arch/arm64/cortex_r/ @povergoing
/include/zephyr/arch/arm/aarch32/irq.h @carlocaione
/include/zephyr/arch/mips/ @frantony
/include/zephyr/arch/nios2/ @nashif
/include/zephyr/arch/nios2/arch.h @nashif
/include/zephyr/arch/posix/ @aescolar @daor-oti
/include/zephyr/arch/riscv/ @kgugala @pgielda
/include/zephyr/arch/x86/ @jhedberg @dcpleung
/include/zephyr/arch/common/ @andyross @nashif
/include/zephyr/arch/xtensa/ @andyross @dcpleung
MAINTAINERS: Add new collaborator and code owner for SPARC and LEON Add @julius-barendt as collaborator and code owner for areas related to SPARC and LEON. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2022-06-22 10:50:58 +02:00
/include/zephyr/arch/sparc/ @julius-barendt
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/sys/atomic.h @andyross
CODEOWNERS: Add sjanc for Bluetooth host paths This will help with review process. Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
2022-05-20 16:37:25 +02:00
/include/zephyr/bluetooth/ @alwa-nordic @jhedberg @Vudentz @sjanc
CODEOWNERS: Remove asbjornsabo from BT Codeowners Asbjorn will not be as involved with Zephyr development anymore, so removing him as a codeowner. Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-09-26 14:44:14 +02:00
/include/zephyr/bluetooth/audio/ @jhedberg @Vudentz @Thalley
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/cache.h @carlocaione @andyross
/include/zephyr/canbus/ @alexanderwachter @henrikbrixandersen
/include/zephyr/tracing/ @nashif
/include/zephyr/debug/ @nashif
/include/zephyr/debug/coredump.h @dcpleung
/include/zephyr/debug/gdbstub.h @ceolin
/include/zephyr/device.h @tbursztyka @nashif
/include/zephyr/devicetree.h @galak
/include/zephyr/devicetree/can.h @henrikbrixandersen
/include/zephyr/dt-bindings/clock/kinetis_mcg.h @henrikbrixandersen
/include/zephyr/dt-bindings/clock/kinetis_scg.h @henrikbrixandersen
/include/zephyr/dt-bindings/ethernet/xlnx_gem.h @ibirnbaum
/include/zephyr/dt-bindings/pcie/ @dcpleung
CODEOWNERS: update ESP32 source files ownership glaubermaroto is no longer maintaining this sources. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-05-11 11:48:24 -03:00
/include/zephyr/dt-bindings/pinctrl/esp* @sylvioalves
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/dt-bindings/pwm/*it8xxx2* @RuibinChang
/include/zephyr/dt-bindings/usb/usb.h @galak
/include/zephyr/drivers/emul.h @sjg20
CODEOWNERS: Remove Andrzej Puzdrowski from most maintainerships Andrzej is no longer involved directly in Zephyr, but remains connected to the MCUboot project. Replace his maintainership with either other people from Nordic or leave the subsystem "orphaned" (i.e. labeled as odd fixes). Also add @nordicjm to the SMP/MCUmgr maintainership, as he is already an SMP/MCUmgr collaborator. Finally, removed @aunsbjerg from mcumgr path maintainership, since he's already assigned to the UDP platform implementation, which is what he is an owner of. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-10-18 11:56:28 +02:00
/include/zephyr/fs/ @nashif @de-nordic
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/init.h @nashif @andyross
/include/zephyr/irq.h @dcpleung @nashif @andyross
/include/zephyr/irq_offload.h @dcpleung @nashif @andyross
/include/zephyr/kernel.h @dcpleung @nashif @andyross
/include/zephyr/kernel_version.h @dcpleung @nashif @andyross
/include/zephyr/linker/app_smem*.ld @dcpleung @nashif
/include/zephyr/linker/ @dcpleung @nashif @andyross
/include/zephyr/logging/ @nordic-krch
/include/zephyr/lorawan/lorawan.h @Mani-Sadhasivam
/include/zephyr/mgmt/osdp.h @sidcha
MAINTAINERS: Make nordicjm maintainer for MCUmgr subsystem With significant contribution to MCUmgr that brought increased upload speeds and various other improvements in RAM and CPU usage, general improvements in MCUmgr architecture and documentation, Jamie has shown his vision for the subsystem and therefore lets welcome him as a new MCUmgr subsystem maintainer. Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2023-05-11 09:30:38 +00:00
/include/zephyr/mgmt/mcumgr/ @nordicjm
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/include/zephyr/net/ @rlubos @tbursztyka
/include/zephyr/net/buf.h @jhedberg @tbursztyka @rlubos
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/net/coap*.h @rlubos
/include/zephyr/net/lwm2m*.h @rlubos
/include/zephyr/net/mqtt.h @rlubos
CODEOWNERS, MAINTAINERS: Add entries for MQTT-SN This adds the files related to MQTT-SN, with an additional exlude to separate MQTT and MQTT-SN. Signed-off-by: René Beckmann <rene.beckmann@grandcentrix.net>
2022-10-30 15:24:21 +01:00
/include/zephyr/net/mqtt_sn.h @rlubos @BeckmaR
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/net/net_pkt_filter.h @npitre
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/include/zephyr/posix/ @cfreidt
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/pm/pm.h @nashif @ceolin
/include/zephyr/drivers/ptp_clock.h @tbursztyka
rtio: Real-Time Input/Output Stream A DMA friendly Stream API for zephyr. Based on ideas from io_uring and iio, a queue based API for I/O operations. Provides a pair of fixed length ringbuffer backed queues for submitting I/O requests and recieving I/O completions. The requests may be chained together to ensure the next operation does not start until the current one is complete. Requests target an abstract rtio_iodev which is expected to wrap all the hardware particulars of how to perform the operation. For example with a SPI bus device, a description of what a read, and write mean can be decided by the iodev wrapping a particular device hanging off of a SPI controller. The queue pair are submitted to an executor which may be a simple inplace looping executor done in the callers execution context (thread/stack) but other executors are expected. A threadpool executor might for example allow for concurrent request chains to execute in parallel. A DMA executor, in conjunction with DMA aware iodevs would allow for hardware offloading of operations going so far as to schedule with priority using hardware arbitration. Both the iodev and executor are definable by a particular SoC, meaning they can work in conjuction to perform IO operations using a particular DMA controller or methodology if desired. The application decides entirely how large the queues are, where the buffers to read/write come from (some executors may have particular demands!), and which executor to submit requests to. Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2019-06-26 10:17:18 -05:00
/include/zephyr/rtio/ @teburd
CODEOWNERS: Add code owners for Sensing Subsystem Add lixuzha, ghu0510, qianruh for the Sensor Subsystem. Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
2023-04-11 13:04:49 +08:00
/include/zephyr/sensing/ @lixuzha @ghu0510 @qianruh
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/shared_irq.h @dcpleung @nashif @andyross
/include/zephyr/shell/ @jakub-uC @nordic-krch
/include/zephyr/shell/shell_mqtt.h @ycsin
/include/zephyr/sw_isr_table.h @dcpleung @nashif @andyross
include: sd: Add SD specification definition SD specification definition required for SD host controller headers. Add header file with SD specification definitions. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-02-16 14:21:13 -06:00
/include/zephyr/sd/ @danieldegrasse
CODEOWNER: Add code owner for sip_svc subsystem Add code owner for svc driver,sip_svc subsystem and sip_svc sample application Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
2023-03-17 08:01:46 +00:00
/include/zephyr/sip_svc/ @maheshraotm
include: Prefix includes to use a scope Move include paths and add new target_include_directories to support backwards compatibility: * /include -> /include/zephyr example: <irq.h> -> <zephyr/irq.h> Issue #41543 Signed-off-by: Yuval Peress <peress@google.com>
2022-03-29 13:52:59 -06:00
/include/zephyr/sys_clock.h @dcpleung @nashif @andyross
/include/zephyr/sys/sys_io.h @dcpleung @nashif @andyross
/include/zephyr/sys/kobject.h @dcpleung @nashif
/include/zephyr/toolchain.h @dcpleung @andyross @nashif
/include/zephyr/toolchain/ @dcpleung @nashif @andyross
/include/zephyr/zephyr.h @dcpleung @nashif @andyross
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/kernel/ @dcpleung @nashif @andyross
CODEOWNERS: Add C++ library entry This commit adds a CODEOWNERS entry for the C++ library (previously called C++ subsystem) to appease the check_compliance.py. Note that we have not completely phased out the CODEOWNERS file yet and, until we do, the CODEOWNERS check in check_compliance.py should stay. Signed-off-by: Stephanos Ioannidis <stephanos.ioannidis@nordicsemi.no>
2022-12-12 19:51:24 +09:00
/lib/cpp/ @stephanosio
lib: smf: Add State Machine Framework Add an application agnostic State Machine Framework library to Zephyr that provides an easy way for developers to integrate state machines into their application. Twister passed: twister -T tests/lib/smf/ Signed-off-by: Sam Hurst <sbh1187@gmail.com>
2021-08-28 21:44:17 -07:00
/lib/smf/ @sambhurst
codeowners: add getopt library Add owner for newly created getopt library. Extend ownership of fnmatch library. Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2021-01-20 00:16:18 +01:00
/lib/util/ @carlescufi @jakub-uC
/lib/util/fnmatch/ @carlescufi @jakub-uC
lib: open-amp: add helper to add resource table in project The resource table is needed by the Linux kernel OS for a rpmsg generic support, but is also recognised by OpenAMP. This table allows to add trace based on the RAM console and to support rpmsg protocol. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-09-20 11:41:38 +02:00
/lib/open-amp/ @arnopo
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/lib/os/ @dcpleung @nashif @andyross
lib: cbprintf: add support for deferred formatting In applications like logging the call site where arguments to formatting are available may not be suitable for performing the formatting, e.g. when the output operation can sleep. Add API that supports capturing data that may be transient into a buffer that can be saved, and API that then produces the output later using the packaged arguments. [ Documentation and commit log from Peter Bigot. ] Signed-off-by: Nicolas Pitre <npitre@baylibre.com> Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-03-02 23:14:24 -05:00
/lib/os/cbprintf_packaged.c @npitre
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/lib/posix/ @cfriedt
CODEOWNERS: update getopt library location Getopt has been moved from /lib/utils to /lib/posix hence CODEOWNERS must be updated accordingly. Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2021-08-17 17:13:55 +02:00
/lib/posix/getopt/ @jakub-uC
codeowner: path updates path updates after moving directories. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-26 09:55:30 -04:00
/subsys/portability/ @nashif
CODEOWNERS: Add code owners for Sensing Subsystem Add lixuzha, ghu0510, qianruh for the Sensor Subsystem. Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
2023-04-11 13:04:49 +08:00
/subsys/sensing/ @lixuzha @ghu0510 @qianruh
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/lib/libc/ @nashif
CODEOWNERS: add owners for ARC MWDT libC layer Add condeowner for ARC MWDT libC layer files Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-08-26 17:55:50 +03:00
/lib/libc/arcmwdt/ @abrodkin @ruuddw @evgeniy-paltsev
cmake: only write devicetree files when there are changes. As part of #40167 is was discovered that devicetree headers are always generated when CMake re-runs. This causes all source files that directly or indirectly through included headers to recompile when CMake re-runs, even if there are no changes to devicetree. This commits introduces `zephyr_file_copy(...)` similar to `file(COPY_FILE ...)` from CMake 3.21. However, as CMake 3.20 is supported by Zephyr we need a zephyr variant of this function to allow usage with CMake 3.20. This ensures that only when there are changes to devicetree headers, then source files will recompile. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2022-02-07 12:53:09 +01:00
/misc/ @tejlmand
modules: move module kconfig to main tree Due to in-tree dependencies on Kconfig options defined in modules we end up having warnings and errors when those modules are not part of the manifest. Users should be able to remove unwanted modules from their downstream manifest and still build any board configurations. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-23 17:19:41 -04:00
/modules/ @nashif
MAINTAINERS: include the CANopenNode module in the CAN bus group Include the CANopenNode module integration files in the CAN bus maintainers group and assign ownership to me. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-10-27 15:21:21 +02:00
/modules/canopennode/ @henrikbrixandersen
CODEOWNERS: Add myself and Flavio for Mbed TLS Add us as maintainers for the Mbed TLS module and associated files. Signed-off-by: David Brown <david.brown@linaro.org>
2021-10-19 09:35:20 -06:00
/modules/mbedtls/ @ceolin @d3zd3z
CODEOWNERS: Add nandojve for gigadevices Add myself as codeowners for GigaDevice related files. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-09-19 14:29:24 -03:00
/modules/hal_gigadevice/ @nandojve
CODEOWNERS: add codeowner for nRF IEEE 802.15.4 This commit adds @jciupis as a codeowner of Nordic's IEEE 802.15.4 files. Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
2022-03-25 11:06:58 +01:00
/modules/hal_nordic/nrf_802154/ @jciupis
MAINTAINERS: remove maintainer-ship status for ioannisg Removing maintainer and/or collaborator status on - nRF platforms - TF-M - userspace - cmsis-dsp - MAINTAINERS file for ioannisg. Replace with @anangl or others, where applicable. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-16 16:18:09 +01:00
/modules/trusted-firmware-m/ @microbuilder
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/kernel/device.c @andyross @nashif
/kernel/idle.c @andyross @nashif
CODEOWNERS: minor cleanup Remove redundant lines and minor owner updates. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 14:42:35 -04:00
/samples/ @nashif
CODEOWNERS: Add self to sysbuild Add myself to sysbuild entry and adds additional folders. Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2023-03-08 09:52:28 +00:00
/samples/application_development/sysbuild/ @tejlmand @nordicjm
samples: basic: Add a minimal sample Add a minimal sample that showcases minimal ROM sizes. It can be built in several configurations, all very restrictive when it comes to features enabled in order to verify the fact that we can fit in small devices and to be able to accurately measure the sizes of the kernel's basic features. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-05-09 19:48:17 +02:00
/samples/basic/minimal/ @carlescufi
samples: basic: servo_motor: Move dts overlays under boards Move the dts overlay under a boards/ dir to make it match conf files. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-31 12:02:50 -05:00
/samples/basic/servo_motor/boards/*microbit* @jhe
CODEOWNERS: Add sjanc for Bluetooth host paths This will help with review process. Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
2022-05-20 16:37:25 +02:00
/samples/bluetooth/ @jhedberg @Vudentz @alwa-nordic @sjanc
samples: compression: lz4: lz4 sample application This PR add sample application for minimal lz4 library. lz4 library RFC requested here: #28535 Fixes: #26648 Signed-off-by: NavinSankar Velliangiri <navin@linumiz.com>
2020-09-19 18:50:01 +05:30
/samples/compression/ @Navin-Sankar
CODEOWNERS: add myself as additional codeowner for CAN Add myself as additional codeowner for the various CAN driver and subsystem components. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-02-25 09:15:00 +01:00
/samples/drivers/can/ @alexanderwachter @henrikbrixandersen
samples: drivers: clock control: add sample This adds a sample application for testing the LiteX clock control driver. Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-05-11 13:11:09 +02:00
/samples/drivers/clock_control_litex/ @mateusz-holenko @kgugala @pgielda
MAINTAINERS: include samples/drivers/eeprom under EEPROM area Include the samples/drivers/eeprom folder under the EEPROM maintainer area. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-06-18 13:32:57 +02:00
/samples/drivers/eeprom/ @henrikbrixandersen
samples: drivers: ht16k33: add sample application for the HT16K33 Add a sample application for showcasing the functionality of the Holtek HT16K33 LED driver with keyscan functionality. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-03-24 20:24:31 +01:00
/samples/drivers/ht16k33/ @henrikbrixandersen
CODEOWNERS: Add entry for LoRa support Add CODEOWNERS entry for LoRa API, drivers and samples. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-07-22 20:42:47 +05:30
/samples/drivers/lora/ @Mani-Sadhasivam
smbus: Update CODEOWNERS and MAINTAINERS files Update CODEOWNERS and MAINTAINERS files. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-10-03 12:01:15 +03:00
/samples/drivers/smbus/ @finikorg
CODEOWNERS: update file path for samples Adapt to new location of samples. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-09 08:27:20 -05:00
/samples/subsys/lorawan/ @Mani-Sadhasivam
MAINTAINERS: include the CANopenNode module in the CAN bus group Include the CANopenNode module integration files in the CAN bus maintainers group and assign ownership to me. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-10-27 15:21:21 +02:00
/samples/modules/canopennode/ @henrikbrixandersen
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/samples/net/ @rlubos @tbursztyka
samples: net: cloud: Introduce TagoIO IoT cloud http post Introduce TagoIO IoT Cloud HTTP post client example. This explorer Zephyr network resources to demonstrate an end to end application. The TagoIO allows that any user can test on a easy way Ethernet, WIFI and Modem (PPP) with BSD sockets. The example provides overlays to configure WIFI and Modem. The application consists an a pseudo temperature sensor that sends periodically data to TagoIO IoT Cloud platform. The data can be visualized on a web browser dashboard, cellphone or tablet. The steps to configure TagoIO are described on the example documentation. Special Variables: - CONFIG_TAGOIO_DEVICE_TOKEN DEVID token generated by TagoIO - CONFIG_TAGOIO_HTTP_WIFI_SSID SSID when using WIFI - CONFIG_TAGOIO_HTTP_WIFI_PSK PASSWD when using WIFI - CONFIG_MODEM_GSM_UART_NAME UART label when using MODEM - CONFIG_MODEM_GSM_APN APN when using MODEM Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-06-19 14:34:49 -03:00
/samples/net/cloud/tagoio_http_post/ @nandojve
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/samples/net/dns_resolve/ @rlubos @tbursztyka
CODEOWNERS: Replace lwm2m and lwm2m_client owner Replace @mike-scott with @rlubos as a code owner for lwm2m library and sample. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-04-28 11:47:08 +02:00
/samples/net/lwm2m_client/ @rlubos
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 18:18:40 +03:00
/samples/net/mqtt_publisher/ @rlubos
CODEOWNERS, MAINTAINERS: Add entries for MQTT-SN This adds the files related to MQTT-SN, with an additional exlude to separate MQTT and MQTT-SN. Signed-off-by: René Beckmann <rene.beckmann@grandcentrix.net>
2022-10-30 15:24:21 +01:00
/samples/net/mqtt_sn_publisher/ @rlubos @BeckmaR
CODEOWNERS: Update CoAP codeowner Set myself as the codeowner of the CoAP library. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-10-05 17:39:33 +02:00
/samples/net/sockets/coap_*/ @rlubos
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/samples/net/sockets/ @rlubos @tbursztyka
CODEOWNERS: Fix sensor samples There were two conflicting entries for sensor samples, which resulted in the wrong person getting assigned as a reviewer. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-11-15 10:28:43 -06:00
/samples/sensor/ @MaureenHelm
sample/shield: add support to x-nucleo-iks01a3 shield Provide two basic example samples to test the x-nucleo-iks01a3 shield: - Standard (Mode 1) - SensorHub (Mode 2) Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-01-28 17:29:39 +01:00
/samples/shields/ @avisconti
CODEOWNERS: Adding myself for icmsg backend for IPC service Adding myself as a code owner for icmsg backend in IPC-service. Signed-off-by: Emil Obalski <Emil.Obalski@nordicsemi.no>
2023-03-30 10:57:03 +02:00
/samples/subsys/ipc/ipc_service/icmsg @emob-nordic
CODEOWNERS: update due to nickname change Modified nickname from jarz-nordic to jakub-uC Signed-off-by: Jakub Rzeszutko <jakubr@uber.com>
2019-06-06 08:42:20 +02:00
/samples/subsys/logging/ @nordic-krch @jakub-uC
CODEOWNERS: add myself for samples/subsys/logging/syst Add myself to the CODEOWNERS for samples/subsys/logging/syst to make checkpatch happy, and to get notifications of changes in the sample. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-03-31 14:17:05 -07:00
/samples/subsys/logging/syst/ @dcpleung
CODEOWNERS: Add code owners for Intel Agilex5 platform drivers Code owners for all the required Intel Agilex5 platform drivers. Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-06 15:07:44 +00:00
/samples/subsys/shell/ @jakub-uC @nordic-krch @gdengi
CODEOWNER: Add code owner for sip_svc subsystem Add code owner for svc driver,sip_svc subsystem and sip_svc sample application Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
2023-03-17 08:01:46 +00:00
/samples/subsys/sip_svc/ @maheshraotm
CODEOWNERS: Remove Andrzej Puzdrowski from most maintainerships Andrzej is no longer involved directly in Zephyr, but remains connected to the MCUboot project. Replace his maintainership with either other people from Nordic or leave the subsystem "orphaned" (i.e. labeled as odd fixes). Also add @nordicjm to the SMP/MCUmgr maintainership, as he is already an SMP/MCUmgr collaborator. Finally, removed @aunsbjerg from mcumgr path maintainership, since he's already assigned to the UDP platform implementation, which is what he is an owner of. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-10-18 11:56:28 +02:00
/samples/subsys/mgmt/mcumgr/ @de-nordic @nordicjm
samples: updatehub: Move from net to subsys:mgmt folder Zephyr introduced subsys/mgmt folder for MCU management. Move UpdateHub sample to its correspondent folder at sample/subsys/mgmt folder. Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
2020-08-02 17:41:36 -03:00
/samples/subsys/mgmt/updatehub/ @nandojve @otavio
CODEOWNERS, MAINTAINERS.yml: Update github username GitHub username @cbsiddharth was changed to @sidcha. Update CODEOWNERS and MAINTAINERS.yml entries. Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2021-05-08 23:57:34 +02:00
/samples/subsys/mgmt/osdp/ @sidcha
MAINTAINERS: Remove myself as a USB maintainer I have not had time to work with USB recently, so removing myself from MAINTAINERS and CODEOWNERS for the USB subsystem. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2021-03-08 14:40:06 +02:00
/samples/subsys/usb/ @jfischer-no
CODEOWNERS: Add ownership for USB-C Add myself as codeowner for the USB-C subsystem and sample Signed-off-by: Sam Hurst <sbh1187@gmail.com>
2022-09-02 05:08:47 -07:00
/samples/subsys/usb_c/ @sambhurst
samples: pm: move to pm folder Adjust naming to make things more consistent. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-04-29 13:48:39 +02:00
/samples/subsys/pm/ @nashif @ceolin
CODEOWNERS: Add code owners for Sensing Subsystem Add lixuzha, ghu0510, qianruh for the Sensor Subsystem. Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
2023-04-11 13:04:49 +08:00
/samples/subsys/sensing/ @lixuzha @ghu0510 @qianruh
MAINTAINERS: remove maintainer-ship status for ioannisg Removing maintainer and/or collaborator status on - nRF platforms - TF-M - userspace - cmsis-dsp - MAINTAINERS file for ioannisg. Replace with @anangl or others, where applicable. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-16 16:18:09 +01:00
/samples/tfm_integration/ @microbuilder
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/samples/userspace/ @dcpleung @nashif
scripts: add script to extract top-ten bug-bashers This script allows us to programmatically query bug-bashers within a user-supplied time-window. For example, we held a "Bug Bash Week" August 1-7, 2021 (it was announced a week early though). The output of the script prints the "top ten" bug bashers in tab-separated columns in descending order. The first column is the number of bugs squashed and the second column is the github user id. Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2021-08-17 08:10:07 -04:00
/scripts/release/bug_bash.py @cfriedt
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/scripts/coccicheck @himanshujha199640 @JuliaLawall
/scripts/coccinelle/ @himanshujha199640 @JuliaLawall
debug/coredump: add a primitive coredump mechanism This adds a very primitive coredump mechanism under subsys/debug where during fatal error, register and memory content can be dumped to coredump backend. One such backend utilizing log module for output is included. Once the coredump log is converted to a binary file, it can be used with the ELF output file as inputs to an overly simplified implementation of a GDB server. This GDB server can be attached via the target remote command of GDB and will be serving register and memory content. This allows using GDB to examine stack and memory where the fatal error occurred. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-08-07 10:47:37 -07:00
/scripts/coredump/ @dcpleung
action: footprint tracking Add action and scripts for footprint tracking. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-06-06 17:03:08 -04:00
/scripts/footprint/ @nashif
guiconfig: Add a graphical configuration interface This is a graphical configuration interface written in Tkinter. Like menuconfig.py, it supports showing all symbols (with invisible symbols in red) and jumping directly to symbols. Symbol values can also be changed directly from the jump-to dialog. This interface should feel a lot smoother than menuconfig.py on Windows. When single-menu mode is enabled, a single menu is shown at a time, like in the terminal menuconfig. Only this mode distinguishes between symbols defined with 'config' and symbols defined with 'menuconfig'. Compatible with both Python 2 and Python 3. Has been tested on X11, Windows, and macOS. To avoid having to carry around a bunch of GIFs, the image data is embedded in guiconfig.py. To use separate GIF files instead, change _USE_EMBEDDED_IMAGES to False. The image files can be found in https://github.com/ulfalizer/Kconfiglib/tree/screenshots/guiconfig. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-05-06 14:23:47 +02:00
/scripts/kconfig/ @ulfalizer
logging: add support for dictionary based logging This adds dictionary based logging support. Dictionary based logging is binary based where one big difference is that static strings are stored as pointers instead of the whole string. This results in reduced space requirements for storing log messages in certain scenairos. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-04-02 12:54:53 -07:00
/scripts/logging/dictionary/ @dcpleung
CODEOWNERS: Cover also new native_simulator folder Add aescolar as codeowner for the new native_simulator folder Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-06-21 14:14:19 +02:00
/scripts/native_simulator/ @aescolar
CODEOWNERS: rename sanitycheck Also replace things in CODEOWNER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-07 11:48:41 -05:00
/scripts/pylib/twister/expr_parser.py @nashif
/scripts/schemas/twister/ @nashif
scripts: move gen_app_partitions.py to scripts/build Move scripts needed by the build system and not designed to be run individually or standalone into the build subfolder. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-11 10:46:17 -04:00
/scripts/build/gen_app_partitions.py @dcpleung @nashif
scripts: move gen_image_info.py to scripts/build Move scripts needed by the build system and not designed to be run individually or standalone into the build subfolder. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-11 10:55:13 -04:00
scripts/build/gen_image_info.py @tejlmand
CODEOWNERS: auto-assign reviews in MAINTAINERS.yml, get_maintainer.py Add an entry in CODEOWNERS for auto-assigning reviewers in MAINTAINERS.yml and get_maintainer.py files. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-17 10:55:21 +02:00
/scripts/get_maintainer.py @nashif
MAINTAINERS: move to my ampere account I'm using a new account now. Do the corresponding CODEOWNERS change just for consistency as well. Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
2023-07-28 13:41:14 -07:00
/scripts/dts/ @mbolivar-ampere @galak
scripts: add script for listing closed bugs Script to be used when creating a release. For regular releases this can be called this way: $ list_issues.py -f issues.md -s 2019-09-01 Will list all closed issues since september 1st, 2019 and will create a markdown file with all issues that can be added as is to the release notes. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-10-04 10:41:07 -04:00
/scripts/release/ @nashif
CODEOWNER: add owner for scripts/ci Add files under scripts/ci to CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-03-31 15:37:58 -04:00
/scripts/ci/ @nashif
codeowners: Add myself to check_compliance.py I've been doing quite a bit of work on it and plan to do quite a bit more. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-11-21 12:41:04 +01:00
/scripts/ci/check_compliance.py @nashif @carlescufi
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/arch/x86/gen_gdt.py @dcpleung @nashif
/arch/x86/gen_idt.py @dcpleung @nashif
scripts: move gen_kobject_list.py to scripts/build/gen_kobject_list.py Move scripts needed by the build system and not designed to be run individually or standalone into the build subfolder. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-11 10:53:29 -04:00
/scripts/build/gen_kobject_list.py @dcpleung @nashif
scripts: move gen_kobject_placeholders.py to scripts/build/ Move scripts needed by the build system and not designed to be run individually or standalone into the build subfolder. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-11 10:53:38 -04:00
/scripts/build/gen_kobject_placeholders.py @dcpleung
scripts: move gen_syscalls.py to scripts/build Move scripts needed by the build system and not designed to be run individually or standalone into the build subfolder. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-11 10:54:14 -04:00
/scripts/build/gen_syscalls.py @dcpleung @nashif
MAINTAINERS: move to my ampere account I'm using a new account now. Do the corresponding CODEOWNERS change just for consistency as well. Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
2023-07-28 13:41:14 -07:00
/scripts/list_boards.py @mbolivar-ampere
scripts: move process_gperf.py to scripts/build Move scripts needed by the build system and not designed to be run individually or standalone into the build subfolder. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-11 10:56:46 -04:00
/scripts/build/process_gperf.py @dcpleung @nashif
scripts: move gen_relocate_app.py to scripts/build Move scripts needed by the build system and not designed to be run individually or standalone into the build subfolder. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-11 10:53:51 -04:00
/scripts/build/gen_relocate_app.py @dcpleung
usb-c: Generate USB-C connector VIF policies XML file Generates XML file containing VIF policies by reading the device tree using EDT.pickle generated during build This script writes a subset of general and sink-pdo VIF policies in output file This script gets invoked during build if enabled through kconfig The generated XML containing USB-C VIF policies could be used by USB PD/Type-C analysers/testers to understand USB-C properties and perform tests accordingly Signed-off-by: Madhurima Paruchuri <mparuchuri@google.com>
2022-10-26 13:34:09 +00:00
/scripts/generate_usb_vif/ @madhurimaparuchuri
MAINTAINERS: move to my ampere account I'm using a new account now. Do the corresponding CODEOWNERS change just for consistency as well. Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
2023-07-28 13:41:14 -07:00
/scripts/requirements*.txt @mbolivar-ampere @galak @nashif
scripts: tests: Add tests for subfolder_list.py This commit implements tests of subfolder_list.py Signed-off-by: Ruslan Mstoi <ruslan.mstoi@intel.com>
2020-07-01 17:38:46 +03:00
/scripts/tests/build/test_subfolder_list.py @rmstoi
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 09:25:23 -05:00
/scripts/tracing/ @nashif
CODEOWNERS: rename sanitycheck Also replace things in CODEOWNER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-07 11:48:41 -05:00
/scripts/pylib/twister/ @nashif
/scripts/twister @nashif
scripts: Add hook calllable series-push-hook script Running checkpatch in pre-commit hook could be a constraint for day to day work. Though, running it before pushing to zephyr repo is highly recommended. Add a series push script callable from pre-push hook. Document how to use it in contribute section. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-03-08 11:39:59 +01:00
/scripts/series-push-hook.sh @erwango
scripts: utils: add pinctrl migration script for nRF boards This script can be used to automatically migrate the Devicetree files of nRF-based boards using the old <signal>-pin properties to select peripheral pins. The script will parse a board Devicetree file and will first adjust that file by removing old pin-related properties replacing them with pinctrl states. A board-pinctrl.dtsi file will be generated containing the configuration for all pinctrl states. Note that script will also work on files that have been partially ported. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-09-30 13:10:24 +02:00
/scripts/utils/pinctrl_nrf_migrate.py @gmarull
scripts/utils/migrate_mcumgr_kconfigs.py: Script for migrating MCUmgr Script that provides aid with converting project files to new Kconfig option names. Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2022-12-01 15:24:14 +00:00
/scripts/utils/migrate_mcumgr_kconfigs.py @de-nordic
MAINTAINERS: move to my ampere account I'm using a new account now. Do the corresponding CODEOWNERS change just for consistency as well. Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
2023-07-28 13:41:14 -07:00
/scripts/west_commands/ @mbolivar-ampere
modules: Basic binary blob infrastructure This patch introduces the basic infrastructure to list and fetch binary blobs. This includes: - The new 'blobs' extension command - An implementation of the `west blobs list` command with custom formatting - A very simple mechanism for loading fetchers - A basic implementation of an HTTP fetcher In order to ensure consistency among the west extension commands in the main zephyr tree, we reuse a similar class factory pattern that is present for ZephyrBinaryRunner instances in the ZephyrBlobFetcher case. This could be achieved with a simpler mechanism, but opted for consistency before simplicity. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-08-04 19:08:22 +02:00
/scripts/west_commands/blobs.py @carlescufi
CODEOWNERS: Fix error/warnings reported by check_compliance.py Fix warnings/errors: * Path '/drivers/dma/*cavs*' not found in the tree * Expected '/' after directory 'scripts/west_commands/fetchers' Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-22 13:36:25 -05:00
/scripts/west_commands/fetchers/ @carlescufi
MAINTAINERS: move to my ampere account I'm using a new account now. Do the corresponding CODEOWNERS change just for consistency as well. Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
2023-07-28 13:41:14 -07:00
/scripts/west_commands/runners/gd32isp.py @mbolivar-ampere @nandojve
/scripts/west_commands/tests/test_gd32isp.py @mbolivar-ampere @nandojve
/scripts/west-commands.yml @mbolivar-ampere
cmake: Extracted Zephyr module processing into python script Fixes: #14513 This commit move the functionality of extracting zephyr modules into generated CMake and Kconfig include files from CMake into python. This allows other tools, especially CI to re-use the zephyr module functionality. Signed-off-by: Torsten Rasmussen <torsten.rasmussen@nordicsemi.no>
2019-03-19 10:38:18 +01:00
/scripts/zephyr_module.py @tejlmand
scripts: move uf2conv.py to scripts/build/uf2conv.py Move scripts needed by the build system and not designed to be run individually or standalone into the build subfolder. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-11 10:57:15 -04:00
/scripts/build/uf2conv.py @petejohanson
scripts: move user_wordsize.py to scripts/build/user_wordsize.py Move scripts needed by the build system and not designed to be run individually or standalone into the build subfolder. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-11 10:57:31 -04:00
/scripts/build/user_wordsize.py @cfriedt
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/scripts/valgrind.supp @aescolar @daor-oti
CODEOWNERS: Add self to sysbuild Add myself to sysbuild entry and adds additional folders. Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2023-03-08 09:52:28 +00:00
/share/sysbuild/ @tejlmand @nordicjm
cmake: adding ZephyrConfig.cmake to allow an easy way to locate Zephyr Adding ZephyrConfig.cmake and ZephyrConfigVersion.cmake allows projects to use find_package to locate Zephyr. This means that it will be possible to allow users to run CMake without the need to source zephyr-env.sh or run zephyr-env.cmd. This is especially useful for IDEs such as Eclipse or SES, where it will no longer be required to source the above files before launching the IDE. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-02-12 14:55:36 +01:00
/share/zephyr-package/ @tejlmand
cmake: Relocating Zephyr Unittest CMake package. Fixes: #23872 Relocating Zephyr Unittest CMake package to ensure that HINTS ${ZEPHYR_BASE} in find_package(ZephyrUnittest HINTS ${ZEPHYR_BASE}) works correctly when the package has not been exported to CMake user package registry. This ensure that the new package functionality is fully backwards compatible on systems where the package is not exported and ZEPHYR_BASE is set. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-03-27 21:31:36 +01:00
/share/zephyrunittest-package/ @tejlmand
CODEOWNERS: Replace joerchan with alwa-nordic I'm taking over for joerchan at Nordic Semiconductor as a Zephyr Bluetooth host collaborator. Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
2021-11-12 09:02:31 +01:00
/subsys/bluetooth/ @alwa-nordic @jhedberg @Vudentz
CODEOWNERS: Remove asbjornsabo from BT Codeowners Asbjorn will not be as involved with Zephyr development anymore, so removing him as a codeowner. Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-09-26 14:44:14 +02:00
/subsys/bluetooth/audio/ @jhedberg @Vudentz @Thalley @sjanc
CODEOWNERS: add Andries to bluetooth/controller Added myself as codeowner to the bluetooth/controller project Signed-off-by: Andries Kruithof <Andries.Kruithof@nordicsemi.no>
2020-10-02 12:51:04 +02:00
/subsys/bluetooth/controller/ @carlescufi @cvinayak @thoh-ot @kruithofa
CODEOWNERS: Add sjanc for Bluetooth host paths This will help with review process. Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
2022-05-20 16:37:25 +02:00
/subsys/bluetooth/host/ @alwa-nordic @jhedberg @Vudentz @sjanc
MAINTAINERS/CODEOWNERS: Add myself as a code owner of Bluetooth mesh Add myself as a code owner of Bluetooth mesh subsystem. Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2022-03-29 10:27:50 +02:00
/subsys/bluetooth/mesh/ @jhedberg @PavelVPV @Vudentz @LingaoM
CODEOWNERS: add myself as additional codeowner for CAN Add myself as additional codeowner for the various CAN driver and subsystem components. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-02-25 09:15:00 +01:00
/subsys/canbus/ @alexanderwachter @henrikbrixandersen
CODEOWNERS: address some unowned files/dirs Add owners for some architecture, soc and subsystem code. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-07 08:31:51 -04:00
/subsys/debug/ @nashif
debug/coredump: add a primitive coredump mechanism This adds a very primitive coredump mechanism under subsys/debug where during fatal error, register and memory content can be dumped to coredump backend. One such backend utilizing log module for output is included. Once the coredump log is converted to a binary file, it can be used with the ELF output file as inputs to an overly simplified implementation of a GDB server. This GDB server can be attached via the target remote command of GDB and will be serving register and memory content. This allows using GDB to examine stack and memory where the fatal error occurred. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-08-07 10:47:37 -07:00
/subsys/debug/coredump/ @dcpleung
codeowners: Add myself to gdbstub Add myself as code owner for gdbstub. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-16 09:38:09 -07:00
/subsys/debug/gdbstub/ @ceolin
/subsys/debug/gdbstub.c @ceolin
CODEOWNERS: Remove Andrzej Puzdrowski from most maintainerships Andrzej is no longer involved directly in Zephyr, but remains connected to the MCUboot project. Replace his maintainership with either other people from Nordic or leave the subsystem "orphaned" (i.e. labeled as odd fixes). Also add @nordicjm to the SMP/MCUmgr maintainership, as he is already an SMP/MCUmgr collaborator. Finally, removed @aunsbjerg from mcumgr path maintainership, since he's already assigned to the UDP platform implementation, which is what he is an owner of. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-10-18 11:56:28 +02:00
/subsys/dfu/ @de-nordic @nordicjm
CODEOWNERS: add myself as disk subsystem code-owner Add myself as disk subsystem code-owner Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-02-25 10:09:30 +01:00
/subsys/disk/ @jfischer-no
math: Introduce a DSP basicmath subsystem with a cmsis backend Introduce an API mirroring the CMSIS-DSP's basicmath. If CMSIS_DSP is enabled, then it will by default be used as a backend. Developers may opt into a custom backend by setting CONFIG_DSP_BACKEND_CMSIS=n. If done, the application must provide `zdsp_backend/dsp.h` and optionally implement the functions in its own .c files. Signed-off-by: Yuval Peress <peress@google.com>
2022-10-06 23:54:46 -06:00
/subsys/dsp/ @yperess
CODEOWNERS: Remove inactive users and minor cleanup Remove wentong and other changes based on MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-28 09:25:23 -05:00
/subsys/tracing/ @nashif
CODEOWNERS: Removed vanwinkeljan Removed vanwinkeljan as codeowner from: * drivers/display * dts/posix * include/drivers/display.h * include/display * lib/gui * samples/subsys/display * samples/drivers/display * subsys/cpp * subsys/debug/asan_hacks.c * subsys/fs/fuse_fs_access.c Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2022-02-20 20:28:36 +01:00
/subsys/debug/asan_hacks.c @aescolar @daor-oti
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/subsys/demand_paging/ @dcpleung @nashif
emul: Create an emulation implementation Create a header file and implementation for emulators. Set up a linker list so that emulators can be found and initialised at start-up. Emulators are used to emulate hardware devices, to support testing of various subsystems. For example, it is possible to write an emulator for an I2C compass such that it appears on the I2C bus and can be used just like a real hardware device. Emulators often implement special features for testing. For example a compass may support returning bogus data if the I2C bus speed is too high, or may return invalid measurements if calibration has not yet been completed. This allows for testing that high-level code can handle these situations correctly. Test coverage can therefore approach 100% if all failure conditions are emulated. Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no> Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-20 08:07:29 -06:00
/subsys/emul/ @sjg20
codeowners: update due to Github user name change Update CODEOWNERS and MAINTAINERS due to Github user name change. Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2020-11-16 00:04:08 +01:00
/subsys/fb/ @jfischer-no
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/subsys/fs/ @nashif
CODEOWNERS: Add missing trailing / on some directories Gets rid of some warnings from check_compliance.py: Wrong syntax: /home/ulf/z/subsys/fs/fcb Wrong syntax: /home/ulf/z/subsys/fs/nvs Wrong syntax: /home/ulf/z/subsys/storage Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-02-24 20:29:12 +01:00
/subsys/fs/nvs/ @Laczen
MAINTAINERS: remove maintainer-ship status for ioannisg Removing maintainer and/or collaborator status on - nRF platforms - TF-M - userspace - cmsis-dsp - MAINTAINERS file for ioannisg. Replace with @anangl or others, where applicable. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-16 16:18:09 +01:00
/subsys/ipc/ @carlocaione
CODEOWNERS: Adding myself for icmsg backend for IPC service Adding myself as a code owner for icmsg backend in IPC-service. Signed-off-by: Emil Obalski <Emil.Obalski@nordicsemi.no>
2023-03-30 10:57:03 +02:00
/subsys/ipc/ipc_service/*/*icmsg* @emob-nordic
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/subsys/logging/ @nordic-krch
CODEOWNERS: Remove files and update paths Some of the files have been deleted or moved. Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-11-21 17:23:59 -06:00
/subsys/logging/backends/log_backend_net.c @nordic-krch @rlubos
CODEOWNERS: Add entry for LoRaWAN Add CODEOWNERS entry for LoRaWAN Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-03-04 22:24:40 +05:30
/subsys/lorawan/ @Mani-Sadhasivam
ec_host_cmd: add ec host command handler framework Add a generic host command handler framework that allows users to declare new host command handlers with the HOST_COMMAND_HANDLER macro at build time. The framework will handle incoming messages from the host command peripheral device and forwards the incoming data to the appropriate host command handler, which is looked up by id. The framework will also send the response from the handler back to the host command peripheral device. The device handles sending the data on the physical bus. This type of host command communication is typically done on an embedded controller for a notebook or computer. The host would be the main application processor (aka AP, CPU, SoC). Signed-off-by: Jett Rink <jettrink@google.com>
2020-08-31 15:53:42 -06:00
/subsys/mgmt/ec_host_cmd/ @jettr
CODEOWNERS: Remove Andrzej Puzdrowski from most maintainerships Andrzej is no longer involved directly in Zephyr, but remains connected to the MCUboot project. Replace his maintainership with either other people from Nordic or leave the subsystem "orphaned" (i.e. labeled as odd fixes). Also add @nordicjm to the SMP/MCUmgr maintainership, as he is already an SMP/MCUmgr collaborator. Finally, removed @aunsbjerg from mcumgr path maintainership, since he's already assigned to the UDP platform implementation, which is what he is an owner of. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-10-18 11:56:28 +02:00
/subsys/mgmt/mcumgr/ @carlescufi @de-nordic @nordicjm
mgmt: hawkbit: Add Hawkbit FOTA Support Add Hawkbit FOTA support Signed-off-by: NavinSankar Velliangiri <navin@linumiz.com>
2020-07-24 22:54:49 +05:30
/subsys/mgmt/hawkbit/ @Navin-Sankar
updatehub: Move from lib to subsys:mgmt folder Zephyr introduced subsys/mgmt folder for MCU management. Move UpdateHub to this newly and dedicated space. Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
2020-07-30 19:58:32 -03:00
/subsys/mgmt/updatehub/ @nandojve @otavio
CODEOWNERS, MAINTAINERS.yml: Update github username GitHub username @cbsiddharth was changed to @sidcha. Update CODEOWNERS and MAINTAINERS.yml entries. Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2021-05-08 23:57:34 +02:00
/subsys/mgmt/osdp/ @sidcha
CODEOWNERS: add codeowner for modbus Add myself as codeowner for modbus subsys. Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-03-15 15:31:07 +01:00
/subsys/modbus/ @jfischer-no
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/subsys/net/buf.c @jhedberg @tbursztyka @rlubos
/subsys/net/ip/ @rlubos @tbursztyka
/subsys/net/lib/ @rlubos @tbursztyka
/subsys/net/lib/dns/ @rlubos @tbursztyka @cfriedt
CODEOWNERS: Replace lwm2m and lwm2m_client owner Replace @mike-scott with @rlubos as a code owner for lwm2m library and sample. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-04-28 11:47:08 +02:00
/subsys/net/lib/lwm2m/ @rlubos
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/subsys/net/lib/config/ @rlubos @tbursztyka
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 18:18:40 +03:00
/subsys/net/lib/mqtt/ @rlubos
CODEOWNERS, MAINTAINERS: Add entries for MQTT-SN This adds the files related to MQTT-SN, with an additional exlude to separate MQTT and MQTT-SN. Signed-off-by: René Beckmann <rene.beckmann@grandcentrix.net>
2022-10-30 15:24:21 +01:00
/subsys/net/lib/mqtt_sn/ @rlubos @BeckmaR
CODEOWNERS: Update CoAP codeowner Set myself as the codeowner of the CoAP library. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-10-05 17:39:33 +02:00
/subsys/net/lib/coap/ @rlubos
net: socket: syscall for socketpair(2) Working: * non-blocking reads / writes * blocking reads / writes * send(2) / recv(2) / sendto(2) / recvfrom(2) / sendmsg(2) * select(2) * poll(2) Fixes #24366 Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-05-08 23:04:23 -04:00
/subsys/net/lib/sockets/socketpair.c @cfriedt
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/subsys/net/lib/sockets/ @rlubos @tbursztyka
CODEOWNERS: Update networking files Some networking related files were missing owner. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-04-24 17:53:49 +03:00
/subsys/net/lib/tls_credentials/ @rlubos
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 18:18:40 +03:00
/subsys/net/l2/ @rlubos @tbursztyka
/subsys/net/l2/canbus/ @alexanderwachter
net: introduce a network packet filter framework This provides the infrastructure to create network packet filter rules and to apply them to the RX and TX packet paths. Rules are made of simple condition tests that can be linked together, creating a facility similarly to the Linux iptables functionality. A couple of generic and Ethernet-specific condition tests are also provided. Additional tests can be easily created on top of this. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-08-02 15:43:32 -04:00
/subsys/net/pkt_filter/ @npitre
CODEOWNERS: Cover all OpenThread directories in net Current entry covered only /subsys/net/lib/openthread and not /subsys/net/l2/openthread. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-05-05 12:43:34 +02:00
/subsys/net/*/openthread/ @rlubos
pm: move power subsystem to pm Adjust naming to make things consistent. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-04-29 13:45:57 +02:00
/subsys/pm/ @nashif @ceolin
subsys/random: Add cryptographically secure and bulk fill functions 1) Add cryptographically secure random functions to provide FIPS 140-2 compliant random functions. 2) Add name to random function choice selectors to ease selection in SOC .defconfig files 3) Add bulk fill random functions. Signed-off-by: David Leach <david.leach@nxp.com>
2019-07-23 14:16:24 -05:00
/subsys/random/ @dleach02
CODEOWNERS: update due to nickname change Modified nickname from jarz-nordic to jakub-uC Signed-off-by: Jakub Rzeszutko <jakubr@uber.com>
2019-06-06 08:42:20 +02:00
/subsys/shell/ @jakub-uC @nordic-krch
shell: Add MQTT backend Add MQTT backed for shell module. Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2022-01-19 20:49:43 +08:00
/subsys/shell/backends/shell_mqtt.c @ycsin
sd: Add common SD initialization code All SD cards require SD CMD0 (reset) and CMD8 (send IF cond) at boot. Add this portion of the initialization flow to SD subsystem, as well as query command to check if card is SDIO. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-02-16 15:30:40 -06:00
/subsys/sd/ @danieldegrasse
CODEOWNER: Add code owner for sip_svc subsystem Add code owner for svc driver,sip_svc subsystem and sip_svc sample application Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
2023-03-17 08:01:46 +00:00
/subsys/sip_svc/ @maheshraotm
task_wdt: add task-level watchdog subsystem This new subsystem can be used to supervise individual threads. It is based on a regularly updated kernel timer, whose ISR is never actually called in regular system operation. An existing hardware watchdog can be used as an optional fallback if the task watchdog itself gets stuck. Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-18 16:23:17 +01:00
/subsys/task_wdt/ @martinjaeger
CODEOWNERS: address some unowned files/dirs Add owners for some architecture, soc and subsystem code. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-07 08:31:51 -04:00
/subsys/testsuite/ @nashif
CODEOWNERS: Adding ztress codeowner Adding nordic-krch as ztress codeowner. Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-12-21 19:32:48 +01:00
/subsys/testsuite/ztest/*/ztress* @nordic-krch
timing: introduce timing functions as a generic feature Add timing functions and APIs. This is now used with some of the tests we have for performance and metrics and will be used whereever timing informations are needed, for example for tracing, profiling and other operations where timing info is critical. Signed-off-by: Daniel Leung <daniel.leung@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-08-05 12:57:00 -07:00
/subsys/timing/ @nashif @dcpleung
MAINTAINERS: Remove myself as a USB maintainer I have not had time to work with USB recently, so removing myself from MAINTAINERS and CODEOWNERS for the USB subsystem. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2021-03-08 14:40:06 +02:00
/subsys/usb/ @jfischer-no
CODEOWNERS: Add ownership for USB-C Add myself as codeowner for the USB-C subsystem and sample Signed-off-by: Sam Hurst <sbh1187@gmail.com>
2022-09-02 05:08:47 -07:00
/subsys/usb/usb_c/ @sambhurst
CODEOWNERS: minor cleanup Remove redundant lines and minor owner updates. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-05-03 14:42:35 -04:00
/tests/ @nashif
CODEOWNERS: Auto-assign @stephanosio in tests/arch/arm suite reviews Add @stephanosio as a code-owner for the tests/arch/arm test suites, so they get auto-assigned in reviews. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-03-19 10:39:19 +01:00
/tests/arch/arm/ @ioannisg @stephanosio
CODEOWNERS: Add CMSIS-DSP test code owner This commit adds @stephanosio as a code owner for the CMSIS-DSP tests. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-24 14:39:02 +09:00
/tests/benchmarks/cmsis_dsp/ @stephanosio
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
/tests/boards/native_posix/ @aescolar @daor-oti
CODEOWNERS: Add sjanc for Bluetooth host paths This will help with review process. Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
2022-05-20 16:37:25 +02:00
/tests/bluetooth/ @alwa-nordic @jhedberg @Vudentz @sjanc
codeowners: Add Bluetooth controller tests Add Bluetooth controller tests directory and set it to Bluetooth controller maintainer (cvinayak) and the Bluethooth controller LLCP refactoring team. Signed-off-by: Thomas Ebert Hansen <thoh@oticon.com>
2022-01-25 10:26:21 +01:00
/tests/bluetooth/controller/ @cvinayak @thoh-ot @kruithofa @erbr-ot @sjanc @ppryga
tests bsim: Change folder structure Bsim won't be limited anymore to BT tests. In preparation for adding more tests in network areas swap the tests/bluetooth/bsim with tests/bsim/bluetooth There is no other changes in this commit beyond that. Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-03-17 15:29:24 +01:00
/tests/bsim/bluetooth/ @alwa-nordic @jhedberg @Vudentz @wopu-ot
/tests/bsim/bluetooth/audio/ @jhedberg @Vudentz @wopu-ot @Thalley
/tests/bsim/bluetooth/mesh/ @jhedberg @Vudentz @wopu-ot @PavelVPV
CODEOWNERS: Remove alwa-noric from bluetooth mesh Removes alwa-nordic from the following paths: /tests/bluetooth/bsim_bt/bsim_test_mesh/ /tests/bluetooth/mesh_shell/ This is done by adding new definitions for those paths, inheriting the owners of the previously matching rule, but without alwa-nordic. PavelVPV is added to both entries. Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
2022-09-13 13:36:40 +02:00
/tests/bluetooth/mesh_shell/ @jhedberg @Vudentz @sjanc @PavelVPV
CODEOWNERS: Replace joerchan with alwa-nordic I'm taking over for joerchan at Nordic Semiconductor as a Zephyr Bluetooth host collaborator. Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
2021-11-12 09:02:31 +01:00
/tests/bluetooth/tester/ @alwa-nordic @jhedberg @Vudentz @sjanc
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/tests/posix/ @cfriedt
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/tests/crypto/ @ceolin
CODEOWNERS: Add myself and Flavio for Mbed TLS Add us as maintainers for the Mbed TLS module and associated files. Signed-off-by: David Brown <david.brown@linaro.org>
2021-10-19 09:35:20 -06:00
/tests/crypto/mbedtls/ @nashif @ceolin @d3zd3z
CODEOWNERS: add myself as additional codeowner for CAN Add myself as additional codeowner for the various CAN driver and subsystem components. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-02-25 09:15:00 +01:00
/tests/drivers/can/ @alexanderwachter @henrikbrixandersen
CODEOWNERS: Adding codeowner for tests/drivers/counter Added @nordic-krch as the codeowner. Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2019-04-24 07:27:46 +02:00
/tests/drivers/counter/ @nordic-krch
CODEOWNERS: add additional code owner for EEPROM tests Add myself as code owner for the EEPROM test suites. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-09-02 12:53:40 +02:00
/tests/drivers/eeprom/ @henrikbrixandersen @sjg20
CODEOWNERS: Remove Andrzej Puzdrowski from most maintainerships Andrzej is no longer involved directly in Zephyr, but remains connected to the MCUboot project. Replace his maintainership with either other people from Nordic or leave the subsystem "orphaned" (i.e. labeled as odd fixes). Also add @nordicjm to the SMP/MCUmgr maintainership, as he is already an SMP/MCUmgr collaborator. Finally, removed @aunsbjerg from mcumgr path maintainership, since he's already assigned to the UDP platform implementation, which is what he is an owner of. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-10-18 11:56:28 +02:00
/tests/drivers/flash_simulator/ @de-nordic
CODEOWNERS: remove my assignments I won't be supporting Zephyr for the foreseeable future, so remove my association with specific subsystems. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2021-03-17 08:51:38 -05:00
/tests/drivers/gpio/ @mnkp
CODEOWNERS: Add hwinfo ownership Add @alexanderwachter as hwinfo maintainer. Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-02-25 17:22:06 +01:00
/tests/drivers/hwinfo/ @alexanderwachter
smbus: Update CODEOWNERS and MAINTAINERS files Update CODEOWNERS and MAINTAINERS files. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-10-03 12:01:15 +03:00
/tests/drivers/smbus/ @finikorg
CODEOWNERS: prepend / to all entries This will avoid globbing on files named the same deeper in the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-18 16:02:05 -05:00
/tests/drivers/spi/ @tbursztyka
codeowners: Remove Mieszko Mierunski from nRF drivers Mieszko is no longer a Nordic employee. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2023-05-04 12:33:04 +02:00
/tests/drivers/uart/uart_async_api/ @anangl
CODEOWNERS: MAINTAINERS: Add entry for w1 support Add entries for w1 doc, api, drivers, and tests in the CODEOWNERS as well as the MAINTAINERS file. Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-07-08 14:15:29 +02:00
/tests/drivers/w1/ @str4t0m
CODEOWNERS: cleanup and replacing few entries Replace andreboie in the file. Temporary until we completely move to MAINTAINER file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-02 07:32:45 -05:00
/tests/kernel/ @dcpleung @andyross @nashif
codeowner: add codeowners for /test/lib Add codeowners for /test/lib Signed-off-by: Benoit Leforestier <benoit.leforestier@gmail.com>
2019-04-26 17:45:01 +02:00
/tests/lib/ @nashif
CODEOWNERS: Add CMSIS-DSP test code owner This commit adds @stephanosio as a code owner for the CMSIS-DSP tests. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-24 14:39:02 +09:00
/tests/lib/cmsis_dsp/ @stephanosio
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/tests/net/ @rlubos @tbursztyka
/tests/net/buf/ @jhedberg @tbursztyka
/tests/net/lib/ @rlubos @tbursztyka
MAINTAINERS/CODEOWNERS: Removing myself from maintainer role I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-06-16 18:18:40 +03:00
/tests/net/lib/http_header_fields/ @rlubos @tbursztyka
/tests/net/lib/mqtt_packet/ @rlubos
CODEOWNERS, MAINTAINERS: Add entries for MQTT-SN This adds the files related to MQTT-SN, with an additional exlude to separate MQTT and MQTT-SN. Signed-off-by: René Beckmann <rene.beckmann@grandcentrix.net>
2022-10-30 15:24:21 +01:00
/tests/net/lib/mqtt_sn_packet/ @rlubos @BeckmaR
/tests/net/lib/mqtt_sn_client/ @rlubos @BeckmaR
CODEOWNERS: Update CoAP codeowner Set myself as the codeowner of the CoAP library. Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-10-05 17:39:33 +02:00
/tests/net/lib/coap/ @rlubos
net: introduce a network packet filter framework This provides the infrastructure to create network packet filter rules and to apply them to the RX and TX packet paths. Rules are made of simple condition tests that can be linked together, creating a facility similarly to the Linux iptables functionality. A couple of generic and Ethernet-specific condition tests are also provided. Additional tests can be easily created on top of this. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-08-02 15:43:32 -04:00
/tests/net/npf/ @npitre
tests: socket: socketpair: tests for socketpair(2) syscall Tests for issue #24366 Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-05-08 23:06:16 -04:00
/tests/net/socket/socketpair/ @cfriedt
CODEOWNERS: remove inactive code owners Remove inactive users from CODEOWNERS file. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-01-18 18:07:43 +00:00
/tests/net/socket/ @rlubos @tbursztyka
tests: add a test for coredump This adds a simple test for coredump. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-08-07 10:45:20 -07:00
/tests/subsys/debug/coredump/ @dcpleung
CODEOWNERS: Remove Andrzej Puzdrowski from most maintainerships Andrzej is no longer involved directly in Zephyr, but remains connected to the MCUboot project. Replace his maintainership with either other people from Nordic or leave the subsystem "orphaned" (i.e. labeled as odd fixes). Also add @nordicjm to the SMP/MCUmgr maintainership, as he is already an SMP/MCUmgr collaborator. Finally, removed @aunsbjerg from mcumgr path maintainership, since he's already assigned to the UDP platform implementation, which is what he is an owner of. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-10-18 11:56:28 +02:00
/tests/subsys/fs/ @nashif @de-nordic
/tests/subsys/mgmt/mcumgr/ @de-nordic @nordicjm
tests: subsys: sd: Add SDMMC subsystem test Add SDMMC subsystem test, to verify functionality of SDMMC portion of subsystem. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-02-16 16:24:51 -06:00
/tests/subsys/sd/ @danieldegrasse
rtio: Real-Time Input/Output Stream A DMA friendly Stream API for zephyr. Based on ideas from io_uring and iio, a queue based API for I/O operations. Provides a pair of fixed length ringbuffer backed queues for submitting I/O requests and recieving I/O completions. The requests may be chained together to ensure the next operation does not start until the current one is complete. Requests target an abstract rtio_iodev which is expected to wrap all the hardware particulars of how to perform the operation. For example with a SPI bus device, a description of what a read, and write mean can be decided by the iodev wrapping a particular device hanging off of a SPI controller. The queue pair are submitted to an executor which may be a simple inplace looping executor done in the callers execution context (thread/stack) but other executors are expected. A threadpool executor might for example allow for concurrent request chains to execute in parallel. A DMA executor, in conjunction with DMA aware iodevs would allow for hardware offloading of operations going so far as to schedule with priority using hardware arbitration. Both the iodev and executor are definable by a particular SoC, meaning they can work in conjuction to perform IO operations using a particular DMA controller or methodology if desired. The application decides entirely how large the queues are, where the buffers to read/write come from (some executors may have particular demands!), and which executor to submit requests to. Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2019-06-26 10:17:18 -05:00
/tests/subsys/rtio/ @teburd
CODEOWNERS: update due to nickname change Modified nickname from jarz-nordic to jakub-uC Signed-off-by: Jakub Rzeszutko <jakubr@uber.com>
2019-06-06 08:42:20 +02:00
/tests/subsys/shell/ @jakub-uC @nordic-krch
doc: CODEOWNERS for .rst files Move *.rst to end of the list to ensure all .rst files get reviewed by our tech writer (last match takes precedence). Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-22 08:41:52 -07:00
# Get all docs reviewed
CODEOWNERS: add @nashif for docs Add @nashif as codeowner for docs temporarily until we have a dedicated owner. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-29 22:57:08 -05:00
*.rst @nashif
doc: move kernel docs as a main chapter Move the kernel documentation up and make it a main chapter. Right now it is hidden very low in the structure under references. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-12-04 12:38:55 -05:00
/doc/kernel/ @andyross @nashif
CODEOWNERS: Add daor-oti and wopu-ot to several directories daor-oti and wopu-ot also want to be added automatically as reviewers to POSIX arch, native_posix, nrf52_bsim and bsim related test apps. (see CODEOWNERS for more info about which each is interested on) Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-03-05 11:20:13 +01:00
*posix*.rst @aescolar @daor-oti
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