riscv: Move directory to *-privileged

Because the spec is "privileged" not "privilege".

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This commit is contained in:
Carlo Caione 2023-06-09 10:40:43 +02:00 committed by Anas Nashif
commit 8eeb5c992e
119 changed files with 16 additions and 16 deletions

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@ -80,10 +80,10 @@
/soc/posix/ @aescolar @daor-oti
/soc/riscv/ @kgugala @pgielda
/soc/riscv/openisa*/ @dleach02
/soc/riscv/riscv-privilege/andes_v5/ @cwshu @kevinwang821020 @jimmyzhe
/soc/riscv/riscv-privilege/neorv32/ @henrikbrixandersen
/soc/riscv/riscv-privilege/gd32vf103/ @soburi
/soc/riscv/riscv-privilege/niosv/ @sweeaun
/soc/riscv/riscv-privileged/andes_v5/ @cwshu @kevinwang821020 @jimmyzhe
/soc/riscv/riscv-privileged/neorv32/ @henrikbrixandersen
/soc/riscv/riscv-privileged/gd32vf103/ @soburi
/soc/riscv/riscv-privileged/niosv/ @sweeaun
/soc/x86/ @dcpleung @nashif @aasthagr
/arch/xtensa/ @dcpleung @andyross @nashif
/soc/xtensa/ @dcpleung @andyross @nashif

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@ -2106,7 +2106,7 @@ GD32 Platforms:
- dts/*/gigadevice/
- dts/bindings/*/*gd32*
- soc/arm/gigadevice/
- soc/riscv/riscv-privilege/gd32vf103/
- soc/riscv/riscv-privileged/gd32vf103/
- scripts/west_commands/*/*gd32*
labels:
- "platform: GD32"

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@ -301,7 +301,7 @@ static inline uint64_t arch_k_cycle_get_64(void)
#endif /*_ASMLANGUAGE */
#if defined(CONFIG_SOC_FAMILY_RISCV_PRIVILEGED)
#include <zephyr/arch/riscv/riscv-privilege/asm_inline.h>
#include <zephyr/arch/riscv/riscv-privileged/asm_inline.h>
#endif

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@ -14,7 +14,7 @@
*/
#if defined(__GNUC__)
#include <zephyr/arch/riscv/riscv-privilege/asm_inline_gcc.h>
#include <zephyr/arch/riscv/riscv-privileged/asm_inline_gcc.h>
#else
#error "Supports only GNU C compiler"
#endif

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@ -5,6 +5,6 @@
#
zephyr_sources(
../riscv-privilege/common/soc_irq.S
../riscv-privilege/common/vector.S
../riscv-privileged/common/soc_irq.S
../riscv-privileged/common/vector.S
)

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@ -7,7 +7,7 @@
#ifndef __RISCV32_LITEX_VEXRISCV_SOC_H_
#define __RISCV32_LITEX_VEXRISCV_SOC_H_
#include "../riscv-privilege/common/soc_common.h"
#include "../riscv-privileged/common/soc_common.h"
#include <zephyr/devicetree.h>
#include <zephyr/arch/common/sys_io.h>

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@ -13,7 +13,7 @@ config SOC_FAMILY_RISCV_PRIVILEGED
config SOC_FAMILY
string
default "riscv-privilege"
default "riscv-privileged"
depends on SOC_FAMILY_RISCV_PRIVILEGED
config RISCV_HAS_PLIC
@ -34,4 +34,4 @@ config RISCV_MTVEC_VECTORED_MODE
help
Should the SOC use mtvec in vectored mode
source "soc/riscv/riscv-privilege/*/Kconfig.soc"
source "soc/riscv/riscv-privileged/*/Kconfig.soc"

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@ -3,4 +3,4 @@
# Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
# SPDX-License-Identifier: Apache-2.0
source "soc/riscv/riscv-privilege/*/Kconfig.defconfig.series"
source "soc/riscv/riscv-privileged/*/Kconfig.defconfig.series"

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@ -3,4 +3,4 @@
# Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
# SPDX-License-Identifier: Apache-2.0
source "soc/riscv/riscv-privilege/*/Kconfig.series"
source "soc/riscv/riscv-privileged/*/Kconfig.series"

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@ -6,7 +6,7 @@ if SOC_SERIES_RISCV_ANDES_V5
# Kconfig picks the first default with a satisfied condition.
# SoC defaults should be parsed before SoC Series defaults, because SoCs usually
# overrides SoC Series values.
source "soc/riscv/riscv-privilege/andes_v5/Kconfig.defconfig.ae*"
source "soc/riscv/riscv-privileged/andes_v5/Kconfig.defconfig.ae*"
config SOC_SERIES
default "andes_v5"

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@ -3,7 +3,7 @@
if SOC_SERIES_GD32VF103
source "soc/riscv/riscv-privilege/gd32vf103/Kconfig.defconfig.gd32vf103*"
source "soc/riscv/riscv-privileged/gd32vf103/Kconfig.defconfig.gd32vf103*"
config SOC_SERIES
default "gd32vf103"

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