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soc: ti: cc13/26xx: clean up include hierarchy

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Removes duplicate code and inconsistencies in the naming of the
cc13xx_cc26xx devicetree and RTC driver hierarchy and alignes it with
the actual TI product series naming hierarchy.

Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
This commit is contained in:
Florian Grandel 2023-07-06 15:52:16 +02:00 • committed by Chris Friedt
commit 38e2eb8fe6
11 changed files with 15 additions and 39 deletions
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2
CODEOWNERS
View file

@ -445,7 +445,7 @@
/drivers/timer/*riscv_machine* @kgugala @pgielda
/drivers/timer/*ite_it8xxx2* @ite
/drivers/timer/*xlnx_psttc* @wjliang @stephanosio
/drivers/timer/*cc13x2_cc26x2_rtc* @vanti
/drivers/timer/*cc13xx_cc26xx_rtc* @vanti
/drivers/timer/*cavs* @dcpleung
/drivers/timer/*stm32_lptim* @FRASTM
/drivers/timer/*leon_gptimer* @julius-barendt

2
drivers/timer/CMakeLists.txt
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@ -8,7 +8,7 @@ zephyr_library_sources_ifdef(CONFIG_APIC_TSC_DEADLINE_TIMER apic_tsc.c)
zephyr_library_sources_ifdef(CONFIG_ARCV2_TIMER arcv2_timer0.c)
zephyr_library_sources_ifdef(CONFIG_ARM_ARCH_TIMER arm_arch_timer.c)
zephyr_library_sources_ifdef(CONFIG_INTEL_ADSP_TIMER intel_adsp_timer.c)
zephyr_library_sources_ifdef(CONFIG_CC13X2_CC26X2_RTC_TIMER cc13x2_cc26x2_rtc_timer.c)
zephyr_library_sources_ifdef(CONFIG_CC13XX_CC26XX_RTC_TIMER cc13xx_cc26xx_rtc_timer.c)
zephyr_library_sources_ifdef(CONFIG_CORTEX_M_SYSTICK cortex_m_systick.c)
zephyr_library_sources_ifdef(CONFIG_ESP32C3_SYS_TIMER esp32c3_sys_timer.c)
zephyr_library_sources_ifdef(CONFIG_GECKO_BURTC_TIMER gecko_burtc_timer.c)

2
drivers/timer/Kconfig
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@ -68,7 +68,7 @@ source "drivers/timer/Kconfig.apic"
source "drivers/timer/Kconfig.arcv2"
source "drivers/timer/Kconfig.arm_arch"
source "drivers/timer/Kconfig.cavs"
source "drivers/timer/Kconfig.cc13x2_cc26x2_rtc"
source "drivers/timer/Kconfig.cc13xx_cc26xx_rtc"
source "drivers/timer/Kconfig.cortex_m_systick"
source "drivers/timer/Kconfig.esp32c3_sys"
source "drivers/timer/Kconfig.gecko"

6
drivers/timer/Kconfig.cc13x2_cc26x2_rtc → drivers/timer/Kconfig.cc13xx_cc26xx_rtc
View file

@ -3,13 +3,13 @@
# Copyright (c) 2019 Intel Corp.
# SPDX-License-Identifier: Apache-2.0
config CC13X2_CC26X2_RTC_TIMER
bool "TI SimpleLink CC13x2/CC26x2 RTC timer"
config CC13XX_CC26XX_RTC_TIMER
bool "TI SimpleLink CC13xx/CC26xx RTC system clock timer"
default y
depends on DT_HAS_TI_CC13XX_CC26XX_RTC_ENABLED
select TICKLESS_CAPABLE
select TIMER_HAS_64BIT_CYCLE_COUNTER
help
This module implements a kernel device driver for the TI SimpleLink
CC13X2_CC26X2 series Real Time Counter and provides the standard
CC13XX_CC26XX series Real Time Counter and provides the standard
"system clock driver" interfaces.

0
drivers/timer/cc13x2_cc26x2_rtc_timer.c → drivers/timer/cc13xx_cc26xx_rtc_timer.c
View file

2
dts/arm/ti/cc1352r.dtsi
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@ -5,7 +5,7 @@
*/
#include <mem.h>
#include <ti/cc13x2_cc26x2.dtsi>
#include <ti/cc13xx_cc26xx.dtsi>
/ {
sram0: memory@20000000 {

2
dts/arm/ti/cc1352r7.dtsi
View file

@ -5,7 +5,7 @@
*/
#include <mem.h>
#include <ti/cc13x2_cc26x2.dtsi>
#include <ti/cc13xx_cc26xx.dtsi>
/ {
sram0: memory@20000000 {

0
dts/arm/ti/cc13x2_cc26x2.dtsi → dts/arm/ti/cc13xx_cc26xx.dtsi
View file

25
dts/arm/ti/cc2652r.dtsi
View file

@ -5,27 +5,4 @@
*/
#include <mem.h>
#include <ti/cc13x2_cc26x2.dtsi>
/ {
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(80)>;
};
};
&flash0 {
reg = <0x0 DT_SIZE_K(352)>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* CCFG registers occupy the last 88 bytes of flash */
ti_ccfg_partition: partition@57fa8 {
compatible = "zephyr,memory-region";
reg = <0x57fa8 88>;
zephyr,memory-region = "FLASH_CCFG";
};
};
};
#include <ti/cc1352r.dtsi>

4
soc/arm/ti_simplelink/cc13x2x7_cc26x2x7/soc.c
View file

@ -8,7 +8,7 @@
#include <driverlib/setup.h>
static int ti_cc13x2_cc26x2_init(void)
static int ti_cc13x7_cc26x7_init(void)
{
/* Performs necessary trim of the device. */
@ -17,4 +17,4 @@ static int ti_cc13x2_cc26x2_init(void)
return 0;
}
SYS_INIT(ti_cc13x2_cc26x2_init, PRE_KERNEL_1, 0);
SYS_INIT(ti_cc13x7_cc26x7_init, PRE_KERNEL_1, 0);

9
tests/kernel/sleep/src/usleep.c
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@ -29,12 +29,11 @@
* nRF51, which has a slow CPU clock.
*/
#define MAXIMUM_SHORTEST_TICKS (IS_ENABLED(CONFIG_SOC_SERIES_NRF51X) ? 6 : 3)
/*
* Similar situation for TI CC13X2/CC26X2 RTC due to the limitation
* that a value too close to the current time cannot be loaded to
* its comparator.
/* Similar situation for TI CC13XX/CC26XX RTC kernel timer due to the
* limitation that a value too close to the current time cannot be
* loaded to its comparator.
*/
#elif defined(CONFIG_CC13X2_CC26X2_RTC_TIMER) && \
#elif defined(CONFIG_CC13XX_CC26XX_RTC_TIMER) && \
(CONFIG_SYS_CLOCK_TICKS_PER_SEC > 16384)
#define MAXIMUM_SHORTEST_TICKS 3
#else