The CMSDK Timer can be used as a timer or as a counter.
The unified interface proposed in #8340 unifies counter.h and rtc.h to
provide a common interface.
This patch modifies the timer implementation of the single timer to
make it compliant with the new proposed interface.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add EPIT (Enhanced Periodic Interrupt Timer) peripheral support
for i.MX6SoloX soc.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Removing duplicates in selects for config SOC_NRF52832 and
SOC_NRF52840. Duplicates were unexpected merge artifacts.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Enables the mcux elcdif shim driver and clocks on imx rt socs when the
display driver interface is enabled.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
In case of !XIP, set defaults for CONFIG_FLASH_SIZE and
CONFIG_FLASH_BASE_ADDRESS in Kconfig.
Fixes: #13113
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Now that the SAM Ethernet driver can work when the cached is enabled, it
is possible to unconditionally enable the data cache on the SAM E70 SoC.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Each platform is now specifying list of supported power states
as a Kconfig options. Some of the specified states could be
disabled in runtime. As result there is no need for the removed
interface.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Currently each SoC has to define own list of power states.
However all these definitions have to be the same, as common power
management code uses them.
This commit replaces per-soc power state list by global definition.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit ports power management code from nRF52 to the nRF51 SoC,
enabling usage of Zephyr Power Management policies on this platform.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit updates the power management code for nRF52 SoC
series after recent changes in Zephyr power management subsystem.
Changes:
- Removed LPS modes, as they are not supported by HW.
(previous implemntation used CONSTLAT and LOWPWR settings
in NRF_POWER to implement low power modes, however these
knobs should be used only when application needs ultra low
CPU wake-up time).
- Reworked code in order to allow adding custom power levels
on the application level and provide better integration
with power management subsystem.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
exti driver implementation does not fit all SoCs because
some EXTI ip does not match stm32_exti register map provided.
Instead of providing exti register map for all SoCs, use LL API
which abstracts IP variations and enable uniform use of the drivers
on all STM32SoCs.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Now that a hw-flow-control DTS binding has been added for MCUX uart,
let's check for the DT_ define and enable support in the MCUX HAL
layer.
Signed-off-by: Michael Scott <mike@foundries.io>
Add sam0_rtc_driver that implements system timer API on top of the RTC
and can be used as a replacement for the default systick timer.
Signed-off-by: Martin Benda <martin.benda@omsquare.com>
Adds a new config HAS_MCUX_ENET to constrain which socs can enable the
mcux ethernet driver. This will prevent users from enabling the driver
on socs like kl25z or kw41z which do not have ethernet mac hardware.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
In soc.h of nRF9160 SoC we need to explicitly include
nrfx_config_nrf9160.h to have the standard peripheral
base address macro mappings in Zephyr builds for nRF9160
SoC. (We need to do this spefically for nRF9160, as those
macros are not present in the nRF9160 MDK header).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Adds STM32 L452 soc with L452xC variant. L452 has 160 KB SRAM;
therefore, mpu mem config has been extended; IRQ number is based on
'stm32l452xx.h'.
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
Enables the mcux ethernet driver and pin muxes on the mimxrt1020_evk
board, the same way it is done on the mimxrt1050_evk board. Updates the
board documentation and yaml supported list accordingly.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ENET PLL should be enabled if the SoC is the MIMXRT1021 (it used by
the ARM core) or if the ENET device is enabled.
The 500MHz clock should be enabled if the SoC is the MIMXRT1021.
The ENET clock should be enabled if the ENET device is enabled.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Kconfig currently emits a warning when building for a MIMXRT1021 SoC:
warning: INIT_ENET_PLL (defined at
soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1052:66) has direct
dependencies NET_L2_ETHERNET && SOC_MIMXRT1052 && SOC_SERIES_IMX_RT
with value n, but is currently being y-selected by the following
symbols:
- SOC_MIMXRT1021 (defined at soc/arm/nxp_imx/rt/Kconfig.soc:12),
with value y, direct dependencies <choice> (value: y), and select
condition <choice> (value: y)
This is due to the fact the ENET PLL is the one used by the ARM core on
the MIMXRT1021 so it is always enabled, while it is declared protected
by NET_L2_ETHERNET and SOC_SERIES_IMX_RT.
Fix that by declaring the symbol in Kconfig.defconfig.series.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Remove redundant inclusion of nrf.h (included by nrfx.h).
Group the logging/log.h inclusion together with the other
inclusions in this file (make inclusions' list look as in
nrf9160/soc.c).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Remove the locally-defined macros which define the base
addresses for XICR, Peripheral space and PPB. The macros
are not used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Enables the mcux lpi2c shim driver and clocks on all imx rt socs when
the i2c driver interface is enabled.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts fixups for lpuart instance 2, which will be used for the
arduino_serial connection on the mimxrt1020_evk board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Clean up a left over from GPIO driver factorization.
Definition of GPIO_REG_SIZE and GPIO_PORTS_BASE do not need anymore
to be spread accross SoCs.
Put these definitions directly in STM32 pinmux driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit introduces a new Kconfig symbol to signify
that a CPU implements the Nordic-specific security
attribution unit. The symbol is meant to be selected
by Nordic SoCs that implement the System Protection
Unit (SPU) peripheral.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds the nRF9160 fixup and the source files
for SOC and MPU boot configuration.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit introduces the Kconfig file structure for nrf9160
SoC in the Zephyr tree.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Support musca board as a variant, it is a Cortex-M33 based SoC.
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
Signed-off-by: Minos Galanakis <minos.galanakis@arm.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
SAMD2x series have available the Optional Vector Table Offset Register
(VTOR). If this option is not selected, SCB->VTOR is not configured
properly and the application hangs if it's located in an offset
different than 0.
Removed select CPU_CORTEX_M from SAMD20, as it's already selected by
select CPU_CORTEX_M0PLUS
Signed-off-by: Miguel A. Borrego <jimjim17@gmail.com>
This commit renames the CLOCK_CONTROL_NRF5 Kconfig symbol to
CLOCK_CONTROL_NRF. The change is required to aleviates confusion
when selecting the symbol in nRF9160 SOC definition.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
In the wake of 9cbe468a470fe6a103557d4352d37604a632b2fe we need
to update the nomenclature of DT_FLASH_DEV_NAME macros.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The CIAA and QFAB variants of the nRF52832 were missing in Kconfig,
although present in Device Tree. Add the relevant Kconfig entries in
order to be able to select them.
Fixes#12417
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Add support for the TRNG device contained in the i.MX RT SoCs. It uses
the existing MCUX driver, and mostly consists in adding the Kconfig and
DTS entries.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The original implementation of gpio functions access registers
directly. Using LL library can add a set of unifying access
functions for all series of stm32 for avoiding accessing low level
code, and improve readability.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
All series STM32 have mostly the same GPIO architecture
and can share the same code for GPIO manipulation.
Functions of the external interrupt line control are also the same.
This patch extracts common code from them and put them into the 'common'
folder.
Functions of control GPIO of these series scattered in
soc/arm/st_stm32/stm32xx/ folders contain these functions:
stm32_gpio_flags_to_conf(), stm32_gpio_configure(), stm32_gpio_set(),
stm32_gpio_get, stm32_gpio_enable_int().
This patch merges them into the gpio_stm32.c file.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
