soc: nordic: add Kconfig structure for nRF9160 SOC definition

This commit introduces the Kconfig file structure for nrf9160
SoC in the Zephyr tree.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>

soc/arm/nordic_nrf/nrf91/CMakeLists.txt

@@ -0,0 +1,5 @@
+zephyr_sources(
+  soc.c
+  )
+
+zephyr_sources_ifdef(CONFIG_ARM_MPU mpu_regions.c)

soc/arm/nordic_nrf/nrf91/Kconfig.defconfig.nrf9160_SICA

@@ -0,0 +1,20 @@
+# Kconfig.defconfig.nrf9160 - Nordic Semiconductor nRF9160 MCU
+#
+# Copyright (c) 2018 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+
+if SOC_NRF9160_SICA
+
+config SOC
+	string
+	default "nRF9160_SICA"
+
+config NUM_IRQS
+	int
+	default 65
+
+endif # SOC_NRF9160_SICA
+

soc/arm/nordic_nrf/nrf91/Kconfig.defconfig.series

@@ -0,0 +1,25 @@
+# Kconfig.defconfig.series - Nordic Semiconductor nRF91 MCU line
+#
+# Copyright (c) 2018 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if SOC_SERIES_NRF91X
+
+source "soc/arm/nordic_nrf/nrf91/Kconfig.defconfig.nrf91*"
+
+config SOC_SERIES
+	default "nrf91"
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	int
+	default 32768
+
+config ARCH_HAS_CUSTOM_BUSY_WAIT
+	default y
+
+config SYS_POWER_MANAGEMENT
+	default y
+
+endif # SOC_SERIES_NRF91X

soc/arm/nordic_nrf/nrf91/Kconfig.series

@@ -0,0 +1,26 @@
+# Kconfig.series - Nordic Semiconductor nRF91 MCU line
+#
+# Copyright (c) 2018 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config  SOC_SERIES_NRF91X
+	bool "Nordic Semiconductor nRF91 series MCU"
+	select CPU_CORTEX_M33
+	select CPU_HAS_ARM_MPU
+	select CPU_HAS_NRF_IDAU
+	select CPU_HAS_FPU
+	select ARMV8_M_DSP
+	select SOC_FAMILY_NRF
+	select NRF_RTC_TIMER
+	select CLOCK_CONTROL
+	select CLOCK_CONTROL_NRF5
+	select SYS_POWER_DEEP_SLEEP_SUPPORTED
+	select SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
+	select XIP
+	select HAS_CMSIS
+	select HAS_NRFX
+	select HAS_SEGGER_RTT
+	help
+	 Enable support for NRF91 MCU series

soc/arm/nordic_nrf/nrf91/Kconfig.soc

@@ -0,0 +1,75 @@
+# Kconfig.soc - Nordic Semiconductor nRF91 MCU line
+#
+# Copyright (c) 2018 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config SOC_NRF9160
+	depends on SOC_SERIES_NRF91X
+	bool
+	select HAS_HW_NRF_CC310
+	select HAS_HW_NRF_CLOCK
+	select HAS_HW_NRF_EGU0
+	select HAS_HW_NRF_EGU1
+	select HAS_HW_NRF_EGU2
+	select HAS_HW_NRF_EGU3
+	select HAS_HW_NRF_EGU4
+	select HAS_HW_NRF_EGU5
+	select HAS_HW_NRF_GPIO0
+	select HAS_HW_NRF_GPIOTE
+	select HAS_HW_NRF_I2S
+	select HAS_HW_NRF_PDM
+	select HAS_HW_NRF_POWER
+	select HAS_HW_NRF_PWM0
+	select HAS_HW_NRF_PWM1
+	select HAS_HW_NRF_PWM2
+	select HAS_HW_NRF_PWM3
+	select HAS_HW_NRF_RTC0
+	select HAS_HW_NRF_RTC1
+	select HAS_HW_NRF_SAADC
+	select HAS_HW_NRF_SPIM0
+	select HAS_HW_NRF_SPIM1
+	select HAS_HW_NRF_SPIM2
+	select HAS_HW_NRF_SPIM3
+	select HAS_HW_NRF_SPIS0
+	select HAS_HW_NRF_SPIS1
+	select HAS_HW_NRF_SPIS2
+	select HAS_HW_NRF_SPIS3
+	select HAS_HW_NRF_SPU
+	select HAS_HW_NRF_TIMER0
+	select HAS_HW_NRF_TIMER1
+	select HAS_HW_NRF_TIMER2
+	select HAS_HW_NRF_TWIM0
+	select HAS_HW_NRF_TWIM1
+	select HAS_HW_NRF_TWIM2
+	select HAS_HW_NRF_TWIM3
+	select HAS_HW_NRF_TWIS0
+	select HAS_HW_NRF_TWIS1
+	select HAS_HW_NRF_TWIS2
+	select HAS_HW_NRF_TWIS3
+	select HAS_HW_NRF_UARTE0
+	select HAS_HW_NRF_UARTE1
+	select HAS_HW_NRF_UARTE2
+	select HAS_HW_NRF_UARTE3
+	select HAS_HW_NRF_WDT
+
+choice
+prompt "nRF91x MCU Selection"
+	depends on SOC_SERIES_NRF91X
+
+config SOC_NRF9160_SICA
+	bool "NRF9160_SICA"
+	select SOC_NRF9160
+
+endchoice
+
+config GPIO_AS_PINRESET
+	bool "GPIO as pin reset (reset button)"
+	depends on SOC_SERIES_NRF91X
+	default y
+
+config NRF_ENABLE_ICACHE
+	bool "Enable the instruction cache (I-Cache)"
+	depends on SOC_NRF9160
+	default y

soc/arm/nordic_nrf/nrf91/linker.ld

@@ -0,0 +1,9 @@
+/* linker.ld - Linker command/script file */
+
+/*
+ * Copyright (c) 2014 Wind River Systems, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <arch/arm/cortex_m/scripts/linker.ld>