drivers: clock control: nrf: rename CLOCK_CONTROL_NRF5 Kconfig symbol
This commit renames the CLOCK_CONTROL_NRF5 Kconfig symbol to CLOCK_CONTROL_NRF. The change is required to aleviates confusion when selecting the symbol in nRF9160 SOC definition. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
parent
1c7d8cad5c
commit
302a746bd6
17 changed files with 74 additions and 74 deletions
|
@ -5,8 +5,8 @@ CONFIG_SOC_NRF51822_QFAA=y
|
|||
CONFIG_BOARD_BBC_MICROBIT=y
|
||||
|
||||
# clock control
|
||||
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_RC=y
|
||||
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_250PPM=y
|
||||
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
|
||||
CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM=y
|
||||
|
||||
# enable uart driver
|
||||
CONFIG_SERIAL=y
|
||||
|
|
|
@ -9,7 +9,7 @@ config BOARD_NRF52_BSIM
|
|||
select CONSOLE_HAS_DRIVER
|
||||
select NRF_RTC_TIMER
|
||||
select CLOCK_CONTROL
|
||||
select CLOCK_CONTROL_NRF5
|
||||
select CLOCK_CONTROL_NRF
|
||||
help
|
||||
Will produce a console Linux process which can be executed natively.
|
||||
It needs the BabbleSim simulator both in compile time and to execute
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_BEETLE beetle_clock_control.c)
|
||||
zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_CCM clock_control_mcux_ccm.c)
|
||||
zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_SIM clock_control_mcux_sim.c)
|
||||
zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF5 nrf5_power_clock.c)
|
||||
zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF nrf5_power_clock.c)
|
||||
zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_QUARK_SE quark_se_clock_control.c)
|
||||
|
||||
if(CONFIG_CLOCK_CONTROL_STM32_CUBE)
|
||||
|
|
|
@ -4,45 +4,45 @@
|
|||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
menuconfig CLOCK_CONTROL_NRF5
|
||||
bool "NRF5 Clock controller support"
|
||||
menuconfig CLOCK_CONTROL_NRF
|
||||
bool "NRF Clock controller support"
|
||||
depends on SOC_COMPATIBLE_NRF
|
||||
help
|
||||
Enable support for the Nordic Semiconductor nRF5x series SoC clock
|
||||
Enable support for the Nordic Semiconductor nRFxx series SoC clock
|
||||
driver.
|
||||
|
||||
if CLOCK_CONTROL_NRF5
|
||||
if CLOCK_CONTROL_NRF
|
||||
|
||||
config CLOCK_CONTROL_NRF5_IRQ_PRIORITY
|
||||
config CLOCK_CONTROL_NRF_IRQ_PRIORITY
|
||||
int "Power Clock Interrupt Priority"
|
||||
range 0 7
|
||||
default 1
|
||||
help
|
||||
The interrupt priority for Power Clock interrupt.
|
||||
|
||||
config CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME
|
||||
string "NRF5 16MHz clock device name"
|
||||
config CLOCK_CONTROL_NRF_M16SRC_DRV_NAME
|
||||
string "NRFx 16MHz clock device name"
|
||||
default "clk_m16src"
|
||||
|
||||
config CLOCK_CONTROL_NRF5_K32SRC_DRV_NAME
|
||||
string "NRF5 32KHz clock device name"
|
||||
config CLOCK_CONTROL_NRF_K32SRC_DRV_NAME
|
||||
string "NRFx 32KHz clock device name"
|
||||
default "clk_k32src"
|
||||
|
||||
choice
|
||||
prompt "32KHz clock source"
|
||||
default CLOCK_CONTROL_NRF5_K32SRC_XTAL
|
||||
default CLOCK_CONTROL_NRF_K32SRC_XTAL
|
||||
|
||||
config CLOCK_CONTROL_NRF5_K32SRC_RC
|
||||
config CLOCK_CONTROL_NRF_K32SRC_RC
|
||||
bool "RC Oscillator"
|
||||
|
||||
config CLOCK_CONTROL_NRF5_K32SRC_XTAL
|
||||
config CLOCK_CONTROL_NRF_K32SRC_XTAL
|
||||
bool "Crystal Oscillator"
|
||||
|
||||
endchoice
|
||||
|
||||
config CLOCK_CONTROL_NRF5_K32SRC_BLOCKING
|
||||
config CLOCK_CONTROL_NRF_K32SRC_BLOCKING
|
||||
bool "Blocking 32KHz crystal oscillator startup"
|
||||
depends on CLOCK_CONTROL_NRF5_K32SRC_XTAL
|
||||
depends on CLOCK_CONTROL_NRF_K32SRC_XTAL
|
||||
help
|
||||
Clock control driver will spin wait in CPU sleep until 32KHz
|
||||
crystal oscillator starts up. If not enabled, RC oscillator will
|
||||
|
@ -51,33 +51,33 @@ config CLOCK_CONTROL_NRF5_K32SRC_BLOCKING
|
|||
|
||||
choice
|
||||
prompt "32KHz clock accuracy"
|
||||
default CLOCK_CONTROL_NRF5_K32SRC_500PPM if CLOCK_CONTROL_NRF5_K32SRC_RC
|
||||
default CLOCK_CONTROL_NRF5_K32SRC_20PPM
|
||||
default CLOCK_CONTROL_NRF_K32SRC_500PPM if CLOCK_CONTROL_NRF_K32SRC_RC
|
||||
default CLOCK_CONTROL_NRF_K32SRC_20PPM
|
||||
|
||||
config CLOCK_CONTROL_NRF5_K32SRC_500PPM
|
||||
config CLOCK_CONTROL_NRF_K32SRC_500PPM
|
||||
bool "251 ppm to 500 ppm"
|
||||
|
||||
config CLOCK_CONTROL_NRF5_K32SRC_250PPM
|
||||
config CLOCK_CONTROL_NRF_K32SRC_250PPM
|
||||
bool "151 ppm to 250 ppm"
|
||||
|
||||
config CLOCK_CONTROL_NRF5_K32SRC_150PPM
|
||||
config CLOCK_CONTROL_NRF_K32SRC_150PPM
|
||||
bool "101 ppm to 150 ppm"
|
||||
|
||||
config CLOCK_CONTROL_NRF5_K32SRC_100PPM
|
||||
config CLOCK_CONTROL_NRF_K32SRC_100PPM
|
||||
bool "76 ppm to 100 ppm"
|
||||
|
||||
config CLOCK_CONTROL_NRF5_K32SRC_75PPM
|
||||
config CLOCK_CONTROL_NRF_K32SRC_75PPM
|
||||
bool "51 ppm to 75 ppm"
|
||||
|
||||
config CLOCK_CONTROL_NRF5_K32SRC_50PPM
|
||||
config CLOCK_CONTROL_NRF_K32SRC_50PPM
|
||||
bool "31 ppm to 50 ppm"
|
||||
|
||||
config CLOCK_CONTROL_NRF5_K32SRC_30PPM
|
||||
config CLOCK_CONTROL_NRF_K32SRC_30PPM
|
||||
bool "21 ppm to 30 ppm"
|
||||
|
||||
config CLOCK_CONTROL_NRF5_K32SRC_20PPM
|
||||
config CLOCK_CONTROL_NRF_K32SRC_20PPM
|
||||
bool "0 ppm to 20 ppm"
|
||||
|
||||
endchoice
|
||||
|
||||
endif # CLOCK_CONTROL_NRF5
|
||||
endif # CLOCK_CONTROL_NRF
|
||||
|
|
|
@ -150,9 +150,9 @@ static int _k32src_start(struct device *dev, clock_control_subsys_t sub_system)
|
|||
u32_t imask;
|
||||
u32_t stat;
|
||||
|
||||
#if defined(CONFIG_CLOCK_CONTROL_NRF5_K32SRC_BLOCKING)
|
||||
#if defined(CONFIG_CLOCK_CONTROL_NRF_K32SRC_BLOCKING)
|
||||
u32_t intenset;
|
||||
#endif /* CONFIG_CLOCK_CONTROL_NRF5_K32SRC_BLOCKING */
|
||||
#endif /* CONFIG_CLOCK_CONTROL_NRF_K32SRC_BLOCKING */
|
||||
|
||||
/* If the LF clock is already started, but wasn't initialized with
|
||||
* this function, allow it to run once. This is needed because if a
|
||||
|
@ -183,7 +183,7 @@ static int _k32src_start(struct device *dev, clock_control_subsys_t sub_system)
|
|||
lf_clk_src = POINTER_TO_UINT(sub_system);
|
||||
NRF_CLOCK->LFCLKSRC = lf_clk_src;
|
||||
|
||||
#if defined(CONFIG_CLOCK_CONTROL_NRF5_K32SRC_BLOCKING)
|
||||
#if defined(CONFIG_CLOCK_CONTROL_NRF_K32SRC_BLOCKING)
|
||||
irq_disable(POWER_CLOCK_IRQn);
|
||||
|
||||
intenset = NRF_CLOCK->INTENSET;
|
||||
|
@ -208,13 +208,13 @@ static int _k32src_start(struct device *dev, clock_control_subsys_t sub_system)
|
|||
|
||||
irq_enable(POWER_CLOCK_IRQn);
|
||||
|
||||
#else /* !CONFIG_CLOCK_CONTROL_NRF5_K32SRC_BLOCKING */
|
||||
#else /* !CONFIG_CLOCK_CONTROL_NRF_K32SRC_BLOCKING */
|
||||
/* NOTE: LFCLK will initially start running from the LFRC if LFXO is
|
||||
* selected.
|
||||
*/
|
||||
nrf_clock_int_enable(NRF_CLOCK_INT_LF_STARTED_MASK);
|
||||
nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTART);
|
||||
#endif /* !CONFIG_CLOCK_CONTROL_NRF5_K32SRC_BLOCKING */
|
||||
#endif /* !CONFIG_CLOCK_CONTROL_NRF_K32SRC_BLOCKING */
|
||||
|
||||
/* If RC selected, calibrate and start timer for consecutive
|
||||
* calibrations.
|
||||
|
@ -420,7 +420,7 @@ static int _clock_control_init(struct device *dev)
|
|||
* NOTE: Currently the operations here are idempotent.
|
||||
*/
|
||||
IRQ_CONNECT(NRF5_IRQ_POWER_CLOCK_IRQn,
|
||||
CONFIG_CLOCK_CONTROL_NRF5_IRQ_PRIORITY,
|
||||
CONFIG_CLOCK_CONTROL_NRF_IRQ_PRIORITY,
|
||||
_power_clock_isr, 0, 0);
|
||||
|
||||
irq_enable(POWER_CLOCK_IRQn);
|
||||
|
@ -435,7 +435,7 @@ static const struct clock_control_driver_api _m16src_clock_control_api = {
|
|||
};
|
||||
|
||||
DEVICE_AND_API_INIT(clock_nrf5_m16src,
|
||||
CONFIG_CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME,
|
||||
CONFIG_CLOCK_CONTROL_NRF_M16SRC_DRV_NAME,
|
||||
_clock_control_init, NULL, NULL, PRE_KERNEL_1,
|
||||
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
&_m16src_clock_control_api);
|
||||
|
@ -447,7 +447,7 @@ static const struct clock_control_driver_api _k32src_clock_control_api = {
|
|||
};
|
||||
|
||||
DEVICE_AND_API_INIT(clock_nrf5_k32src,
|
||||
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_DRV_NAME,
|
||||
CONFIG_CLOCK_CONTROL_NRF_K32SRC_DRV_NAME,
|
||||
_clock_control_init, NULL, NULL, PRE_KERNEL_1,
|
||||
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
&_k32src_clock_control_api);
|
||||
|
|
|
@ -354,7 +354,7 @@ static int nrf5_init(struct device *dev)
|
|||
k_sem_init(&nrf5_radio->tx_wait, 0, 1);
|
||||
k_sem_init(&nrf5_radio->cca_wait, 0, 1);
|
||||
|
||||
clk_m16 = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME);
|
||||
clk_m16 = device_get_binding(CONFIG_CLOCK_CONTROL_NRF_M16SRC_DRV_NAME);
|
||||
if (!clk_m16) {
|
||||
return -ENODEV;
|
||||
}
|
||||
|
|
|
@ -32,7 +32,7 @@ static int send_buf(u8_t *buf, size_t len)
|
|||
*/
|
||||
u32_t i = 0U;
|
||||
|
||||
clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME);
|
||||
clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF_M16SRC_DRV_NAME);
|
||||
if (!clock) {
|
||||
LOG_ERR("Unable to get HF clock");
|
||||
return -EIO;
|
||||
|
|
|
@ -112,7 +112,7 @@ static int temp_nrf5_init(struct device *dev)
|
|||
LOG_DBG("");
|
||||
|
||||
data->clk_m16_dev =
|
||||
device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME);
|
||||
device_get_binding(CONFIG_CLOCK_CONTROL_NRF_M16SRC_DRV_NAME);
|
||||
__ASSERT_NO_MSG(data->clk_m16_dev);
|
||||
|
||||
k_sem_init(&data->device_sync_sem, 0, UINT_MAX);
|
||||
|
|
|
@ -152,7 +152,7 @@ config ALTERA_AVALON_TIMER
|
|||
config NRF_RTC_TIMER
|
||||
bool "nRF Real Time Counter (NRF_RTC1) Timer"
|
||||
default y
|
||||
depends on CLOCK_CONTROL_NRF5
|
||||
depends on CLOCK_CONTROL_NRF
|
||||
select TICKLESS_CAPABLE
|
||||
help
|
||||
This module implements a kernel device driver for the nRF Real Time
|
||||
|
|
|
@ -79,12 +79,12 @@ int z_clock_driver_init(struct device *device)
|
|||
|
||||
ARG_UNUSED(device);
|
||||
|
||||
clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_K32SRC_DRV_NAME);
|
||||
clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF_K32SRC_DRV_NAME);
|
||||
if (!clock) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
clock_control_on(clock, (void *)CLOCK_CONTROL_NRF5_K32SRC);
|
||||
clock_control_on(clock, (void *)CLOCK_CONTROL_NRF_K32SRC);
|
||||
|
||||
/* TODO: replace with counter driver to access RTC */
|
||||
nrf_rtc_prescaler_set(RTC, 0);
|
||||
|
|
|
@ -479,7 +479,7 @@ static int hf_clock_enable(bool on, bool blocking)
|
|||
int ret = -ENODEV;
|
||||
struct device *clock;
|
||||
|
||||
clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME);
|
||||
clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF_M16SRC_DRV_NAME);
|
||||
if (!clock) {
|
||||
LOG_ERR("NRF HF Clock device not found!");
|
||||
return ret;
|
||||
|
|
|
@ -14,37 +14,37 @@
|
|||
/* TODO: move all these to clock_control.h ? */
|
||||
|
||||
/* Define 32KHz clock source */
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_RC
|
||||
#define CLOCK_CONTROL_NRF5_K32SRC 0
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC
|
||||
#define CLOCK_CONTROL_NRF_K32SRC 0
|
||||
#endif
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_XTAL
|
||||
#define CLOCK_CONTROL_NRF5_K32SRC 1
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL
|
||||
#define CLOCK_CONTROL_NRF_K32SRC 1
|
||||
#endif
|
||||
|
||||
/* Define 32KHz clock accuracy */
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_500PPM
|
||||
#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 0
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM
|
||||
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 0
|
||||
#endif
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_250PPM
|
||||
#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 1
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM
|
||||
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 1
|
||||
#endif
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_150PPM
|
||||
#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 2
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_150PPM
|
||||
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 2
|
||||
#endif
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_100PPM
|
||||
#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 3
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_100PPM
|
||||
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 3
|
||||
#endif
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_75PPM
|
||||
#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 4
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_75PPM
|
||||
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 4
|
||||
#endif
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_50PPM
|
||||
#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 5
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_50PPM
|
||||
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 5
|
||||
#endif
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_30PPM
|
||||
#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 6
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_30PPM
|
||||
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 6
|
||||
#endif
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_20PPM
|
||||
#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 7
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_20PPM
|
||||
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 7
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_USB) && defined(CONFIG_SOC_NRF52840)
|
||||
|
|
|
@ -12,7 +12,7 @@ config SOC_SERIES_NRF51X
|
|||
select SOC_FAMILY_NRF
|
||||
select NRF_RTC_TIMER
|
||||
select CLOCK_CONTROL
|
||||
select CLOCK_CONTROL_NRF5
|
||||
select CLOCK_CONTROL_NRF
|
||||
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
|
||||
select XIP
|
||||
select HAS_CMSIS
|
||||
|
|
|
@ -13,7 +13,7 @@ config SOC_SERIES_NRF52X
|
|||
select SOC_FAMILY_NRF
|
||||
select NRF_RTC_TIMER
|
||||
select CLOCK_CONTROL
|
||||
select CLOCK_CONTROL_NRF5
|
||||
select CLOCK_CONTROL_NRF
|
||||
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
|
||||
select SYS_POWER_STATE_CPU_LPS_SUPPORTED
|
||||
select SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
#include <bluetooth/hci.h>
|
||||
#include <drivers/bluetooth/hci_driver.h>
|
||||
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF
|
||||
#include <drivers/clock_control/nrf5_clock_control.h>
|
||||
#endif
|
||||
|
||||
|
|
|
@ -4753,11 +4753,11 @@ static void k32src_wait(void)
|
|||
done = true;
|
||||
|
||||
struct device *lf_clock = device_get_binding(
|
||||
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_DRV_NAME);
|
||||
CONFIG_CLOCK_CONTROL_NRF_K32SRC_DRV_NAME);
|
||||
|
||||
LL_ASSERT(lf_clock);
|
||||
|
||||
while (clock_control_on(lf_clock, (void *)CLOCK_CONTROL_NRF5_K32SRC)) {
|
||||
while (clock_control_on(lf_clock, (void *)CLOCK_CONTROL_NRF_K32SRC)) {
|
||||
DEBUG_CPU_SLEEP(1);
|
||||
cpu_sleep();
|
||||
DEBUG_CPU_SLEEP(0);
|
||||
|
|
|
@ -11,7 +11,7 @@
|
|||
#include <soc.h>
|
||||
#include <device.h>
|
||||
#include <clock_control.h>
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5
|
||||
#ifdef CONFIG_CLOCK_CONTROL_NRF
|
||||
#include <drivers/clock_control/nrf5_clock_control.h>
|
||||
#endif
|
||||
#include <bluetooth/hci.h>
|
||||
|
@ -127,12 +127,12 @@ int ll_init(struct k_sem *sem_rx)
|
|||
|
||||
sem_recv = sem_rx;
|
||||
|
||||
clk_k32 = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_K32SRC_DRV_NAME);
|
||||
clk_k32 = device_get_binding(CONFIG_CLOCK_CONTROL_NRF_K32SRC_DRV_NAME);
|
||||
if (!clk_k32) {
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
clock_control_on(clk_k32, (void *)CLOCK_CONTROL_NRF5_K32SRC);
|
||||
clock_control_on(clk_k32, (void *)CLOCK_CONTROL_NRF_K32SRC);
|
||||
|
||||
entropy = device_get_binding(CONFIG_ENTROPY_NAME);
|
||||
if (!entropy) {
|
||||
|
@ -158,12 +158,12 @@ int ll_init(struct k_sem *sem_rx)
|
|||
hal_ticker_instance0_trigger_set);
|
||||
LL_ASSERT(!err);
|
||||
|
||||
clk_m16 = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME);
|
||||
clk_m16 = device_get_binding(CONFIG_CLOCK_CONTROL_NRF_M16SRC_DRV_NAME);
|
||||
if (!clk_m16) {
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
err = radio_init(clk_m16, CLOCK_CONTROL_NRF5_K32SRC_ACCURACY, entropy,
|
||||
err = radio_init(clk_m16, CLOCK_CONTROL_NRF_K32SRC_ACCURACY, entropy,
|
||||
RADIO_CONNECTION_CONTEXT_MAX,
|
||||
RADIO_PACKET_COUNT_RX_MAX,
|
||||
RADIO_PACKET_COUNT_TX_MAX,
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue