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soc: nxp_imx: Enable mcux elcdif driver and clocks

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Enables the mcux elcdif shim driver and clocks on imx rt socs when the
display driver interface is enabled.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm 2019-01-02 13:11:28 -06:00 • committed by Kumar Gala
commit bf0abe4438
3 changed files with 34 additions and 0 deletions
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7
soc/arm/nxp_imx/rt/Kconfig.defconfig.series
View file

@ -27,6 +27,13 @@ config CLOCK_CONTROL_MCUX_CCM
endif # CLOCK_CONTROL
if DISPLAY
config DISPLAY_MCUX_ELCDIF
default y if HAS_MCUX_ELCDIF
endif # DISPLAY
if GPIO
config GPIO_MCUX_IGPIO

9
soc/arm/nxp_imx/rt/Kconfig.soc
View file

@ -48,6 +48,7 @@ config SOC_MIMXRT1052
select HAS_MCUX
select HAS_MCUX_CACHE
select HAS_MCUX_CCM
select HAS_MCUX_ELCDIF
select HAS_MCUX_ENET
select HAS_MCUX_IGPIO
select HAS_MCUX_LPI2C
@ -59,6 +60,7 @@ config SOC_MIMXRT1052
select INIT_ARM_PLL
select INIT_SYS_PLL
select INIT_USB1_PLL
select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF
config SOC_MIMXRT1061
bool "SOC_MIMXRT1061"
@ -81,6 +83,7 @@ config SOC_MIMXRT1062
select HAS_MCUX
select HAS_MCUX_CACHE
select HAS_MCUX_CCM
select HAS_MCUX_ELCDIF
select HAS_MCUX_ENET
select HAS_MCUX_IGPIO
select HAS_MCUX_LPI2C
@ -91,11 +94,13 @@ config SOC_MIMXRT1062
select INIT_ARM_PLL
select INIT_SYS_PLL
select INIT_USB1_PLL
select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF
config SOC_MIMXRT1064
bool "SOC_MIMXRT1064"
select HAS_MCUX
select HAS_MCUX_CCM
select HAS_MCUX_ELCDIF
select HAS_MCUX_ENET
select HAS_MCUX_IGPIO
select HAS_MCUX_LPUART
@ -105,6 +110,7 @@ config SOC_MIMXRT1064
select INIT_ARM_PLL
select INIT_SYS_PLL
select INIT_USB1_PLL
select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF
endchoice
@ -182,6 +188,9 @@ config INIT_SYS_PLL
config INIT_USB1_PLL
bool "Initialize USB1 PLL"
config INIT_VIDEO_PLL
bool "Initialize Video PLL"
config ARM_DIV
int "ARM clock divider"
range 0 7

18
soc/arm/nxp_imx/rt/soc.c
View file

@ -49,6 +49,15 @@ const clock_enet_pll_config_t ethPllConfig = {
};
#endif
#ifdef CONFIG_INIT_VIDEO_PLL
const clock_video_pll_config_t videoPllConfig = {
.loopDivider = 31,
.postDivider = 8,
.numerator = 0,
.denominator = 0,
};
#endif
#ifdef CONFIG_NXP_IMX_RT_BOOT_HEADER
const __imx_boot_data_section BOOT_DATA_T boot_data = {
.start = CONFIG_FLASH_BASE_ADDRESS,
@ -115,6 +124,9 @@ static ALWAYS_INLINE void clkInit(void)
#ifdef CONFIG_INIT_ENET_PLL
CLOCK_InitEnetPll(&ethPllConfig);
#endif
#ifdef CONFIG_INIT_VIDEO_PLL
CLOCK_InitVideoPll(&videoPllConfig);
#endif
CLOCK_SetDiv(kCLOCK_ArmDiv, CONFIG_ARM_DIV); /* Set ARM PODF */
CLOCK_SetDiv(kCLOCK_AhbDiv, CONFIG_AHB_DIV); /* Set AHB PODF */
@ -142,6 +154,12 @@ static ALWAYS_INLINE void clkInit(void)
CLOCK_SetDiv(kCLOCK_LpspiDiv, 7); /* Set SPI divider to 8 */
#endif
#ifdef CONFIG_DISPLAY_MCUX_ELCDIF
CLOCK_SetMux(kCLOCK_LcdifPreMux, 2);
CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 4);
CLOCK_SetDiv(kCLOCK_LcdifDiv, 1);
#endif
/* Keep the system clock running so SYSTICK can wake up the system from
* wfi.
*/