soc: arm: nrf51: Backport power management code from nRF52
This commit ports power management code from nRF52 to the nRF51 SoC, enabling usage of Zephyr Power Management policies on this platform. Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
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4 changed files with 151 additions and 2 deletions
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@ -13,7 +13,8 @@ config SOC_SERIES_NRF51X
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select NRF_RTC_TIMER
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select CLOCK_CONTROL
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select CLOCK_CONTROL_NRF
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select SYS_POWER_LOW_POWER_STATE_SUPPORTED
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select SYS_POWER_DEEP_SLEEP_SUPPORTED
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select SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
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select XIP
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select HAS_CMSIS
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select HAS_NRFX
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@ -1,11 +1,95 @@
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/*
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* Copyright (c) 2018 Intel Corporation.
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* Copyright (c) 2017 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr.h>
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#include <soc_power.h>
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#include <nrf_power.h>
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#include <logging/log.h>
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LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
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/* Invoke Low Power/System Off specific Tasks */
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void sys_set_power_state(enum power_states state)
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{
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switch (state) {
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#ifdef CONFIG_SYS_POWER_DEEP_SLEEP
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#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
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case SYS_POWER_STATE_DEEP_SLEEP:
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nrf_power_system_off();
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break;
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#endif
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#endif
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default:
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LOG_ERR("Unsupported power state %u", state);
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break;
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}
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}
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/* Handle SOC specific activity after Low Power Mode Exit */
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void sys_power_state_post_ops(enum power_states state)
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{
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switch (state) {
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#ifdef CONFIG_SYS_POWER_DEEP_SLEEP
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#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
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case SYS_POWER_STATE_DEEP_SLEEP:
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/* Nothing to do. */
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break;
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#endif
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#endif
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default:
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LOG_ERR("Unsupported power state %u", state);
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break;
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}
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/*
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* System is now in active mode. Reenable interrupts which were disabled
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* when OS started idling code.
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*/
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irq_unlock(0);
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}
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bool sys_is_valid_power_state(enum power_states state)
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{
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switch (state) {
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#ifdef CONFIG_SYS_POWER_LOW_POWER_STATE
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#ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_SUPPORTED
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case SYS_POWER_STATE_CPU_LPS:
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return true;
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#endif
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#ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
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case SYS_POWER_STATE_CPU_LPS_1:
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return true;
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#endif
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#ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
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case SYS_POWER_STATE_CPU_LPS_2:
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return true;
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#endif
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#endif /* CONFIG_SYS_POWER_LOW_POWER_STATE */
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#ifdef CONFIG_SYS_POWER_DEEP_SLEEP
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#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
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case SYS_POWER_STATE_DEEP_SLEEP:
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return true;
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#endif
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#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
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case SYS_POWER_STATE_DEEP_SLEEP_1:
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return true;
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#endif
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#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_2_SUPPORTED
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case SYS_POWER_STATE_DEEP_SLEEP_2:
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return true;
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#endif
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#endif /* CONFIG_SYS_POWER_DEEP_SLEEP */
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default:
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return false;
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}
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/* Not reached */
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}
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/* Overrides the weak ARM implementation:
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Set general purpose retention register and reboot */
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void sys_arch_reboot(int type)
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@ -16,6 +16,8 @@
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#include <nrf_common.h>
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#include <nrf.h>
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#include <soc_power.h>
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/* Add include for DTS generated information */
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#include <generated_dts_board.h>
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62
soc/arm/nordic_nrf/nrf51/soc_power.h
Normal file
62
soc/arm/nordic_nrf/nrf51/soc_power.h
Normal file
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@ -0,0 +1,62 @@
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/*
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* Copyright (c) 2017 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _SOC_POWER_H_
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#define _SOC_POWER_H_
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#include <stdbool.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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enum power_states {
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#ifdef CONFIG_SYS_POWER_LOW_POWER_STATE
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# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_SUPPORTED
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SYS_POWER_STATE_CPU_LPS, /* Not used */
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# endif
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# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
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SYS_POWER_STATE_CPU_LPS_1, /* Not used */
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# endif
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# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
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SYS_POWER_STATE_CPU_LPS_2, /* Not used */
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# endif
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#endif /* CONFIG_SYS_POWER_LOW_POWER_STATE */
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#ifdef CONFIG_SYS_POWER_DEEP_SLEEP
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# ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
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SYS_POWER_STATE_DEEP_SLEEP, /* System OFF */
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# endif
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# ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
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SYS_POWER_STATE_DEEP_SLEEP_1, /* Not used */
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# endif
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# ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_2_SUPPORTED
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SYS_POWER_STATE_DEEP_SLEEP_2, /* Not used */
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# endif
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#endif /* CONFIG_SYS_POWER_DEEP_SLEEP */
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SYS_POWER_STATE_MAX /* Do nothing */
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};
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/**
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* @brief Put processor into low power state
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*/
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void sys_set_power_state(enum power_states state);
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/**
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* @brief Check the low power state is supported by SoC
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*/
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bool sys_is_valid_power_state(enum power_states state);
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/**
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* @brief Do any SoC or architecture specific post ops after low power states.
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*/
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void sys_power_state_post_ops(enum power_states state);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SOC_POWER_H_ */
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