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drivers: counter: cmsdk: Convert to new DT_<COMPAT>_<INSTANCE> defines

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Convert cmsdk driver to use new defines so we can remove the
dts_fixup.h code for it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2019-01-31 12:16:45 -06:00 • committed by Anas Nashif
commit 7809970c8a
12 changed files with 36 additions and 167 deletions
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15
boards/arm/mps2_an385/Kconfig.defconfig
View file

@ -47,23 +47,12 @@ endif # WATCHDOG
if COUNTER
if TIMER_TMR_CMSDK_APB
config TIMER_TMR_CMSDK_APB_0
config TIMER_TMR_CMSDK_APB
default y
config TIMER_TMR_CMSDK_APB_1
config TIMER_DTMR_CMSDK_APB
default y
endif # TIMER_TMR_CMSDK_APB
if TIMER_DTMR_CMSDK_APB
config TIMER_DTMR_CMSDK_APB_0
default y
endif # TIMER_DTMR_CMSDK_APB
endif # COUNTER
if I2C

11
boards/arm/mps2_an385/dts_fixup.h
View file

@ -2,17 +2,6 @@
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
/* CMSDK APB Timers */
#define DT_CMSDK_APB_TIMER0 DT_ARM_CMSDK_TIMER_40000000_BASE_ADDRESS
#define DT_CMSDK_APB_TIMER_0_IRQ DT_ARM_CMSDK_TIMER_40000000_IRQ_0
#define DT_CMSDK_APB_TIMER1 DT_ARM_CMSDK_TIMER_40001000_BASE_ADDRESS
#define DT_CMSDK_APB_TIMER_1_IRQ DT_ARM_CMSDK_TIMER_40001000_IRQ_0
/* CMSDK APB Dual Timer */
#define DT_CMSDK_APB_DTIMER DT_ARM_CMSDK_DTIMER_40002000_BASE_ADDRESS
#define DT_CMSDK_APB_DUALTIMER_IRQ DT_ARM_CMSDK_DTIMER_40002000_IRQ_0
/* CMSDK AHB General Purpose Input/Output (GPIO) */
#define DT_CMSDK_AHB_GPIO0 DT_ARM_CMSDK_GPIO_40010000_BASE_ADDRESS
#define DT_IRQ_PORT0_ALL DT_ARM_CMSDK_GPIO_40010000_IRQ_0

15
boards/arm/v2m_beetle/Kconfig.defconfig
View file

@ -56,23 +56,12 @@ endif # WATCHDOG
if COUNTER
if TIMER_TMR_CMSDK_APB
config TIMER_TMR_CMSDK_APB_0
config TIMER_TMR_CMSDK_APB
default y
config TIMER_TMR_CMSDK_APB_1
config TIMER_DTMR_CMSDK_APB
default y
endif # TIMER_TMR_CMSDK_APB
if TIMER_DTMR_CMSDK_APB
config TIMER_DTMR_CMSDK_APB_0
default y
endif # TIMER_DTMR_CMSDK_APB
endif # COUNTER
endif # BOARD_V2M_BEETLE

15
boards/arm/v2m_musca/Kconfig.defconfig
View file

@ -40,23 +40,12 @@ endif # SERIAL
if COUNTER
if TIMER_TMR_CMSDK_APB
config TIMER_TMR_CMSDK_APB_0
config TIMER_TMR_CMSDK_APB
def_bool y
config TIMER_TMR_CMSDK_APB_1
config TIMER_DTMR_CMSDK_APB
def_bool y
endif # TIMER_TMR_CMSDK_APB
if TIMER_DTMR_CMSDK_APB
config TIMER_DTMR_CMSDK_APB_0
def_bool y
endif # TIMER_DTMR_CMSDK_APB
endif # COUNTER
endif

18
drivers/counter/Kconfig.dtmr_cmsdk_apb
View file

@ -14,22 +14,4 @@ config TIMER_DTMR_CMSDK_APB
The dualtimer (DTMR) present in the platform is used as a timer.
This option enables the support for the timer.
if TIMER_DTMR_CMSDK_APB
# ---------- Timer 0 ----------
config TIMER_DTMR_CMSDK_APB_0
bool "Timer 0 driver"
help
Enable support for Timer 0.
config TIMER_DTMR_CMSDK_APB_0_IRQ_PRI
int "Interrupt Priority for Timer 0"
depends on TIMER_DTMR_CMSDK_APB_0
default 3
help
Interrupt priority for Timer 0.
endif # TIMER_DTMR_CMSDK_APB
endif # SOC_FAMILY_ARM

32
drivers/counter/Kconfig.tmr_cmsdk_apb
View file

@ -14,36 +14,4 @@ config TIMER_TMR_CMSDK_APB
The timers (TMR) present in the platform are used as timers.
This option enables the support for the timers.
if TIMER_TMR_CMSDK_APB
# ---------- Timer 0 ----------
config TIMER_TMR_CMSDK_APB_0
bool "Timer 0 driver"
help
Enable support for Timer 0.
config TIMER_TMR_CMSDK_APB_0_IRQ_PRI
int "Interrupt Priority for Timer 0"
depends on TIMER_TMR_CMSDK_APB_0
default 3
help
Interrupt priority for Timer 0.
# ---------- Timer 1 ----------
config TIMER_TMR_CMSDK_APB_1
bool "Timer 1 driver"
help
Enable support for Timer 1.
config TIMER_TMR_CMSDK_APB_1_IRQ_PRI
int "Interrupt Priority for Timer 1"
depends on TIMER_TMR_CMSDK_APB_1
default 3
help
Interrupt priority for Timer 1.
endif # TIMER_TMR_CMSDK_APB
endif # SOC_FAMILY_ARM

20
drivers/counter/timer_dtmr_cmsdk_apb.c
View file

@ -155,7 +155,7 @@ static int dtmr_cmsdk_apb_init(struct device *dev)
}
/* TIMER 0 */
#ifdef CONFIG_TIMER_DTMR_CMSDK_APB_0
#ifdef DT_ARM_CMSDK_DTIMER_0
static void dtimer_cmsdk_apb_config_0(struct device *dev);
static const struct dtmr_cmsdk_apb_cfg dtmr_cmsdk_apb_cfg_0 = {
@ -165,14 +165,14 @@ static const struct dtmr_cmsdk_apb_cfg dtmr_cmsdk_apb_cfg_0 = {
.count_up = false,
.channels = 0U,
},
.dtimer = ((volatile struct dualtimer_cmsdk_apb *)DT_CMSDK_APB_DTIMER),
.dtimer = ((volatile struct dualtimer_cmsdk_apb *)DT_ARM_CMSDK_DTIMER_0_BASE_ADDRESS),
.dtimer_config_func = dtimer_cmsdk_apb_config_0,
.dtimer_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
.device = DT_CMSDK_APB_DTIMER,},
.device = DT_ARM_CMSDK_DTIMER_0_BASE_ADDRESS,},
.dtimer_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
.device = DT_CMSDK_APB_DTIMER,},
.device = DT_ARM_CMSDK_DTIMER_0_BASE_ADDRESS,},
.dtimer_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
.device = DT_CMSDK_APB_DTIMER,},
.device = DT_ARM_CMSDK_DTIMER_0_BASE_ADDRESS,},
};
static struct dtmr_cmsdk_apb_dev_data dtmr_cmsdk_apb_dev_data_0 = {
@ -180,7 +180,7 @@ static struct dtmr_cmsdk_apb_dev_data dtmr_cmsdk_apb_dev_data_0 = {
};
DEVICE_AND_API_INIT(dtmr_cmsdk_apb_0,
DT_CMSDK_APB_DTIMER0_LABEL,
DT_ARM_CMSDK_DTIMER_0_LABEL,
dtmr_cmsdk_apb_init,
&dtmr_cmsdk_apb_dev_data_0,
&dtmr_cmsdk_apb_cfg_0, POST_KERNEL,
@ -189,10 +189,10 @@ DEVICE_AND_API_INIT(dtmr_cmsdk_apb_0,
static void dtimer_cmsdk_apb_config_0(struct device *dev)
{
IRQ_CONNECT(DT_CMSDK_APB_DUALTIMER_IRQ,
CONFIG_TIMER_DTMR_CMSDK_APB_0_IRQ_PRI,
IRQ_CONNECT(DT_ARM_CMSDK_DTIMER_0_IRQ_0,
DT_ARM_CMSDK_DTIMER_0_IRQ_0_PRIORITY,
dtmr_cmsdk_apb_isr,
DEVICE_GET(dtmr_cmsdk_apb_0), 0);
irq_enable(DT_CMSDK_APB_DUALTIMER_IRQ);
irq_enable(DT_ARM_CMSDK_DTIMER_0_IRQ_0);
}
#endif /* CONFIG_TIMER_DTMR_CMSDK_APB_0 */
#endif /* DT_ARM_CMSDK_DTIMER_0 */

36
drivers/counter/timer_tmr_cmsdk_apb.c
View file

@ -157,7 +157,7 @@ static int tmr_cmsdk_apb_init(struct device *dev)
}
/* TIMER 0 */
#ifdef CONFIG_TIMER_TMR_CMSDK_APB_0
#ifdef DT_ARM_CMSDK_TIMER_0
static void timer_cmsdk_apb_config_0(struct device *dev);
static const struct tmr_cmsdk_apb_cfg tmr_cmsdk_apb_cfg_0 = {
@ -167,14 +167,14 @@ static const struct tmr_cmsdk_apb_cfg tmr_cmsdk_apb_cfg_0 = {
.count_up = false,
.channels = 0U,
},
.timer = ((volatile struct timer_cmsdk_apb *)DT_CMSDK_APB_TIMER0),
.timer = ((volatile struct timer_cmsdk_apb *)DT_ARM_CMSDK_TIMER_0_BASE_ADDRESS),
.timer_config_func = timer_cmsdk_apb_config_0,
.timer_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
.device = DT_CMSDK_APB_TIMER0,},
.device = DT_ARM_CMSDK_TIMER_0_BASE_ADDRESS,},
.timer_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
.device = DT_CMSDK_APB_TIMER0,},
.device = DT_ARM_CMSDK_TIMER_0_BASE_ADDRESS,},
.timer_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
.device = DT_CMSDK_APB_TIMER0,},
.device = DT_ARM_CMSDK_TIMER_0_BASE_ADDRESS,},
};
static struct tmr_cmsdk_apb_dev_data tmr_cmsdk_apb_dev_data_0 = {
@ -182,7 +182,7 @@ static struct tmr_cmsdk_apb_dev_data tmr_cmsdk_apb_dev_data_0 = {
};
DEVICE_AND_API_INIT(tmr_cmsdk_apb_0,
DT_CMSDK_APB_TIMER0_LABEL,
DT_ARM_CMSDK_TIMER_0_LABEL,
tmr_cmsdk_apb_init, &tmr_cmsdk_apb_dev_data_0,
&tmr_cmsdk_apb_cfg_0, POST_KERNEL,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
@ -190,15 +190,15 @@ DEVICE_AND_API_INIT(tmr_cmsdk_apb_0,
static void timer_cmsdk_apb_config_0(struct device *dev)
{
IRQ_CONNECT(DT_CMSDK_APB_TIMER_0_IRQ, CONFIG_TIMER_TMR_CMSDK_APB_0_IRQ_PRI,
IRQ_CONNECT(DT_ARM_CMSDK_TIMER_0_IRQ_0, DT_ARM_CMSDK_TIMER_0_IRQ_0_PRIORITY,
tmr_cmsdk_apb_isr,
DEVICE_GET(tmr_cmsdk_apb_0), 0);
irq_enable(DT_CMSDK_APB_TIMER_0_IRQ);
irq_enable(DT_ARM_CMSDK_TIMER_0_IRQ_0);
}
#endif /* CONFIG_TIMER_TMR_CMSDK_APB_0 */
#endif /* DT_ARM_CMSDK_TIMER_0 */
/* TIMER 1 */
#ifdef CONFIG_TIMER_TMR_CMSDK_APB_1
#ifdef DT_ARM_CMSDK_TIMER_1
static void timer_cmsdk_apb_config_1(struct device *dev);
static const struct tmr_cmsdk_apb_cfg tmr_cmsdk_apb_cfg_1 = {
@ -208,14 +208,14 @@ static const struct tmr_cmsdk_apb_cfg tmr_cmsdk_apb_cfg_1 = {
.count_up = false,
.channels = 0U,
},
.timer = ((volatile struct timer_cmsdk_apb *)DT_CMSDK_APB_TIMER1),
.timer = ((volatile struct timer_cmsdk_apb *)DT_ARM_CMSDK_TIMER_1_BASE_ADDRESS),
.timer_config_func = timer_cmsdk_apb_config_1,
.timer_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
.device = DT_CMSDK_APB_TIMER1,},
.device = DT_ARM_CMSDK_TIMER_1_BASE_ADDRESS,},
.timer_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
.device = DT_CMSDK_APB_TIMER1,},
.device = DT_ARM_CMSDK_TIMER_1_BASE_ADDRESS,},
.timer_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
.device = DT_CMSDK_APB_TIMER1,},
.device = DT_ARM_CMSDK_TIMER_1_BASE_ADDRESS,},
};
static struct tmr_cmsdk_apb_dev_data tmr_cmsdk_apb_dev_data_1 = {
@ -223,7 +223,7 @@ static struct tmr_cmsdk_apb_dev_data tmr_cmsdk_apb_dev_data_1 = {
};
DEVICE_AND_API_INIT(tmr_cmsdk_apb_1,
DT_CMSDK_APB_TIMER1_LABEL,
DT_ARM_CMSDK_TIMER_1_LABEL,
tmr_cmsdk_apb_init, &tmr_cmsdk_apb_dev_data_1,
&tmr_cmsdk_apb_cfg_1, POST_KERNEL,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
@ -231,9 +231,9 @@ DEVICE_AND_API_INIT(tmr_cmsdk_apb_1,
static void timer_cmsdk_apb_config_1(struct device *dev)
{
IRQ_CONNECT(DT_CMSDK_APB_TIMER_1_IRQ, CONFIG_TIMER_TMR_CMSDK_APB_1_IRQ_PRI,
IRQ_CONNECT(DT_ARM_CMSDK_TIMER_1_IRQ_0, DT_ARM_CMSDK_TIMER_1_IRQ_0_PRIORITY,
tmr_cmsdk_apb_isr,
DEVICE_GET(tmr_cmsdk_apb_1), 0);
irq_enable(DT_CMSDK_APB_TIMER_1_IRQ);
irq_enable(DT_ARM_CMSDK_TIMER_1_IRQ_0);
}
#endif /* CONFIG_TIMER_TMR_CMSDK_APB_1 */
#endif /* DT_ARM_CMSDK_TIMER_1 */

14
soc/arm/arm/beetle/dts_fixup.h
View file

@ -2,20 +2,6 @@
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
/* CMSDK APB Timers */
#define DT_CMSDK_APB_TIMER0 DT_ARM_CMSDK_TIMER_40000000_BASE_ADDRESS
#define DT_CMSDK_APB_TIMER_0_IRQ DT_ARM_CMSDK_TIMER_40000000_IRQ_0
#define DT_CMSDK_APB_TIMER0_LABEL DT_ARM_CMSDK_TIMER_40000000_LABEL
#define DT_CMSDK_APB_TIMER1 DT_ARM_CMSDK_TIMER_40001000_BASE_ADDRESS
#define DT_CMSDK_APB_TIMER_1_IRQ DT_ARM_CMSDK_TIMER_40001000_IRQ_0
#define DT_CMSDK_APB_TIMER1_LABEL DT_ARM_CMSDK_TIMER_40001000_LABEL
/* CMSDK APB Dual Timer */
#define DT_CMSDK_APB_DTIMER DT_ARM_CMSDK_DTIMER_40002000_BASE_ADDRESS
#define DT_CMSDK_APB_DUALTIMER_IRQ DT_ARM_CMSDK_DTIMER_40002000_IRQ_0
#define DT_CMSDK_APB_DTIMER0_LABEL DT_ARM_CMSDK_DTIMER_40002000_LABEL
/* CMSDK AHB General Purpose Input/Output (GPIO) */
#define DT_CMSDK_AHB_GPIO0 DT_ARM_CMSDK_GPIO_40010000_BASE_ADDRESS
#define DT_IRQ_PORT0_ALL DT_ARM_CMSDK_GPIO_40010000_IRQ_0

4
soc/arm/arm/beetle/power.c
View file

@ -25,13 +25,13 @@
#define AHB_CLK_BITS (CLK_BIT_GPIO0 | CLK_BIT_GPIO1)
#if defined(CONFIG_TIMER_TMR_CMSDK_APB_0)
#if defined(DT_ARM_CMSDK_TIMER_40000000_BASE_ADDRESS)
#define CLK_BIT_TIMER0 _BEETLE_TIMER0
#else
#define CLK_BIT_TIMER0 0
#endif
#if defined(CONFIG_TIMER_TMR_CMSDK_APB_1)
#if defined(DT_ARM_CMSDK_TIMER_40001000_BASE_ADDRESS)
#define CLK_BIT_TIMER1 _BEETLE_TIMER1
#else
#define CLK_BIT_TIMER1 0

21
soc/arm/arm/musca_a/dts_fixup.h
View file

@ -9,16 +9,6 @@
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V8M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#if defined (CONFIG_ARM_NONSECURE_FIRMWARE)
/* CMSDK APB Timers */
#define DT_CMSDK_APB_TIMER0 DT_ARM_CMSDK_TIMER_40000000_BASE_ADDRESS
#define DT_CMSDK_APB_TIMER_0_IRQ DT_ARM_CMSDK_TIMER_40000000_IRQ_0
#define DT_CMSDK_APB_TIMER1 DT_ARM_CMSDK_TIMER_40001000_BASE_ADDRESS
#define DT_CMSDK_APB_TIMER_1_IRQ DT_ARM_CMSDK_TIMER_40001000_IRQ_0
/* CMSDK APB Dual Timer */
#define DT_CMSDK_APB_DTIMER DT_ARM_CMSDK_DTIMER_40002000_BASE_ADDRESS
#define DT_CMSDK_APB_DUALTIMER_IRQ DT_ARM_CMSDK_DTIMER_40002000_IRQ_0
/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */
#define DT_PL011_PORT0_BASE_ADDRESS DT_ARM_PL011_40101000_BASE_ADDRESS
@ -44,17 +34,6 @@
#else
/* CMSDK APB Timers */
#define DT_CMSDK_APB_TIMER0 DT_ARM_CMSDK_TIMER_50000000_BASE_ADDRESS
#define DT_CMSDK_APB_TIMER_0_IRQ DT_ARM_CMSDK_TIMER_50000000_IRQ_0
#define DT_CMSDK_APB_TIMER1 DT_ARM_CMSDK_TIMER_50001000_BASE_ADDRESS
#define DT_CMSDK_APB_TIMER_1_IRQ DT_ARM_CMSDK_TIMER_50001000_IRQ_0
/* CMSDK APB Dual Timer */
#define DT_CMSDK_APB_DTIMER DT_ARM_CMSDK_DTIMER_50002000_BASE_ADDRESS
#define DT_CMSDK_APB_DUALTIMER_IRQ DT_ARM_CMSDK_DTIMER_50002000_IRQ_0
/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */
#define DT_PL011_PORT0_BASE_ADDRESS DT_ARM_PL011_50101000_BASE_ADDRESS
#define DT_PL011_PORT0_IRQ_TX DT_ARM_PL011_50101000_IRQ_TX

2
tests/drivers/counter/counter_basic_api/boards/v2m_beetle.conf
View file

@ -1,2 +0,0 @@
CONFIG_TIMER_TMR_CMSDK_APB=y
CONFIG_TIMER_DTMR_CMSDK_APB=y