drivers: counter: cmsdk: Convert to new DT_<COMPAT>_<INSTANCE> defines
Convert cmsdk driver to use new defines so we can remove the dts_fixup.h code for it. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
parent
c2a04890d9
commit
7809970c8a
12 changed files with 36 additions and 167 deletions
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@ -47,23 +47,12 @@ endif # WATCHDOG
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if COUNTER
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if TIMER_TMR_CMSDK_APB
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config TIMER_TMR_CMSDK_APB_0
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config TIMER_TMR_CMSDK_APB
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default y
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config TIMER_TMR_CMSDK_APB_1
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config TIMER_DTMR_CMSDK_APB
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default y
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endif # TIMER_TMR_CMSDK_APB
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if TIMER_DTMR_CMSDK_APB
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config TIMER_DTMR_CMSDK_APB_0
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default y
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endif # TIMER_DTMR_CMSDK_APB
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endif # COUNTER
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if I2C
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@ -2,17 +2,6 @@
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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/* CMSDK APB Timers */
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#define DT_CMSDK_APB_TIMER0 DT_ARM_CMSDK_TIMER_40000000_BASE_ADDRESS
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#define DT_CMSDK_APB_TIMER_0_IRQ DT_ARM_CMSDK_TIMER_40000000_IRQ_0
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#define DT_CMSDK_APB_TIMER1 DT_ARM_CMSDK_TIMER_40001000_BASE_ADDRESS
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#define DT_CMSDK_APB_TIMER_1_IRQ DT_ARM_CMSDK_TIMER_40001000_IRQ_0
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/* CMSDK APB Dual Timer */
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#define DT_CMSDK_APB_DTIMER DT_ARM_CMSDK_DTIMER_40002000_BASE_ADDRESS
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#define DT_CMSDK_APB_DUALTIMER_IRQ DT_ARM_CMSDK_DTIMER_40002000_IRQ_0
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/* CMSDK AHB General Purpose Input/Output (GPIO) */
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#define DT_CMSDK_AHB_GPIO0 DT_ARM_CMSDK_GPIO_40010000_BASE_ADDRESS
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#define DT_IRQ_PORT0_ALL DT_ARM_CMSDK_GPIO_40010000_IRQ_0
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@ -56,23 +56,12 @@ endif # WATCHDOG
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if COUNTER
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if TIMER_TMR_CMSDK_APB
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config TIMER_TMR_CMSDK_APB_0
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config TIMER_TMR_CMSDK_APB
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default y
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config TIMER_TMR_CMSDK_APB_1
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config TIMER_DTMR_CMSDK_APB
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default y
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endif # TIMER_TMR_CMSDK_APB
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if TIMER_DTMR_CMSDK_APB
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config TIMER_DTMR_CMSDK_APB_0
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default y
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endif # TIMER_DTMR_CMSDK_APB
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endif # COUNTER
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endif # BOARD_V2M_BEETLE
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@ -40,23 +40,12 @@ endif # SERIAL
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if COUNTER
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if TIMER_TMR_CMSDK_APB
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config TIMER_TMR_CMSDK_APB_0
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config TIMER_TMR_CMSDK_APB
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def_bool y
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config TIMER_TMR_CMSDK_APB_1
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config TIMER_DTMR_CMSDK_APB
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def_bool y
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endif # TIMER_TMR_CMSDK_APB
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if TIMER_DTMR_CMSDK_APB
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config TIMER_DTMR_CMSDK_APB_0
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def_bool y
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endif # TIMER_DTMR_CMSDK_APB
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endif # COUNTER
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endif
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@ -14,22 +14,4 @@ config TIMER_DTMR_CMSDK_APB
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The dualtimer (DTMR) present in the platform is used as a timer.
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This option enables the support for the timer.
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if TIMER_DTMR_CMSDK_APB
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# ---------- Timer 0 ----------
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config TIMER_DTMR_CMSDK_APB_0
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bool "Timer 0 driver"
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help
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Enable support for Timer 0.
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config TIMER_DTMR_CMSDK_APB_0_IRQ_PRI
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int "Interrupt Priority for Timer 0"
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depends on TIMER_DTMR_CMSDK_APB_0
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default 3
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help
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Interrupt priority for Timer 0.
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endif # TIMER_DTMR_CMSDK_APB
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endif # SOC_FAMILY_ARM
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@ -14,36 +14,4 @@ config TIMER_TMR_CMSDK_APB
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The timers (TMR) present in the platform are used as timers.
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This option enables the support for the timers.
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if TIMER_TMR_CMSDK_APB
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# ---------- Timer 0 ----------
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config TIMER_TMR_CMSDK_APB_0
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bool "Timer 0 driver"
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help
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Enable support for Timer 0.
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config TIMER_TMR_CMSDK_APB_0_IRQ_PRI
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int "Interrupt Priority for Timer 0"
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depends on TIMER_TMR_CMSDK_APB_0
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default 3
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help
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Interrupt priority for Timer 0.
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# ---------- Timer 1 ----------
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config TIMER_TMR_CMSDK_APB_1
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bool "Timer 1 driver"
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help
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Enable support for Timer 1.
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config TIMER_TMR_CMSDK_APB_1_IRQ_PRI
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int "Interrupt Priority for Timer 1"
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depends on TIMER_TMR_CMSDK_APB_1
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default 3
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help
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Interrupt priority for Timer 1.
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endif # TIMER_TMR_CMSDK_APB
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endif # SOC_FAMILY_ARM
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@ -155,7 +155,7 @@ static int dtmr_cmsdk_apb_init(struct device *dev)
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}
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/* TIMER 0 */
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#ifdef CONFIG_TIMER_DTMR_CMSDK_APB_0
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#ifdef DT_ARM_CMSDK_DTIMER_0
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static void dtimer_cmsdk_apb_config_0(struct device *dev);
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static const struct dtmr_cmsdk_apb_cfg dtmr_cmsdk_apb_cfg_0 = {
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@ -165,14 +165,14 @@ static const struct dtmr_cmsdk_apb_cfg dtmr_cmsdk_apb_cfg_0 = {
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.count_up = false,
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.channels = 0U,
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},
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.dtimer = ((volatile struct dualtimer_cmsdk_apb *)DT_CMSDK_APB_DTIMER),
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.dtimer = ((volatile struct dualtimer_cmsdk_apb *)DT_ARM_CMSDK_DTIMER_0_BASE_ADDRESS),
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.dtimer_config_func = dtimer_cmsdk_apb_config_0,
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.dtimer_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
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.device = DT_CMSDK_APB_DTIMER,},
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.device = DT_ARM_CMSDK_DTIMER_0_BASE_ADDRESS,},
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.dtimer_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
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.device = DT_CMSDK_APB_DTIMER,},
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.device = DT_ARM_CMSDK_DTIMER_0_BASE_ADDRESS,},
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.dtimer_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
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.device = DT_CMSDK_APB_DTIMER,},
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.device = DT_ARM_CMSDK_DTIMER_0_BASE_ADDRESS,},
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};
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static struct dtmr_cmsdk_apb_dev_data dtmr_cmsdk_apb_dev_data_0 = {
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@ -180,7 +180,7 @@ static struct dtmr_cmsdk_apb_dev_data dtmr_cmsdk_apb_dev_data_0 = {
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};
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DEVICE_AND_API_INIT(dtmr_cmsdk_apb_0,
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DT_CMSDK_APB_DTIMER0_LABEL,
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DT_ARM_CMSDK_DTIMER_0_LABEL,
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dtmr_cmsdk_apb_init,
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&dtmr_cmsdk_apb_dev_data_0,
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&dtmr_cmsdk_apb_cfg_0, POST_KERNEL,
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@ -189,10 +189,10 @@ DEVICE_AND_API_INIT(dtmr_cmsdk_apb_0,
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static void dtimer_cmsdk_apb_config_0(struct device *dev)
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{
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IRQ_CONNECT(DT_CMSDK_APB_DUALTIMER_IRQ,
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CONFIG_TIMER_DTMR_CMSDK_APB_0_IRQ_PRI,
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IRQ_CONNECT(DT_ARM_CMSDK_DTIMER_0_IRQ_0,
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DT_ARM_CMSDK_DTIMER_0_IRQ_0_PRIORITY,
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dtmr_cmsdk_apb_isr,
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DEVICE_GET(dtmr_cmsdk_apb_0), 0);
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irq_enable(DT_CMSDK_APB_DUALTIMER_IRQ);
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irq_enable(DT_ARM_CMSDK_DTIMER_0_IRQ_0);
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}
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#endif /* CONFIG_TIMER_DTMR_CMSDK_APB_0 */
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#endif /* DT_ARM_CMSDK_DTIMER_0 */
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@ -157,7 +157,7 @@ static int tmr_cmsdk_apb_init(struct device *dev)
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}
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/* TIMER 0 */
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#ifdef CONFIG_TIMER_TMR_CMSDK_APB_0
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#ifdef DT_ARM_CMSDK_TIMER_0
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static void timer_cmsdk_apb_config_0(struct device *dev);
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static const struct tmr_cmsdk_apb_cfg tmr_cmsdk_apb_cfg_0 = {
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@ -167,14 +167,14 @@ static const struct tmr_cmsdk_apb_cfg tmr_cmsdk_apb_cfg_0 = {
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.count_up = false,
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.channels = 0U,
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},
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.timer = ((volatile struct timer_cmsdk_apb *)DT_CMSDK_APB_TIMER0),
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.timer = ((volatile struct timer_cmsdk_apb *)DT_ARM_CMSDK_TIMER_0_BASE_ADDRESS),
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.timer_config_func = timer_cmsdk_apb_config_0,
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.timer_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
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.device = DT_CMSDK_APB_TIMER0,},
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.device = DT_ARM_CMSDK_TIMER_0_BASE_ADDRESS,},
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.timer_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
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.device = DT_CMSDK_APB_TIMER0,},
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.device = DT_ARM_CMSDK_TIMER_0_BASE_ADDRESS,},
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.timer_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
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.device = DT_CMSDK_APB_TIMER0,},
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.device = DT_ARM_CMSDK_TIMER_0_BASE_ADDRESS,},
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};
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static struct tmr_cmsdk_apb_dev_data tmr_cmsdk_apb_dev_data_0 = {
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};
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DEVICE_AND_API_INIT(tmr_cmsdk_apb_0,
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DT_CMSDK_APB_TIMER0_LABEL,
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DT_ARM_CMSDK_TIMER_0_LABEL,
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tmr_cmsdk_apb_init, &tmr_cmsdk_apb_dev_data_0,
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&tmr_cmsdk_apb_cfg_0, POST_KERNEL,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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@ -190,15 +190,15 @@ DEVICE_AND_API_INIT(tmr_cmsdk_apb_0,
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static void timer_cmsdk_apb_config_0(struct device *dev)
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{
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IRQ_CONNECT(DT_CMSDK_APB_TIMER_0_IRQ, CONFIG_TIMER_TMR_CMSDK_APB_0_IRQ_PRI,
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IRQ_CONNECT(DT_ARM_CMSDK_TIMER_0_IRQ_0, DT_ARM_CMSDK_TIMER_0_IRQ_0_PRIORITY,
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tmr_cmsdk_apb_isr,
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DEVICE_GET(tmr_cmsdk_apb_0), 0);
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irq_enable(DT_CMSDK_APB_TIMER_0_IRQ);
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irq_enable(DT_ARM_CMSDK_TIMER_0_IRQ_0);
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}
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#endif /* CONFIG_TIMER_TMR_CMSDK_APB_0 */
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#endif /* DT_ARM_CMSDK_TIMER_0 */
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/* TIMER 1 */
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#ifdef CONFIG_TIMER_TMR_CMSDK_APB_1
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#ifdef DT_ARM_CMSDK_TIMER_1
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static void timer_cmsdk_apb_config_1(struct device *dev);
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static const struct tmr_cmsdk_apb_cfg tmr_cmsdk_apb_cfg_1 = {
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.count_up = false,
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.channels = 0U,
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},
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.timer = ((volatile struct timer_cmsdk_apb *)DT_CMSDK_APB_TIMER1),
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.timer = ((volatile struct timer_cmsdk_apb *)DT_ARM_CMSDK_TIMER_1_BASE_ADDRESS),
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.timer_config_func = timer_cmsdk_apb_config_1,
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.timer_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
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.device = DT_CMSDK_APB_TIMER1,},
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.device = DT_ARM_CMSDK_TIMER_1_BASE_ADDRESS,},
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.timer_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
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.device = DT_CMSDK_APB_TIMER1,},
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.device = DT_ARM_CMSDK_TIMER_1_BASE_ADDRESS,},
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.timer_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
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.device = DT_CMSDK_APB_TIMER1,},
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.device = DT_ARM_CMSDK_TIMER_1_BASE_ADDRESS,},
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};
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static struct tmr_cmsdk_apb_dev_data tmr_cmsdk_apb_dev_data_1 = {
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};
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DEVICE_AND_API_INIT(tmr_cmsdk_apb_1,
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DT_CMSDK_APB_TIMER1_LABEL,
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DT_ARM_CMSDK_TIMER_1_LABEL,
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tmr_cmsdk_apb_init, &tmr_cmsdk_apb_dev_data_1,
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&tmr_cmsdk_apb_cfg_1, POST_KERNEL,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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static void timer_cmsdk_apb_config_1(struct device *dev)
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{
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IRQ_CONNECT(DT_CMSDK_APB_TIMER_1_IRQ, CONFIG_TIMER_TMR_CMSDK_APB_1_IRQ_PRI,
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IRQ_CONNECT(DT_ARM_CMSDK_TIMER_1_IRQ_0, DT_ARM_CMSDK_TIMER_1_IRQ_0_PRIORITY,
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tmr_cmsdk_apb_isr,
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DEVICE_GET(tmr_cmsdk_apb_1), 0);
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irq_enable(DT_CMSDK_APB_TIMER_1_IRQ);
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irq_enable(DT_ARM_CMSDK_TIMER_1_IRQ_0);
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}
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#endif /* CONFIG_TIMER_TMR_CMSDK_APB_1 */
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#endif /* DT_ARM_CMSDK_TIMER_1 */
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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/* CMSDK APB Timers */
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#define DT_CMSDK_APB_TIMER0 DT_ARM_CMSDK_TIMER_40000000_BASE_ADDRESS
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#define DT_CMSDK_APB_TIMER_0_IRQ DT_ARM_CMSDK_TIMER_40000000_IRQ_0
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#define DT_CMSDK_APB_TIMER0_LABEL DT_ARM_CMSDK_TIMER_40000000_LABEL
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#define DT_CMSDK_APB_TIMER1 DT_ARM_CMSDK_TIMER_40001000_BASE_ADDRESS
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#define DT_CMSDK_APB_TIMER_1_IRQ DT_ARM_CMSDK_TIMER_40001000_IRQ_0
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#define DT_CMSDK_APB_TIMER1_LABEL DT_ARM_CMSDK_TIMER_40001000_LABEL
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/* CMSDK APB Dual Timer */
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#define DT_CMSDK_APB_DTIMER DT_ARM_CMSDK_DTIMER_40002000_BASE_ADDRESS
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#define DT_CMSDK_APB_DUALTIMER_IRQ DT_ARM_CMSDK_DTIMER_40002000_IRQ_0
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#define DT_CMSDK_APB_DTIMER0_LABEL DT_ARM_CMSDK_DTIMER_40002000_LABEL
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/* CMSDK AHB General Purpose Input/Output (GPIO) */
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#define DT_CMSDK_AHB_GPIO0 DT_ARM_CMSDK_GPIO_40010000_BASE_ADDRESS
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#define DT_IRQ_PORT0_ALL DT_ARM_CMSDK_GPIO_40010000_IRQ_0
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@ -25,13 +25,13 @@
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#define AHB_CLK_BITS (CLK_BIT_GPIO0 | CLK_BIT_GPIO1)
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#if defined(CONFIG_TIMER_TMR_CMSDK_APB_0)
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#if defined(DT_ARM_CMSDK_TIMER_40000000_BASE_ADDRESS)
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#define CLK_BIT_TIMER0 _BEETLE_TIMER0
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#else
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#define CLK_BIT_TIMER0 0
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#endif
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#if defined(CONFIG_TIMER_TMR_CMSDK_APB_1)
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#if defined(DT_ARM_CMSDK_TIMER_40001000_BASE_ADDRESS)
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#define CLK_BIT_TIMER1 _BEETLE_TIMER1
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#else
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#define CLK_BIT_TIMER1 0
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@ -9,16 +9,6 @@
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V8M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#if defined (CONFIG_ARM_NONSECURE_FIRMWARE)
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/* CMSDK APB Timers */
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#define DT_CMSDK_APB_TIMER0 DT_ARM_CMSDK_TIMER_40000000_BASE_ADDRESS
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#define DT_CMSDK_APB_TIMER_0_IRQ DT_ARM_CMSDK_TIMER_40000000_IRQ_0
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#define DT_CMSDK_APB_TIMER1 DT_ARM_CMSDK_TIMER_40001000_BASE_ADDRESS
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#define DT_CMSDK_APB_TIMER_1_IRQ DT_ARM_CMSDK_TIMER_40001000_IRQ_0
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/* CMSDK APB Dual Timer */
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#define DT_CMSDK_APB_DTIMER DT_ARM_CMSDK_DTIMER_40002000_BASE_ADDRESS
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#define DT_CMSDK_APB_DUALTIMER_IRQ DT_ARM_CMSDK_DTIMER_40002000_IRQ_0
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/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */
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#define DT_PL011_PORT0_BASE_ADDRESS DT_ARM_PL011_40101000_BASE_ADDRESS
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#else
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/* CMSDK APB Timers */
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#define DT_CMSDK_APB_TIMER0 DT_ARM_CMSDK_TIMER_50000000_BASE_ADDRESS
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#define DT_CMSDK_APB_TIMER_0_IRQ DT_ARM_CMSDK_TIMER_50000000_IRQ_0
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#define DT_CMSDK_APB_TIMER1 DT_ARM_CMSDK_TIMER_50001000_BASE_ADDRESS
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#define DT_CMSDK_APB_TIMER_1_IRQ DT_ARM_CMSDK_TIMER_50001000_IRQ_0
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/* CMSDK APB Dual Timer */
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#define DT_CMSDK_APB_DTIMER DT_ARM_CMSDK_DTIMER_50002000_BASE_ADDRESS
|
||||
#define DT_CMSDK_APB_DUALTIMER_IRQ DT_ARM_CMSDK_DTIMER_50002000_IRQ_0
|
||||
|
||||
/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */
|
||||
#define DT_PL011_PORT0_BASE_ADDRESS DT_ARM_PL011_50101000_BASE_ADDRESS
|
||||
#define DT_PL011_PORT0_IRQ_TX DT_ARM_PL011_50101000_IRQ_TX
|
||||
|
|
|
@ -1,2 +0,0 @@
|
|||
CONFIG_TIMER_TMR_CMSDK_APB=y
|
||||
CONFIG_TIMER_DTMR_CMSDK_APB=y
|
Loading…
Add table
Add a link
Reference in a new issue