SiLabs' sleeptimer driver supports several hardware peripherals, of
which the counter driver so far only supports the RTCC-based variant.
This patch adds support for the SYSRTC-based sleeptimer implementation,
which is required for Gecko SoCs that do not have an RTCC module.
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
nRF53/91 require usage of nrf_regulators_system_off, so the API is not
common with nRF51/52. This was an oversight during the conversion.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Adds support for the NXP VMU RT1170 board. This Vehicle
Management Unit based on the i.MX RT1176 brings a fantastic
combination of sensors and IO all on one board for development
of various systems. It is also the featured board for
CogniPilot's Cerebri - VMU autopilot software based on Zephyr.
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Remove CONFIG_OCRAM_NOCACHE setting, as this is now possible to achieve
using devicetree linker regions, and there is no point in having a
specific Kconfig for one memory region on the RT series like this.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable SOC fixed MPU regions by default for the RT10xx/RT11xx SOC lines.
Additionally, add code to handle defining the SDRAM0 region as
device type (non cacheable, non shareable). This behavior can
be disabled with CONFIG_NXP_IMX_EXTERNAL_SDRAM=y. Set this Kconfig
for all boards in tree using SDRAM.
This will resolve an issue present on the RT11xx series where
the core may execute speculative prefetches to the SDRAM region when
no SDRAM is present on the board, resulting in the system faulting.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Don't default CONFIG_DEVICE_CONFIGURATION_DATA to enabled for iMX RT
SOCs, as this configuration block is only used when the board needs
peripherals like the external memory controller setup from reset by the
bootrom.
Enable this feature on all in tree boards that will require it,
and document the change to the default value in release notes.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Nordic SoCs do all power management automagically when going to idle (ie
k_cpu_idle()). The only extra state, system off, is now handled via
sys_shutdown(), so there's no need to support the PM subsystem.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
So far the init priories were:
enetc_psi0=60 < enetc_vsin=61 < emdio=70 < ethernet-phy=80
because the Ethernet PSI driver was doing global initialization for the
whole NETC complex, including enabling MDIO function (due to the way
the HAL works).
Change to use the default init priorities:
mdio=60 < phy=70 < eth=enetc_psi0=80 < enetc_vsin=81
by executing at an early stage the NETC global initialization. This also
allows to match the DT hierarchy representation of NETC with the
effective priorities assigned.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Disable SysTick when STIMER is in use and configure
SYS_CLOCK_HW_CYCLES_PER_SEC setting for it.
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
This commit addst pinctrl support for Apollo4 SoCs.
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
The sam0 CMCC configure Cortex-M cache controller. However, it is not
clear how the cache management should be performed. It is nor clear if
instructions like SCB_EnableICache can be used. In this case, if cache
management should be made only by CMCC it may require a dedicated
implementation.
Besides above, the CPU_CORTEX_M4 do not define cache by default which
can signal a bad configuration in tree since the SOC_SERIES_SAME54 do
not define which caches should be available.
This force cache controller disable to avoid issues.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current platform initialization do not take in consideration cache
management for historic reasons. This fixes any miss configuration and
allow users to enable/disable caches at board definition. The default
value is cache disabled and the below examples are for SAMV71 which
have both I/D Cache available:
I Cache only:
CONFIG_CACHE_MANAGEMENT=y
CONFIG_DCACHE=n
D Cache only:
CONFIG_CACHE_MANAGEMENT=y
CONFIG_ICACHE=n
I/D Cache disabled:
CONFIG_ICACHE=n
CONFIG_DCACHE=n
I/D Cache Enabled:
CONFIG_CACHE_MANAGEMENT=y
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This replace pre kernel initialization by the platform specific
initialization call. The platform specific init will configure
at very beginning the clocks, flash wait states and cache.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Kconfig.series files to normalize copyright date order from
lower to higher and reorder select entries.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Some configurations have the system timer driver hardwired in.
Let's make them compatible with CONFIG_SYS_CLOCK_EXISTS=n.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This device has a single instance of EMAC (a 100Mbps version of GMAC).
TCP/UDP checksum calculation is offloaded.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Reuse existing NXP LPSPI binding for this SoC since the hardware block
for this device is the same as the one supported for other NXP devices.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Do not select CONFIG_CACHE_MANAGEMENT in the Microchip SAM CAN driver
Kconfig but rather leave it up to the SoC/platform Kconfig to enable it as
needed and enable CACHE_MANAGEMENT by default for the Atmel SAM E70/V71 SoC
series.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Currently on zephyr, RAIL is used only for bluetooth. RAIL library is
needed to use efr32 radio regardless of the protocol used. We add
SOC_GECKO_USE_RAIL kconfig option to indicate if we use radio.
FPU is needed when using RAIL, we configure it if SOC_GECKO_USE_RAIL
is set.
Signed-off-by: Antoine Bout <antoine.bout@silabs.com>
Update to shim driver compatible with the hardware block
in S32K344. Configure the pins before initializing I2C
to avoid happening bus busy.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Reuse existing MCUX-based shim driver for FlexCAN.
Enable flexcan0 for Zephyr canbus to run tests.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Adds driver for pwm on xmc4xxx using Capture Compare Unit 8 (CCU8)
module. There are two CCU8 nodes with each one having four slices.
Each slice has two output channels.
Unlike CCU4, this module can generate complementary high-side/low-side
signals for each output channel. A variable dead time can be added
during the off to on transitions to make sure that the
high-side/low-side signals are not on at the same time.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Adds driver for pwm on xmc4xxx using Capture Compare Unit 4 (CCU4)
module. There are four CCU4 with each one having four channels
Thus it's possible to have up to 16 pwm output signals. The output of
each channel can only be connected to a specific port/pin. The possible
connection and gpio configurations are defined using pinctrl.
The CCU4 module also has a capture mode. Capture support will be added
in the future.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Pinmuxing is now done by a pinctrl driver, not by board.c,
so the code used previously for pinmuxing can be removed.
Fixes#59186.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
Introduces support for SoC-specific input-edge-detect configuration to
the CC13/26xx pinctrl driver.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
CC13/26xx's pinctrl_cc13xx_cc26xx.c driver included ioc.h and
(indirectly) pinctrl_soc.h which contained duplicate defines.
This change removes the header conflict and redundant definitions.
This prepares for subsequent changes in this change set that add
additional flags to the pinctrl driver which would otherwise trigger the
header conflict.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
and enabled proper nrfx driver instance; instead, use one option per
peripheral type and include the corresponding shim driver flavor into
compilation basing on that option (not the one that enables the nrfx
driver as it was incorrectly done so far in some cases)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Some EFR32 build broke after 3d2194f11e with:
pm.c:152: undefined reference to `pm_state_exit_post_ops'
Add an extra empty function to make this one build again.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Added dts additions for stm32f105xb cpu which is the same as existing
stm32f105xc with less flash.
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
This CL attempts to implement npcx's flash driver instead of the
original one (npcx spi driver plus spi_nor flash driver).
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add a new pinctrl type to control peripheral modules' specific IO
characteristics such as tri-state, the power supply type selection (3.3V
or 1.8V), and so on. In NPCX series, the corresponding registers/fields
are irregular. This CL wraps these definitions to dt nodes and put them
in pinctrl property if needed.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
