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soc: arm: nxp_imx: rt: enable SOC fixed MPU regions, add SDRAM0 region

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Enable SOC fixed MPU regions by default for the RT10xx/RT11xx SOC lines.

Additionally, add code to handle defining the SDRAM0 region as
device type (non cacheable, non shareable). This behavior can
be disabled with CONFIG_NXP_IMX_EXTERNAL_SDRAM=y. Set this Kconfig
for all boards in tree using SDRAM.

This will resolve an issue present on the RT11xx series where
the core may execute speculative prefetches to the SDRAM region when
no SDRAM is present on the board, resulting in the system faulting.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2023-07-17 17:58:40 -05:00 • committed by Mahesh Mahadevan
commit 7e646b56a1
16 changed files with 61 additions and 4 deletions
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3
boards/arm/mimxrt1020_evk/Kconfig.defconfig
View file

@ -15,6 +15,9 @@ endchoice
config DEVICE_CONFIGURATION_DATA
default y
config NXP_IMX_EXTERNAL_SDRAM
default y
if NETWORKING
config NET_L2_ETHERNET

3
boards/arm/mimxrt1024_evk/Kconfig.defconfig
View file

@ -15,6 +15,9 @@ endchoice
config DEVICE_CONFIGURATION_DATA
default y
config NXP_IMX_EXTERNAL_SDRAM
default y
config I2C_MCUX_LPI2C_BUS_RECOVERY
default y
depends on I2C_MCUX_LPI2C && PINCTRL

3
boards/arm/mimxrt1040_evk/Kconfig.defconfig
View file

@ -13,4 +13,7 @@ endchoice
config DEVICE_CONFIGURATION_DATA
default y
config NXP_IMX_EXTERNAL_SDRAM
default y
endif # BOARD_MIMXRT1040_EVK

3
boards/arm/mimxrt1050_evk/Kconfig.defconfig
View file

@ -16,6 +16,9 @@ endchoice
config DEVICE_CONFIGURATION_DATA
default y
config NXP_IMX_EXTERNAL_SDRAM
default y
if FLASH
config FLASH_MCUX_FLEXSPI_HYPERFLASH

3
boards/arm/mimxrt1060_evk/Kconfig.defconfig
View file

@ -17,6 +17,9 @@ endchoice
config DEVICE_CONFIGURATION_DATA
default y
config NXP_IMX_EXTERNAL_SDRAM
default y
if FLASH
config FLASH_MCUX_FLEXSPI_NOR

3
boards/arm/mimxrt1062_fmurt6/Kconfig.defconfig
View file

@ -15,6 +15,9 @@ endchoice
config DEVICE_CONFIGURATION_DATA
default y
config NXP_IMX_EXTERNAL_SDRAM
default y
if NETWORKING
config NET_L2_ETHERNET

3
boards/arm/mimxrt1064_evk/Kconfig.defconfig
View file

@ -15,6 +15,9 @@ endchoice
config DEVICE_CONFIGURATION_DATA
default y
config NXP_IMX_EXTERNAL_SDRAM
default y
config KSCAN
default y if LVGL

3
boards/arm/mimxrt1160_evk/Kconfig.defconfig
View file

@ -19,6 +19,9 @@ endchoice
config DEVICE_CONFIGURATION_DATA
default y if CPU_CORTEX_M7
config NXP_IMX_EXTERNAL_SDRAM
default y if CPU_CORTEX_M7
if SECOND_CORE_MCUX && BOARD_MIMXRT1160_EVK_CM4
config BUILD_OUTPUT_INFO_HEADER

3
boards/arm/mimxrt1170_evk/Kconfig.defconfig
View file

@ -22,6 +22,9 @@ endchoice
config DEVICE_CONFIGURATION_DATA
default y if CPU_CORTEX_M7
config NXP_IMX_EXTERNAL_SDRAM
default y if CPU_CORTEX_M7
if SECOND_CORE_MCUX && CPU_CORTEX_M4
config BUILD_OUTPUT_INFO_HEADER

3
boards/arm/mm_feather/Kconfig.defconfig
View file

@ -16,6 +16,9 @@ endchoice
config DEVICE_CONFIGURATION_DATA
default y
config NXP_IMX_EXTERNAL_SDRAM
default y
config DISK_DRIVER_SDMMC
default y if DISK_DRIVERS

3
boards/arm/mm_swiftio/Kconfig.defconfig
View file

@ -16,6 +16,9 @@ endchoice
config DEVICE_CONFIGURATION_DATA
default y
config NXP_IMX_EXTERNAL_SDRAM
default y
config DISK_DRIVER_SDMMC
default y if DISK_DRIVERS

1
doc/releases/release-notes-3.5.rst
View file

@ -96,6 +96,7 @@ Boards & SoC Support
* i.MX RT SOCs no longer enable CONFIG_DEVICE_CONFIGURATION_DATA by default.
boards using external SDRAM should set CONFIG_DEVICE_CONFIGURATION_DATA
and CONFIG_NXP_IMX_EXTERNAL_SDRAM to enabled.
* Added support for these ARC boards:

4
soc/arm/nxp_imx/rt/CMakeLists.txt
View file

@ -9,9 +9,9 @@ zephyr_sources_ifdef(CONFIG_SOC_SERIES_IMX_RT10XX soc_rt10xx.c)
zephyr_linker_sources_ifdef(CONFIG_NXP_IMX_RT_BOOT_HEADER
ROM_START SORT_KEY 0 boot_header.ld)
# Enable custom OCRAM noncacheable region
# Add custom mpu regions
zephyr_sources(mpu_regions.c)
zephyr_linker_sources_ifdef(CONFIG_OCRAM_NOCACHE SECTIONS sections.ld)
zephyr_sources_ifdef(CONFIG_OCRAM_NOCACHE mpu_regions.c)
zephyr_linker_section_configure(
SECTION .rom_start

3
soc/arm/nxp_imx/rt/Kconfig.series
View file

@ -1,6 +1,6 @@
# iMX RT series
# Copyright (c) 2017-2021, NXP
# Copyright (c) 2017-2021,2023 NXP
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_IMX_RT
@ -9,5 +9,6 @@ config SOC_SERIES_IMX_RT
select SOC_FAMILY_IMX
select CLOCK_CONTROL
select HAS_PM
select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS
help
Enable support for i.MX RT MCU series

8
soc/arm/nxp_imx/rt/Kconfig.soc
View file

@ -795,6 +795,14 @@ config OCRAM_NOCACHE
Creates linker section and MPU region for OCRAM region with
noncacheable attribute. OCRAM memory is useful for fast DMA transfers.
config NXP_IMX_EXTERNAL_SDRAM
bool "Allow access to external SDRAM region"
help
Enable access to external SDRAM region managed by the SEMC. This
setting should be enabled when the application uses SDRAM, or
an MPU region will be defined to disable cached access to the
SDRAM memory space.
config SECOND_CORE_MCUX
bool "Dual core operation on the RT11xx series"
depends on SOC_SERIES_IMX_RT11XX

16
soc/arm/nxp_imx/rt/mpu_regions.c
View file

@ -1,10 +1,13 @@
/*
* Copyright (c) 2022 NXP
* Copyright 2022-2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define SDRAM_BASE_ADDR 0x80000000
#include <zephyr/devicetree.h>
#include <zephyr/devicetree/memory-attr.h>
#include "../../common/cortex_m/arm_mpu_mem_cfg.h"
#define IS_CHOSEN_SRAM(x) (DT_DEP_ORD(DT_NODELABEL(x)) == DT_DEP_ORD(DT_CHOSEN(zephyr_sram)))
@ -31,7 +34,18 @@ static const struct arm_mpu_region mpu_regions[] = {
DT_REG_ADDR(DT_NODELABEL(ocram)),
REGION_RAM_NOCACHE_ATTR(REGION_256K)),
#endif
#ifndef CONFIG_NXP_IMX_EXTERNAL_SDRAM
/*
* Region 3 - mark SDRAM0 as device type memory to prevent core
* from executing speculative prefetches against this region when
* no SDRAM is present.
*/
MPU_REGION_ENTRY("SDRAM0", SDRAM_BASE_ADDR, REGION_IO_ATTR(REGION_512M)),
#endif
/* DT-defined regions */
DT_MEMORY_ATTR_APPLY(ARM_MPU_REGION_INIT)
};
const struct arm_mpu_config mpu_config = {