Commit graph

393 commits

Author SHA1 Message Date
Florian Vaussard
614db02cc6 stm32f4: Add STM32F413 Nucleo board
Add necessary board files, pinmux and device tree in order to have a
usable debug console.

Origin: Original

Change-Id: I280320700352fd36a544c03f4e57d2eeec2449e5
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-05-15 13:22:54 -04:00
Neil Armstrong
7df4b20af0 pinmux: stm32l4x: Fix USART 2 pinmux for nucleo-l432kc
The RX pin should be PA15 to use the Virtual COM port of the ST-LINK.

Also adds the missing entry in pinmux_stm32l4x.h.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-15 13:22:54 -04:00
Neil Armstrong
e844ca9e4f pinmux: stm32: Add support for Nucleo L432KC
Add pinmux configuration for the Nucleo L432KC board

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-08 15:03:15 -04:00
Neil Armstrong
89bc20dfa7 pinmux: stm32: Do not compile PORTD when not available
The STM32L432 does not have a PORTD gpio, disable it when not available.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-08 15:03:15 -04:00
Justin Watson
558281b096 arch: sam3x: update Kconfig options after move to SAM SoC family tree
The files for the Arduino Due needed to be updated to use the new
configuration when the SoC moved from the atmel_sam3 directory to
the atmel_sam/sam3x directory.

Jira: ZEP-2067

Signed-off-by: Justin Watson <jwatson5@gmail.com>
2017-05-03 13:51:37 -04:00
Florian Vaussard
392803e4cc pinmux: stm32f4: Clean-up pinmux header
Clean-up the pinmux header as a preparatory work before adding more
pinmuxes.

This is achieved by the following two actions:
- Reorder the defines by increasing GPIO order to make it
  easier to add more pinmux over time while avoiding a huge mess
- Use tabs to align

Change-Id: I07d9ae28f61287748d33dcf638dcbf2e6865517b
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-04-28 15:26:39 -05:00
Erwan Gouriou
2e20577554 board: Add support for board disco_l475_iot1
This commit provides support for disco_l475_iot1 board
Pinmux driver is provided with initial support definitions

Change-Id: I17b637a8ba0b033014969eca8fffe76319c47c52
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-04-28 15:26:39 -05:00
Erwan Gouriou
242ed389a3 stm32f4: Clean references to stm32f4 specific clock control
Following activation of stm32 common clock driver for stm32f4 series
remove references to stm32f4 specific driver.

Change-Id: I372a0ea046007bcb34944d6b2b8880077583b1d3
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-04-28 15:26:11 -05:00
David B. Kinder
93e4d7258d spell: fix Kconfig help typos: /boards /drivers
Fix misspellings in Kconfig help text

Change-Id: I3ae28a5d23d8e266612114bc0eb8a6e158129dc7
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-04-21 21:31:30 +00:00
Kumar Gala
ccad5bf3e3 drivers: convert to using newly introduced integer sized types
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.

Jira: ZEP-2051

Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-21 10:06:48 -05:00
Kumar Gala
789081673f Introduce new sized integer typedefs
This is a start to move away from the C99 {u}int{8,16,32,64}_t types to
Zephyr defined u{8,16,32,64}_t and s{8,16,32,64}_t.  This allows Zephyr
to define the sized types in a consistent manor across all the
architectures we support and not conflict with what various compilers
and libc might do with regards to the C99 types.

We introduce <zephyr/types.h> as part of this and have it include
<stdint.h> for now until we transition all the code away from the C99
types.

We go with u{8,16,32,64}_t and s{8,16,32,64}_t as there are some
existing variables defined u8 & u16 as well as to be consistent with
Zephyr naming conventions.

Jira: ZEP-2051

Change-Id: I451fed0623b029d65866622e478225dfab2c0ca8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-20 16:07:08 +00:00
David B. Kinder
896cf7a00a spell: fix doxygen comment typos: /drivers
Fix doxygen comment typos used to generate API docs

Change-Id: I6fd5051c99bdcc731740c92001e525349c254d85
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-04-19 10:45:34 -07:00
Erwan Gouriou
5033bb3ce2 drivers: pinmux: stm32l4 fix
Fix missing define following recent file clean up.

Change-Id: I6ec64098b91324f50c035f410fa3e1beb9aface4
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-04-14 05:56:53 -05:00
Anas Nashif
b84dc2e124 kernel: remove all remaining references to nanokernel
Change-Id: I43067508898bc092879f7fe9d656ccca6fd92ab2
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-04-10 20:21:10 +00:00
Erwan Gouriou
13e4092ee0 pinmux: stm32l4x rework header definition
For a better clarity and minimize the possibility
of false definitions and duplicates, gather defines
by port and store the by alphabetical order then in
alternate function order.

Change-Id: Ib9febc9e6c5037a774190007120b87bf100c3fca
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-04-04 17:55:13 -05:00
Erwan Gouriou
3ca381cfb5 drivers: pinmux: clean stm32l4x pinmux headers
*Fix PB6/PB ALT_7 to USART1 instead of USART3
*Remove duplicate definition of PD5/PD ALT_7

Change-Id: I2e095fb77451d1bad62fb75aed304debf646fa3e
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-04-04 17:55:13 -05:00
Erwan Gouriou
40286ec697 driver: i2c: stm32lx: align numbering scheme on data sheet
On stm32 family, IP instance numbering starts from 1.
Update i2c driver to this scheme to minimize user
confusion

Change-Id: I967d5975bbbad59cd8a3a7b6dfc665955d09cc9f
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-04-04 17:55:13 -05:00
Jean-Paul Etienne
f2c96e8fff pinmux: added support for the SiFive Freedom E310 pinmux driver
Change-Id: I4d1a1775df20e8d074b2f5a4a9f91619289582ff
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-04-02 15:15:12 +00:00
Erwan Gouriou
726d4dc437 drivers: stm32: clean up after stm23cube based clock control
After activation of cube based driver support on L4 and F3 series,
this commits performs the clean up of F3 and L4 relative code to
native clock control drivers.
Indirectly, it makes pwm driver supported de facto on F3 series

Change-Id: Idac17103a9b5ef6eab540719343cc8f5865f15fa
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Erwan Gouriou
293b65f526 pinmux: update stm32 pinmux to support LL clock control driver
After introducing STM32Cube based clock control driver for
stm32 family, update pinmux driver to support it.
Once supported across the whole family, a clean up will be done.

Change-Id: Icc20816377f3a09f516a743462c92696a1fead3a
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Anas Nashif
0a3738019f pinmux: unify galileo pinmux driver
Remove dev driver and integrate it in the default pinmux driver.

Jira: ZEP-958
Change-Id: I55670240f8a21749d3a6ae22e300e16ba80a2fb6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-01-25 20:43:18 +00:00
Anas Nashif
42e1c9ca34 pinmux: make pinmux_dev the default pinmux driver for quark
Jira: ZEP-958
Change-Id: Ib6c528a103372d5084efa5ae8635803e2912e0dd
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-01-25 20:43:18 +00:00
Erwan Gouriou
8890b73b6e license: Replace Apache boilerplate with SPDX tag
Apply JIRA: ZEP-1457 to STM32F3X family porting patchset.

Change-Id: I352267a47847143e557a4016de12bb9a14a20067
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-23 15:15:53 -06:00
Adam Podogrocki
a0dcfcce97 pinmux/stm32: default pin assignment for STM32373C-EVAL board
Change-Id: Id4b04749e1d707d12aa78cabd8d103701b6d55b6
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-01-23 15:15:53 -06:00
Adam Podogrocki
7d6c139082 pinmux/stm32: default pin assignment for NUCLEO-F334R8 board
Change-Id: Ib70471ceb2e4444d5826a5a17cbfc42161df78d2
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-01-23 15:15:53 -06:00
Adam Podogrocki
2ce996695a pinmux/stm32: default pin assignment for STM3210C-EVAL board
Change-Id: I87c3806b2fad649c67e8d66981ff6a99168fda72
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-01-23 15:15:53 -06:00
Adam Podogrocki
726d11a5a2 pinmux/stm32: extend pinmux driver functionality to support STM32F3X series MCUs
Change-Id: Ifc4c93e03b6593f1b6c7e664fdf719f9344fe1ee
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-01-23 15:15:52 -06:00
Adam Podogrocki
f23492a059 gpio/stm32: provide GPIO driver implementation for STM32F3X family
Implementation includes adding some defines in the pinmux,
adjusting gpio driver to specific defines for STM32F3X family,
adding specific functionality in the F3X SoC definition.

Change-Id: I465c66eb93e7afb43166c4585c852e284b0d6e67
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-01-23 15:15:52 -06:00
David B. Kinder
ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Lee Jones
84050f647b pinmux/nucleo_l476rg: Define pinmuxing for SPI1 and SPI3
Change-Id: I78978637483a630c92ca75d9ddf190f460a1fe5a
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-01-18 11:12:24 +00:00
Lee Jones
1ac8d01ccd pinmux/stm32l4: Add support for STM32L SPI1 and SPI3
Change-Id: I7d28f6ea2322fdaf17cde205d4550cfad38ea967
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-01-18 11:08:14 +00:00
Maureen Helm
4973787c10 pinmux: Remove the k64 pinmux driver
The k64 pinmux driver was deprecated when the more generic mcux pinmux
driver was added, but it can actually just be removed because it is not
a public interface. Applications should be using the public pinmux API,
not the private k64 pinmux API. There was one case in the net samples
that used the private API which was cleaned up in a previous patch.

Change-Id: I49a6397baa57973930cb63bd2a9883b14f7ddafd
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:28 -06:00
Maureen Helm
d2c9446163 pinmux: Init mcux pinmux driver in PRE_KERNEL_1
Changes the init level for the mcux pinmux driver from POST_KERNEL to
PRE_KERNEL_1. This will allow moving the uart console pins from the k64
soc init to the board pinmux tables.

Change-Id: I6d3377c9a689c12711c84387f74843ca9488df52
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:27 -06:00
Maureen Helm
4183dae89b pinmux: Rename ksdk to mcux
Renames the ksdk pinmux driver to mcux.

Change-Id: I7a519318b5b580c47b6f6652a2ae763067d85033
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:27 -06:00
Maureen Helm
40f5de5a56 ethernet: Rename ksdk to mcux
Renames the ksdk ethernet shim driver to mcux.

Change-Id: Ief03eabe4ce39be0d0896543c1cb660ff380b439
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:26 -06:00
Maureen Helm
9f61bfce9a pinmux: Remove stale ksdk pinmux dev references
The ksdk pinmux dev driver was previously merged into the regular ksdk
pinmux driver, and the config PINMUX_DEV_KSDK was removed. Two
references were inadvertantly left behind, so remove them now.

Change-Id: I77394be5459d55a9f16e7bd2b3c9d688c4605b4f
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:25 -06:00
Maureen Helm
acca033468 pinmux: Merge ksdk pinmux dev into regular ksdk pinmux driver
Merges the ksdk pinmux dev driver into the regular ksdk pinmux driver,
which now exposes the public pinmux API. Removes the private ksdk pinmux
API and converts the frdm_k64f and hexiwear_k64 boards to use the public
pinmux API.

Jira: ZEP-958, ZEP-1432
Change-Id: Ie5f60b604133093050b9c596050cad776d7b7cb3
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:25 -06:00
Anas Nashif
c1347b4730 kernel: replace all remaining nanokernel occurances
replace include <nanokernel.h> with <kernel.h> everywhere and also fix
any remaining mentions of nanokernel.

Keep the legacy samples/tests as is.

Change-Id: Iac48447bd191e83f21a719c69dc26233216d08dc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-12-25 14:34:43 -05:00
Anas Nashif
3d8e86c12c drivers: eliminate nano/micro kernel usage
Jira: ZEP-1415

Change-Id: I4a009ff57edb799750175aef574a865589f96c14
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-12-21 18:45:02 +00:00
Matthias Boesl
ffa67b77c6 board: add initial support for Nucleo-64 with Soc STM32F411RE
Change-Id: I698693bccce1e9599c20e57f5d4172643ca38cc9
Signed-off-by: Matthias Boesl <matthias.boesl@gmail.com>
2016-12-20 09:15:19 -06:00
Maureen Helm
57e1975241 pinmux: Deprecate the k64 pinmux driver
Now that we have a more generic ksdk pinmux driver that can be used
across multiple Kinetis SoCs, deprecate the specific k64 pinmux driver.

Jira: ZEP-1393
Change-Id: I11cfe9a53746a6e85eced2a7cecf0396d42a7a19
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2016-12-10 21:14:13 +00:00
Maureen Helm
a4e823eee0 pinmux: Introduce new ksdk pinmux driver
Kinetis SoCs contain one or more PORT modules to handle pin muxing and
pin configuration. Unlike the existing k64 pinmux driver, this driver
handles each PORT module individually and can be used for other Kinetis
SoCs.

This driver uses KSDK CMSIS register accesses to the PORT module rather
than the KSDK PORT driver (fsl_port.h), because the Zephyr pinmux
interface contains both set() and get() functions to access the pin
configuration. The KSDK PORT driver only contains a set() function
(which is a very thin static inline function to modify the PCR
register), therefore building a shim on top of it would result in a
strange mix of using the KSDK PORT driver for the set() and a direct
CMSIS register access for the get().

Jira: ZEP-1393
Change-Id: I2f7c6b08b207350697d590dcd665223f81de9f9e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2016-12-10 21:14:11 +00:00
Erwan Gouriou
971de25439 pinmux: prepare support for stm32 PWM driver
Add pin config for PWM support on ST Nucleo boards
Following config is chosen:
-PA0/PWM2_CH1 for F401RE and L476RG
-PA8/PWM1_CH2 for F103RB

Change-Id: I013e15ed35360d7777bb24ff94e0830f913a6580
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-12-06 10:31:45 -06:00
Neil Armstrong
afe71f61e7 nucleo_l476rg: add board support
Add board support for the Nucleo64 L476RG development board.

Change-Id: Ibb5424bc936c67a5d96855617202136d7dea772c
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-12-06 10:31:45 -06:00
Neil Armstrong
f8699b5754 pinmux/stm32: add pinmux definition for i2c
Add all possible pin assignment definitions for I2C{1-3} on STM32L4xx.

Change-Id: I2d4266bc3bb9ba41b74a80567c0b04a89963753e
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-12-06 10:31:45 -06:00
Neil Armstrong
a7edb4b336 stm32l4: add pinmux for USARTs
Add macro for all the available pinmux for the USARTs present on
STM32L4.

Change-Id: Ie4352750e1c6f08642b3e222b57f2a791f08ef74
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-12-06 10:31:45 -06:00
Fabien Parent
fea5c561fa stm32l4x: pinmux: add support for STM32L4
Change-Id: Ie505fe285d21070a98f2032cfd800a97095efa88
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-12-06 10:30:50 -06:00
Erwan Gouriou
2fcf3435c1 serial: Provide new numbering scheme for stm32 UART
There was a misalignment between Zephyr UART device numbering and
SoC UART IP. Device "UART_1" was mapped to IP USART_2, which could
be confusing for user.
This commit allows to align "UART_1" to IP USART_1.
Change is propagated to all STM32F103RB/STM32F401RE based boards and
respective pinmux drivers

Change-Id: Ia8099dfeec7b9c0c686c2a58ccb4dbb1a55b6537
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-12-06 09:50:11 -06:00
Flavio Santes
b04cdcd6e6 drivers: Remove legacy nanokernel.h include
This commit replaces the nanokernel.h include by kernel.h.

Change-Id: Ib42fbf2d9f77a73c0831f569b3dbbfb342ea2e1d
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
2016-12-04 14:59:37 -06:00
Andrei Emeltchenko
6e959810aa arm: frdm_k64f: Enable SPI0 in pinumx
Configure SPI 0 pins in pinmux.

Change-Id: I069ece3ab172e87301a427785a1b6fa9ff57d46a
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2016-12-03 21:37:04 +00:00