On stm32f3_disco pins PF0/PF1 are used for OSC_IN/OSC_OUT
signals. Use pins PA9/PA10 for I2C_2 port
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.
Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.
This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.
For users that just want to continue their work with minimal
disruption the following should suffice:
Install CMake 3.8.2+
Port any out-of-tree Makefiles to CMake.
Learn the absolute minimum about the new command line interface:
$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..
$ cd build
$ make
PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
pinmux_pin_get() needs memory validated for the func parameter since
it's a pointer that gets written to.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
checkpatch returns the following errors:
"ERROR:COMPLEX_MACRO: Macros with complex values
should be enclosed in parentheses"
Let's fix all of them.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Add pinmux configuration for USB OTG Full Speed.
Ports 11 and 12 use alternate function 10 for DM/DP.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Default configuration for USART1 (Console output) on board
stm32f3_disco was set on PA9/PA10, which matches Rev-A/B
configuration. Though, on more recent configuration of the
board (Rev-C onward). USART1 is mapped to PC4/PC5.
This configuration has the benefit to support VCP, hence it
is chosen to be set by default.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add SPI3 pin definitions for PC10, PC11, PC12.
This is required to use SPI3 on disco_l475_iot1 board
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move all STM32 based board pinmux files into the board dirs so we are
consistent across all the STM32 platforms/boards.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Esp-idf defines the BIT macro that is also defined in Zephyr's
misc/util.h. Fix the issue by including the esp-idf headers first, so
that a check in util.h won't redefine the macro if it's already
defined.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This implements a driver for the pin multiplexer as present in the ESP32
SoCs.
All APIs are supported.
Jira: ZEP-2297
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Add SPI pin mux tables for 96b_carbon. Note that SPI1 is for
internal use on the board connecting to the 96b_carbon_nrf51, while
SPI2 is broken out to an expansion header.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Following rework of pinmux driver for whole stm32 family,
remove call to stm32_get_pin_config which is no more
used.
Include dt-bindings stm32-pinctrl.h file to ensure coherency
between dts files and pinmux driver.
Due to change of "port" from enum to a series of define
(enum not accepted as dt binding), rework gpio_stm32_config
declaration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32F3 pinmux handler is reworked to support future pinmux dts
generation.
Preliminary change is done to move pin configuration
informations in a {pin, conf} structure closer to dts fields
"pins" array is removed as information is transfered to
"pinconf" array
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32F4 pinmux handler is reworked to support future pinmux dts
generation.
Preliminary change is done to move pin configuration
informations in a {pin, conf} structure closer to dts fields
"pins" array is removed as information is transfered to
"pinconf" array
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rework stm32f1 pinmux code for future dts based pinmux code
generation.
Pin configuration is now done directly thanks to gpio port
configuration. Reference to pseudo alternate functions are
now removed same as the use of pins[] array.
Pins function (uart tx for instance) is set implicitly by
defining gpio mode and configuration.
This behavior is specific to stm32f10x series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32L4 pinmux handler is reworked to support future pinmux dts
generation.
Preliminary change is done to move pin configuration
informations in a {pin, conf} structure closer to dts fields
"pins" array is removed and information is transferred to
"pinconf" array
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following implementation of LL based SPI driver,
add SPI support on nucleo_f334r8 board of STM32F3 series.
Change-Id: Ifbe39b1f2cecdd7db23be9c6943a914a155ebd77
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add SPI pin for the nucleo_f401re pinmux.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add configuration, documentation, pinmux, fixup and dts support for
STM32F103x8 based Minimum System Development board.
Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
Add necessary board files, pinmux and device tree in order to have a
usable debug console.
Origin: Original
Change-Id: I43a9d278c3f2c936a714263626722f630367b663
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Following migration of stm32f1xx series clock control driver to
STM32Cube LL API, cleanup stm32 code base in order to take into
account that this is the only clock driver available for stm32
family.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The Nucleo STM32F413 board is missing the default pinmux for PWM2 on
PA0, as stated in the doc. The same pinmux is also done for other
similar Nucleo board. So add it!
Change-Id: I2086c0a4ce65d68455a0978570f118e965f4c6ca
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
This patch converts Atmel sam3x MCU series to use register
header files from Atmel Software Framework (ASF) library.
By using ASF different Atmel SAM MCU series can use common
device drivers.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Add configuration, pinmux, dts and documentation for the STM32L496G
Discovery board based on the STM32L496AG SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add defines and pinmux arrays to support more UARTs on STM32F4.
Change-Id: Ib06c549bdb2b3d7065554a0a6d1a3d15441b29c9
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add necessary board files, pinmux and device tree in order to have a
usable debug console.
Origin: Original
Change-Id: I280320700352fd36a544c03f4e57d2eeec2449e5
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The RX pin should be PA15 to use the Virtual COM port of the ST-LINK.
Also adds the missing entry in pinmux_stm32l4x.h.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The files for the Arduino Due needed to be updated to use the new
configuration when the SoC moved from the atmel_sam3 directory to
the atmel_sam/sam3x directory.
Jira: ZEP-2067
Signed-off-by: Justin Watson <jwatson5@gmail.com>
Clean-up the pinmux header as a preparatory work before adding more
pinmuxes.
This is achieved by the following two actions:
- Reorder the defines by increasing GPIO order to make it
easier to add more pinmux over time while avoiding a huge mess
- Use tabs to align
Change-Id: I07d9ae28f61287748d33dcf638dcbf2e6865517b
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
This commit provides support for disco_l475_iot1 board
Pinmux driver is provided with initial support definitions
Change-Id: I17b637a8ba0b033014969eca8fffe76319c47c52
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following activation of stm32 common clock driver for stm32f4 series
remove references to stm32f4 specific driver.
Change-Id: I372a0ea046007bcb34944d6b2b8880077583b1d3
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is a start to move away from the C99 {u}int{8,16,32,64}_t types to
Zephyr defined u{8,16,32,64}_t and s{8,16,32,64}_t. This allows Zephyr
to define the sized types in a consistent manor across all the
architectures we support and not conflict with what various compilers
and libc might do with regards to the C99 types.
We introduce <zephyr/types.h> as part of this and have it include
<stdint.h> for now until we transition all the code away from the C99
types.
We go with u{8,16,32,64}_t and s{8,16,32,64}_t as there are some
existing variables defined u8 & u16 as well as to be consistent with
Zephyr naming conventions.
Jira: ZEP-2051
Change-Id: I451fed0623b029d65866622e478225dfab2c0ca8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix doxygen comment typos used to generate API docs
Change-Id: I6fd5051c99bdcc731740c92001e525349c254d85
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
For a better clarity and minimize the possibility
of false definitions and duplicates, gather defines
by port and store the by alphabetical order then in
alternate function order.
Change-Id: Ib9febc9e6c5037a774190007120b87bf100c3fca
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On stm32 family, IP instance numbering starts from 1.
Update i2c driver to this scheme to minimize user
confusion
Change-Id: I967d5975bbbad59cd8a3a7b6dfc665955d09cc9f
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
After activation of cube based driver support on L4 and F3 series,
this commits performs the clean up of F3 and L4 relative code to
native clock control drivers.
Indirectly, it makes pwm driver supported de facto on F3 series
Change-Id: Idac17103a9b5ef6eab540719343cc8f5865f15fa
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
After introducing STM32Cube based clock control driver for
stm32 family, update pinmux driver to support it.
Once supported across the whole family, a clean up will be done.
Change-Id: Icc20816377f3a09f516a743462c92696a1fead3a
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove dev driver and integrate it in the default pinmux driver.
Jira: ZEP-958
Change-Id: I55670240f8a21749d3a6ae22e300e16ba80a2fb6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Implementation includes adding some defines in the pinmux,
adjusting gpio driver to specific defines for STM32F3X family,
adding specific functionality in the F3X SoC definition.
Change-Id: I465c66eb93e7afb43166c4585c852e284b0d6e67
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The k64 pinmux driver was deprecated when the more generic mcux pinmux
driver was added, but it can actually just be removed because it is not
a public interface. Applications should be using the public pinmux API,
not the private k64 pinmux API. There was one case in the net samples
that used the private API which was cleaned up in a previous patch.
Change-Id: I49a6397baa57973930cb63bd2a9883b14f7ddafd
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Changes the init level for the mcux pinmux driver from POST_KERNEL to
PRE_KERNEL_1. This will allow moving the uart console pins from the k64
soc init to the board pinmux tables.
Change-Id: I6d3377c9a689c12711c84387f74843ca9488df52
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The ksdk pinmux dev driver was previously merged into the regular ksdk
pinmux driver, and the config PINMUX_DEV_KSDK was removed. Two
references were inadvertantly left behind, so remove them now.
Change-Id: I77394be5459d55a9f16e7bd2b3c9d688c4605b4f
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Merges the ksdk pinmux dev driver into the regular ksdk pinmux driver,
which now exposes the public pinmux API. Removes the private ksdk pinmux
API and converts the frdm_k64f and hexiwear_k64 boards to use the public
pinmux API.
Jira: ZEP-958, ZEP-1432
Change-Id: Ie5f60b604133093050b9c596050cad776d7b7cb3
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
replace include <nanokernel.h> with <kernel.h> everywhere and also fix
any remaining mentions of nanokernel.
Keep the legacy samples/tests as is.
Change-Id: Iac48447bd191e83f21a719c69dc26233216d08dc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now that we have a more generic ksdk pinmux driver that can be used
across multiple Kinetis SoCs, deprecate the specific k64 pinmux driver.
Jira: ZEP-1393
Change-Id: I11cfe9a53746a6e85eced2a7cecf0396d42a7a19
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Kinetis SoCs contain one or more PORT modules to handle pin muxing and
pin configuration. Unlike the existing k64 pinmux driver, this driver
handles each PORT module individually and can be used for other Kinetis
SoCs.
This driver uses KSDK CMSIS register accesses to the PORT module rather
than the KSDK PORT driver (fsl_port.h), because the Zephyr pinmux
interface contains both set() and get() functions to access the pin
configuration. The KSDK PORT driver only contains a set() function
(which is a very thin static inline function to modify the PCR
register), therefore building a shim on top of it would result in a
strange mix of using the KSDK PORT driver for the set() and a direct
CMSIS register access for the get().
Jira: ZEP-1393
Change-Id: I2f7c6b08b207350697d590dcd665223f81de9f9e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add pin config for PWM support on ST Nucleo boards
Following config is chosen:
-PA0/PWM2_CH1 for F401RE and L476RG
-PA8/PWM1_CH2 for F103RB
Change-Id: I013e15ed35360d7777bb24ff94e0830f913a6580
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add board support for the Nucleo64 L476RG development board.
Change-Id: Ibb5424bc936c67a5d96855617202136d7dea772c
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add all possible pin assignment definitions for I2C{1-3} on STM32L4xx.
Change-Id: I2d4266bc3bb9ba41b74a80567c0b04a89963753e
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add macro for all the available pinmux for the USARTs present on
STM32L4.
Change-Id: Ie4352750e1c6f08642b3e222b57f2a791f08ef74
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There was a misalignment between Zephyr UART device numbering and
SoC UART IP. Device "UART_1" was mapped to IP USART_2, which could
be confusing for user.
This commit allows to align "UART_1" to IP USART_1.
Change is propagated to all STM32F103RB/STM32F401RE based boards and
respective pinmux drivers
Change-Id: Ia8099dfeec7b9c0c686c2a58ccb4dbb1a55b6537
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit replaces the nanokernel.h include by kernel.h.
Change-Id: Ib42fbf2d9f77a73c0831f569b3dbbfb342ea2e1d
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
Pinmux driver almost certainly should be initialized before the
rest of hardware devices (which may need specific pins already
configured for them), and usually after generic GPIO drivers.
Thus, its priority should be between KERNEL_INIT_PRIORITY_DEFAULT
(default 40) and KERNEL_INIT_PRIORITY_DEVICE (default 50). Thus,
we set PINMUX_INIT_PRIORITY to 45.
There are exceptions to the rule above for particular boards. For
example, BOARD=galileo has GPIO and pinmuxer on I2C bus and thus
overrides PINMUX_INIT_PRIORITY to be much higher. Note that while
PINMUX_INIT_PRIORITY was defined previously (at 60), it was used
only for galileo, which overrides it anyway.
This fix was prompted by investigation why eth_ksdk driver was
non-functional after kernel priorities re-hashing: both eth_ksdk
and pinmux used the same priority, and eth_ksdk happened to run
before pinmux. While bumping eth_ksdk priority would help in the
particular case, the same would likely reoccur with other drivers
like I2C, SPI, etc.
Change-Id: Ie5ca3135c1ee2fe8d9cf48d5c12e62eac63487f7
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
This patch adds the support for "runtime" pinmux on ARM V2M Beetle.
The GPIO controllers 2 and 3 are reserved and therefore not exposed
by this driver.
Jira: ZEP-1245
Change-Id: I9637f1a0d2bf6a757e1942160fb170165ffe6a0c
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds the support for the board pinmux initialization on
ARM V2M Beetle.
The GPIO controllers 2 and 3 are reserved and therefore neither exposed
nor configured by this driver.
Jira: ZEP-1245
Change-Id: Id5499c5dd887c319730408eeb30f02eeed1c3699
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
These pins are routed to the arduino header, and configuring them for
UART signals allows us to use the frdm_k64f with a frdm_kw40z shield
board for bluetooth.
Change-Id: Ie30916409844b1dc1c6e1280d5a755a6dc42e418
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add the definition required to change the pinmux of port H.
Change-Id: I3cc107f9151db4d38fe2cace90cd02d5955a2717
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for the STM32F401 chip on the board
Change-Id: I96c0799f3658ecea096fa5971bce9faf21919ee1
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change the clock accessors to a tuple of bus ID of the subsystem and enable
bits for the device - it is clearer to read than the opaque pointers.
Change-Id: I9ae73c222c04adac4cf2bc06e97f4ec199bdac3c
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
STM32F401 allows for upto 16 alternate functions on each pin.
Change-Id: Ib1c14fd31abaa2b05a5ab0f7bd1b4a4748f10f84
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
STM32F4 requires the alternative function config to be set, so just
initialize that as part of the gpio configure call.
Change-Id: I33a4a8efec59c5ebe7dc3f3580f0dd2bf7ded7f4
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
The hexiwear board has a k64 SoC, so we can reuse the k64 pinmux driver
and just add a new pinmux table for the board.
Jira: ZEP-716
Change-Id: I936691b3578db298014f44fe18433d7943b431f3
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The k64 pinmux driver can be used for any k64 board, not just frdm_k64f,
therefore renaming the driver accordingly.
Change-Id: I45e96d4a5ff6aa859d0f57fe098e44a8ae5283d1
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Those options are not being used anywhere, so remove them and avoid some
confusion.
Change-Id: Ia3767dbd2432851dfae4b1e996f02ed1b2450505
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Provide a network driver wrapped around the KSDK ENET and PHY
drivers.
The driver performs one shot PHY setup. There is no support for PHY
disconnect, reconnect or configuration change. The PHY setup,
implement via KSDK contains polled code that can block the
initialization thread for a few seconds.
There is no statistics collection for either normal operation or error
behaviour.
Origin: Original
Change-Id: Ia0f2e89a61348ed949976070353e823c178fcb24
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Add PTB22, PTE26, and PTB21 to the frdm_k64f pinmux table, and helper
macros to board.h to map them to red, green, and blue LEDs respectively.
Change-Id: I257621467e71dfd9bdc5d97d6da444dfb5c58b2b
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add PTC6 and PTA4 to the frdm_k64f pinmux table, and helper macros in
board.h to map them to SW2 and SW3 respectively.
Change-Id: Ia30df9015d6d3c09131b4fbb2f2009ee745f7268
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Statically compute the number of elements in the pinmux table rather
than keep a manual entry in step with the table.
Change-Id: I99634aa460a39bb8a9a10fe37d28aaae792aa641
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
CONFIG_PINMUX_DEV_QUARK_MCU is deprecated and QUARK MCU support
is replaced by CONFIG_PINMUX_DEV_QMSI. So delete this deprecated
CONFIG option.
Change-Id: I2cad6cfd4344386a00d45a579e8cc586935b041f
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
CONFIG_PINMUX_DEV_NAME should depends on CONFIG_PINMUX_DEV, not
CONFIG_PINMUX. In current situation, user will be able to access
pinmux dev driver without enabling CONFIG_PINMUX_DEV. This isn't
excepted to happen.
Change-Id: I75bcfff5a51e1dc93e002c0c6a65876f93cde5b8
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
According to commit 2055b06e ("quark: move pinmux files to board"),
drivers/pinmux/quark_mcu/ was deleted, so remove it from the Makefile.
According to commit 0ae2e895 ("remove custom pinmux for quark and use qmsi"),
pinmux_dev_quark_mcu.c is no longer compiled into image, so delete
this unused file.
Change-Id: Ied63cd3b06e8225205c5f1b3e5a675c387acb5ad
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
Completing the terminology change started with change 4008
by updating the Kconfig files processed to produce the
online documentation, plus header files processed by
doxygen. References to 'platform' are change to 'board'
Change-Id: Id0ed3dc1439a0ea0a4bd19d4904889cf79bec33e
Jira: ZEP-534
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Move pinmux defintions under board/<board> and have all board
configuration in one single place.
Change-Id: I055b024384fae2938881b1c57d8ce7426e732e92
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert leading whitespace into tabs in Kconfig files. Also replaced
double spaces between config and <prompt>.
Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch removes the PINMUX_SELECT_REGISTER macro definition from
pinmux_dev_quark_mcu.c since it is already defined in pinmux_quark_mcu.h
(which is included by the .c file).
Change-Id: I468cf6a54fc30d681f42a59eb2c8401d2b180849
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Add implementation for pinmux pin get API in the shim driver.
It is based on the function from pinmux_dev_quark_mcu.c
Jira: ZEP-189
Change-Id: Ib6673f90cfe8e367fcbd12ed546b1fa3af7e1dbf
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
The pinmux_stm32 and pinmux_dev_stm32 drivers use errno codes so they
should include errno.h.
Change-Id: I3fd19b338d5525f44207e8c770285ef218dd27a2
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Add configuration for OLIMEXINO_STM32 board.
By default, the UART console is forwarded to USART1 available on
UEXT connector. All GPIO ports available on the connecot headers
are enabled.
Change-Id: I60b3ff20ea60b5294a3a6c31f4dba0802794f9d8
Origin: Based on nucleo_f103rb board
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Add Kinetis SoC family and rename fsl_frdm_k64f to mk64f12.
This will allow adding new SoCs of the same family and the reuse of code
among SoCs of the family and series.
Change-Id: Iea1a663aef7ce0487f147bdd36f668bebe80deb5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.
Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use CONFIG_SOC_FAMILY for the top level SoC family. A family
will have different SoCs or different SoC series with multiple
SoCs.
Adding the Family string to the config variable to avoid confusion
between actual SoCs and families and to prevent name collisions.
Change-Id: Ic99a2c1df7850dee3a45641027af82464dd6fadb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Currently, the /CS pin is deasserted by _spi_config_cs() and
the pinmux driver sets it as an input afterwards. Later, setting
the /CS pin to an output via pinmux_dev asserts it.
Setting the SPI port 1 pins in the pinmux driver saves a few lines
of code. Moving the SPI init after pinmux init keeps the /CS pin as
configured by the SPI driver.
Change-Id: I4c587ba0a6983cd89dfb5ecedb2914335e86313b
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
This converts the pinmux/dev drivers to use DEVICE_AND_API_INIT(),
since the driver_api assignment will never change.
Change-Id: I0063b19e2afe932e1daf3255e718455aaa200ff1
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Fixes this built error:
zephyr/drivers/pinmux/dev/pinmux_dev_quark_mcu.c:138:18:
error: 'PINMUX_BASE_ADDR' undeclared here (not in a function)
.base_address = PINMUX_BASE_ADDR,
Change-Id: I54f15bc262cb887117f7b56660bcf85983daa877
Signed-off-by: liu.lei <lei.a.liu@intel.com>
Fixes this built error:
zephyr/drivers/pinmux/quark_mcu/pinmux_board_quark_se_dev.c:149:19:
error: 'PINMUX_BASE_ADDR' undeclared (first use in this function)
_pinmux_defaults(PINMUX_BASE_ADDR);
Change-Id: I8302e4d6dbcf961e0c80f6bccf740a877bb364af
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The pinmux base address and number of pins are now defined in SoC or board
header files instead of specifying them in kconfig. This is because
the pinmux ties directly to the SoC (or board expanders) so the base
address and number of pins do not need to be configurable in kconfig.
Change-Id: Ib6090d7d022b491f3fe8f522858281504c6302bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is to follow how kconfig are defined for other SoC/boards.
Origin: refactored from exising file
Change-Id: Ic83b8a336f1910f17b3cf4e7f029fd076ba1b6bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The base address and IRQ line are static per SoC, so there is no need
to make them configurable in Kconfig.
Change-Id: Ib78401ff136c29642356f5bda9d6cd3e5c98bece
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This driver will be used when changing pinmux functionality during
runtime.
Change-Id: I8dc7b36af13202b97183c5ee05932567e7396276
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This moves the STM32 based boards (Nucleo F103RB and STM32 Mini A15) to
the "new" pinmux model.
Change-Id: I190df271a6b83fafeec0b281cd4ee7cf13d7e7db
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This driver can be used for multiple boards based on the Quark
microcontroller family, the exceptions are Quark X1000 and Quark D1000.
Change-Id: I4c6624293515e4bbf31ac94a7f57905b4a9ef13d
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This introduces the pinmux_dev driver for the Atmel SAM3X.
This driver implements what used to be the pinmux driver API, which
applications could use to modify the function of pins during runtime.
That functionality is now protected under the CONFIG_PINMUX_DEV option,
which should only be set during the early enabling of a new board, as
there is risk of damage to the board when misused.
Change-Id: I3aa00505d2771b53c41fe687c3e5230e804756be
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Setting the direction of a GPIO pin is not the responsibility of the
pinmux "board" initialisation. This should be left for the GPIO
utilising application.
Some macros that were only used when setting the pin direction are
removed.
Change-Id: I5b63d52446a27fe539c89f0639a8dcadf5ea9f80
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This driver doesn't provide any API, it only initializes the pinmux
controller to appropriate values depending on the board.
The first board to use this new infrastructure is the Arduino 101 board,
because it is alphabetically the first.
To better organize code for the different SoCs and boards, a "family"
level is created in the 'drivers/pinmux' directory. The Arduino 101
board is part of the Quark MCU "family".
The PINMUX_DEV configuration (and functionality) is removed for now, it
will be added back when the pinmux_dev drivers are (re)introduced, with
clearer semantics.
Change-Id: Idf5cc3caf6be620aa50828ae8fdc535df6caf458
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Moves config options for K64 into its own config file under its
own submenu.
Change-Id: I94ccac54709ab5ec8222daa8634818d9ebc3561d
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Add necessary integration code enabling use of common STM32 pinmux
driver.
The alternate function listing currently consists of USART1 pins
only. The listing should be updated when support for more devices is
added.
Change-Id: Ic65aeea9df9aaea7636ecdd6996f56e6ef59dc2f
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Add a common driver for pin control subsystem in STM32 MCU series. The
driver allows for selection of pin's function without the ability of pin
remapping.
The driver implements a pinmux driver API, with custom `func` and `pin`
encoding in API calls. The caller is expected to use STM32PIN() helper
macro for encoding port/pin numbers or using one of the provided
STM32_PIN_* defines.
The common driver requires SoC specific support to be implemented. The
SoC code must implement these calls: stm32_get_pin_config(),
stm32_get_port_clock(), stm32_pin_configure(). Consult pinmux_stm32.h
header for detailn on semantics of these calls.
The driver also requires board level integration. The call
stm32_board_get_pinconf() is expected to privide pin function
assignments for the target board.
Whenever an IO pin is being enabled, the driver will automatically
enable the clock for corresponding port. The driver does not implement
disabling of port's clock as this has potentially disruptive, as such
such operation should be done explicitly in the code.
The pin control module needs to be initialized before any other modules,
but after clock_control. For this reason, the driver is initialized by
default at PRIMARY level, with priority set to 2. The priority can be
changed through configuration.
Change-Id: I8cb746d0f3cad72cd50b3355fe6d93a9f469be25
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
This patch replaces all occurences of the macro DEV_NOT_CONFIG by
-EPERM at the driver level. This patch is part of the effort to
transition from DEV_* codes to errno.h codes.
Change-Id: I3054c8aa76319a58a2eec089b8a72bf301c85391
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_NO_ACCESS by
-EACCES at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/ when applicable.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: Ic7fd162b45e9ceb73141a164649b96eea9886873
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_INVALID_CONF by
-EINVAL at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/ when applicable.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: Idae0d5af8dd780416977c9261a5fb6188c3aab64
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_INVALID_OP by
-ENOTSUP at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/ when applicable.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I46aec3c65963018c479b01602e4a3eec8650eaff
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_OK by the actual
value 0 at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I69980ecb9755f2fb026de5668ae9c21a4ae62d1e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
All driver APIs (i2c, spi, gpio, etc.) return 'int' type, but pinmux
APIs. So this patch changes the returning type from 'uint32_t' to
'int' from include/pinmux.h and fixes all pinmux drivers according.
Besides keeping consistency between all drivers APIs, this patch is
also applicable for the errno.h code transition. Pinmux drivers will
return negative errno.h codes so returning 'int' is more suitable
than 'uint32_t'.
Change-Id: I2a6e92d567a0e21fec363226da6197df94657d4b
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This makes sure the CONFIG_GPIO_K64F_* kconfig options have correct
dependencies. Or else CONFIG_GPIO_K64F can be disabled, but all
the CONFIG_GPIO_K64F_{A,B,C,D,E} are enabled.
Same goes for SPI, FTM and pinmux.
Change-Id: I8d225dea714081b14b19006d61b8f3f6afafa5ee
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Making pinmux depend on GPIO breaks many tests and configurations
when running on real hardware. This should be added as local
configuration in the defconfig instead.
Change-Id: Ibbf1c9a3428ed692937383bf85218b0c120cbe44
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Interrupt and callback function support is added to the K64F GPIO driver.
The implementation is based on the Designware GPIO driver (gpio-dw.*).
Change-Id: Id88d06f748400f8f822ca98e098cb44a53678c38
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
K64 pinmux support is created as a normal driver.
As opposed to the Galileo board, the pin configuration options are
defined by the MCU and are not board-specific. Separate
platform/board-specific configuration code uses the pinmux driver for
the default pin settings. For FRDM-K64F, only the Arduino pins (22 of a
possible 160) are set up.
Some of the I/O pins routed to the Arduino header are also configured as
JTAG/SWD signals by default and are used by the OpenSDAv2 debug
interface. Therefore, a PRESERVE_JTAG_IO_PINS config option was created
for the FRDM-K64 platform to prevent the default pin settings from
re-configuring these pins.
The K64 MCU separates pin configuration and control, implemented in the
pinmux driver, from GPIO. This results in some cross referencing
between the K64 GPIO driver and the K64 pinmux driver due to the
dependencies of one on the other.
This pinmux driver also uses the expanded pinmux function/mode parameter
size to describe pin configuration options with bit fields for the K64,
including up to 8 pin functions, plus interrupt, pullup/down, drive
strength, open-drain and slew rate.
The following GCC warnings in the K64 pinmux driver are prevented when not
compiling with 'no-optimization' (-O0):
warning: 'gpio_dev' may be used uninitialized in this function
[-Wmaybe-uninitialized]
Change-Id: Ie5031d18750143bf895883058b3cd55fd9989fd3
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
The pinmux API was modified to expand the meaning of the 'func' argument
to allow it to represent more than a pre-configured function. This was done
to reasonably accommodate a larger range of pin configuration options
offered by other MCUs, such as the Freescale K64 (up to 8 pin functions,
plus interrupt, pullup/down, drive strength, open-drain, slew rate, etc.).
This allows bit fields to be used to define various settings.
Change-Id: I2b216b822c6bae7133eed01c8c3339bb47b6c5db
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
Adds extern "C" { } blocks to header files so that they can be
safely used by C++ source files.
Change-Id: Ia4db0c36a5dac5d3de351184a297d2af0df64532
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
The Galileo board is based on the X1000 SoC, so move galileo to
boards and create this SoC instead, inheriting all SoC related code
and configuration items.
Change-Id: I9b39f1b44644775ee48acae284b82bae7876fffb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Put initialization priorities as device driver Kconfig
parameter.
Initialization priority value for each platform is defined
in the platform Kconfig file.
Drivers and platform code use SYS_DEFINE_DEVICE to add
and initialization function.
Change-Id: I2f4f3c7370dac02408a1b50a0a1bade8b427a282
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The galileo board no longer needs an extern of the initalize
routine once we've moved the process to the actual file.
Change-Id: I21a0748729b2435a368e28b3a2744b2089ed1e13
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Change all the Intel and Wind River code license from BSD-3 to Apache 2.
Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
This expands the Galileo pinmux driver to configure the GPIOs
on the DesignWare IP block, and the core/resume wells on
the legacy bridge.
Change-Id: Ia1df4b6fd3b104f08563fe9eab93f01efbb53b66
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This provides the API to manipulte the pin muxing, where
a single pin may provide different functions depending on
settings.
[DL: changed commit message.]
Change-Id: Ifd161137c062dff184024b5aa34737604911d09c
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
