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pinmux/stm32: extend pinmux driver functionality to support STM32F3X series MCUs

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Change-Id: Ifc4c93e03b6593f1b6c7e664fdf719f9344fe1ee
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
This commit is contained in:
Adam Podogrocki 2016-11-04 09:08:52 +01:00 • committed by Kumar Gala
commit 726d11a5a2
2 changed files with 12 additions and 7 deletions
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7
arch/arm/soc/st_stm32/stm32f1/soc.h
View file

@ -30,7 +30,12 @@
#include <stm32f1xx.h>
/* IO pin functions */
/* IO pin functions are mostly common across STM32 devices. Notable
* exception is STM32F1 as these MCUs do not have registers for
* configuration of pin's alternate function. The configuration is
* done implicitly by setting specific mode and config in MODE and CNF
* registers for particular pin.
*/
enum stm32f10x_pin_config_mode {
STM32F10X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
STM32F10X_PIN_CONFIG_BIAS_PULL_UP,

12
drivers/pinmux/stm32/pinmux_stm32.c
View file

@ -51,12 +51,7 @@ static int enable_port(uint32_t port, struct device *clk)
}
/* TODO: Merge this and move the port clock to the soc file */
#if defined(CONFIG_SOC_SERIES_STM32F1X) || defined(CONFIG_SOC_SERIES_STM32L4X)
clock_control_subsys_t subsys = stm32_get_port_clock(port);
return clock_control_on(clk, subsys);
#elif CONFIG_SOC_SERIES_STM32F4X
#ifdef CONFIG_SOC_SERIES_STM32F4X
struct stm32f4x_pclken pclken;
/* AHB1 bus for all the GPIO ports */
@ -64,6 +59,11 @@ static int enable_port(uint32_t port, struct device *clk)
pclken.enr = ports_enable[port];
return clock_control_on(clk, (clock_control_subsys_t *) &pclken);
#else /* SOC_SERIES_STM32F1X || SOC_SERIES_STM32F3X || SOC_SERIES_STM32L4X */
clock_control_subsys_t subsys = stm32_get_port_clock(port);
return clock_control_on(clk, subsys);
#endif
}