Pinmux driver almost certainly should be initialized before the
rest of hardware devices (which may need specific pins already
configured for them), and usually after generic GPIO drivers.
Thus, its priority should be between KERNEL_INIT_PRIORITY_DEFAULT
(default 40) and KERNEL_INIT_PRIORITY_DEVICE (default 50). Thus,
we set PINMUX_INIT_PRIORITY to 45.
There are exceptions to the rule above for particular boards. For
example, BOARD=galileo has GPIO and pinmuxer on I2C bus and thus
overrides PINMUX_INIT_PRIORITY to be much higher. Note that while
PINMUX_INIT_PRIORITY was defined previously (at 60), it was used
only for galileo, which overrides it anyway.
This fix was prompted by investigation why eth_ksdk driver was
non-functional after kernel priorities re-hashing: both eth_ksdk
and pinmux used the same priority, and eth_ksdk happened to run
before pinmux. While bumping eth_ksdk priority would help in the
particular case, the same would likely reoccur with other drivers
like I2C, SPI, etc.
Change-Id: Ie5ca3135c1ee2fe8d9cf48d5c12e62eac63487f7
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
This patch adds the support for "runtime" pinmux on ARM V2M Beetle.
The GPIO controllers 2 and 3 are reserved and therefore not exposed
by this driver.
Jira: ZEP-1245
Change-Id: I9637f1a0d2bf6a757e1942160fb170165ffe6a0c
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds the support for the board pinmux initialization on
ARM V2M Beetle.
The GPIO controllers 2 and 3 are reserved and therefore neither exposed
nor configured by this driver.
Jira: ZEP-1245
Change-Id: Id5499c5dd887c319730408eeb30f02eeed1c3699
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
These pins are routed to the arduino header, and configuring them for
UART signals allows us to use the frdm_k64f with a frdm_kw40z shield
board for bluetooth.
Change-Id: Ie30916409844b1dc1c6e1280d5a755a6dc42e418
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add the definition required to change the pinmux of port H.
Change-Id: I3cc107f9151db4d38fe2cace90cd02d5955a2717
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for the STM32F401 chip on the board
Change-Id: I96c0799f3658ecea096fa5971bce9faf21919ee1
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change the clock accessors to a tuple of bus ID of the subsystem and enable
bits for the device - it is clearer to read than the opaque pointers.
Change-Id: I9ae73c222c04adac4cf2bc06e97f4ec199bdac3c
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
STM32F401 allows for upto 16 alternate functions on each pin.
Change-Id: Ib1c14fd31abaa2b05a5ab0f7bd1b4a4748f10f84
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
STM32F4 requires the alternative function config to be set, so just
initialize that as part of the gpio configure call.
Change-Id: I33a4a8efec59c5ebe7dc3f3580f0dd2bf7ded7f4
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
The hexiwear board has a k64 SoC, so we can reuse the k64 pinmux driver
and just add a new pinmux table for the board.
Jira: ZEP-716
Change-Id: I936691b3578db298014f44fe18433d7943b431f3
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The k64 pinmux driver can be used for any k64 board, not just frdm_k64f,
therefore renaming the driver accordingly.
Change-Id: I45e96d4a5ff6aa859d0f57fe098e44a8ae5283d1
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Those options are not being used anywhere, so remove them and avoid some
confusion.
Change-Id: Ia3767dbd2432851dfae4b1e996f02ed1b2450505
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Provide a network driver wrapped around the KSDK ENET and PHY
drivers.
The driver performs one shot PHY setup. There is no support for PHY
disconnect, reconnect or configuration change. The PHY setup,
implement via KSDK contains polled code that can block the
initialization thread for a few seconds.
There is no statistics collection for either normal operation or error
behaviour.
Origin: Original
Change-Id: Ia0f2e89a61348ed949976070353e823c178fcb24
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Add PTB22, PTE26, and PTB21 to the frdm_k64f pinmux table, and helper
macros to board.h to map them to red, green, and blue LEDs respectively.
Change-Id: I257621467e71dfd9bdc5d97d6da444dfb5c58b2b
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add PTC6 and PTA4 to the frdm_k64f pinmux table, and helper macros in
board.h to map them to SW2 and SW3 respectively.
Change-Id: Ia30df9015d6d3c09131b4fbb2f2009ee745f7268
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Statically compute the number of elements in the pinmux table rather
than keep a manual entry in step with the table.
Change-Id: I99634aa460a39bb8a9a10fe37d28aaae792aa641
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
CONFIG_PINMUX_DEV_QUARK_MCU is deprecated and QUARK MCU support
is replaced by CONFIG_PINMUX_DEV_QMSI. So delete this deprecated
CONFIG option.
Change-Id: I2cad6cfd4344386a00d45a579e8cc586935b041f
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
CONFIG_PINMUX_DEV_NAME should depends on CONFIG_PINMUX_DEV, not
CONFIG_PINMUX. In current situation, user will be able to access
pinmux dev driver without enabling CONFIG_PINMUX_DEV. This isn't
excepted to happen.
Change-Id: I75bcfff5a51e1dc93e002c0c6a65876f93cde5b8
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
According to commit 2055b06e ("quark: move pinmux files to board"),
drivers/pinmux/quark_mcu/ was deleted, so remove it from the Makefile.
According to commit 0ae2e895 ("remove custom pinmux for quark and use qmsi"),
pinmux_dev_quark_mcu.c is no longer compiled into image, so delete
this unused file.
Change-Id: Ied63cd3b06e8225205c5f1b3e5a675c387acb5ad
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
Completing the terminology change started with change 4008
by updating the Kconfig files processed to produce the
online documentation, plus header files processed by
doxygen. References to 'platform' are change to 'board'
Change-Id: Id0ed3dc1439a0ea0a4bd19d4904889cf79bec33e
Jira: ZEP-534
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Move pinmux defintions under board/<board> and have all board
configuration in one single place.
Change-Id: I055b024384fae2938881b1c57d8ce7426e732e92
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert leading whitespace into tabs in Kconfig files. Also replaced
double spaces between config and <prompt>.
Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch removes the PINMUX_SELECT_REGISTER macro definition from
pinmux_dev_quark_mcu.c since it is already defined in pinmux_quark_mcu.h
(which is included by the .c file).
Change-Id: I468cf6a54fc30d681f42a59eb2c8401d2b180849
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Add implementation for pinmux pin get API in the shim driver.
It is based on the function from pinmux_dev_quark_mcu.c
Jira: ZEP-189
Change-Id: Ib6673f90cfe8e367fcbd12ed546b1fa3af7e1dbf
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
The pinmux_stm32 and pinmux_dev_stm32 drivers use errno codes so they
should include errno.h.
Change-Id: I3fd19b338d5525f44207e8c770285ef218dd27a2
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Add configuration for OLIMEXINO_STM32 board.
By default, the UART console is forwarded to USART1 available on
UEXT connector. All GPIO ports available on the connecot headers
are enabled.
Change-Id: I60b3ff20ea60b5294a3a6c31f4dba0802794f9d8
Origin: Based on nucleo_f103rb board
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Add Kinetis SoC family and rename fsl_frdm_k64f to mk64f12.
This will allow adding new SoCs of the same family and the reuse of code
among SoCs of the family and series.
Change-Id: Iea1a663aef7ce0487f147bdd36f668bebe80deb5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.
Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use CONFIG_SOC_FAMILY for the top level SoC family. A family
will have different SoCs or different SoC series with multiple
SoCs.
Adding the Family string to the config variable to avoid confusion
between actual SoCs and families and to prevent name collisions.
Change-Id: Ic99a2c1df7850dee3a45641027af82464dd6fadb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Currently, the /CS pin is deasserted by _spi_config_cs() and
the pinmux driver sets it as an input afterwards. Later, setting
the /CS pin to an output via pinmux_dev asserts it.
Setting the SPI port 1 pins in the pinmux driver saves a few lines
of code. Moving the SPI init after pinmux init keeps the /CS pin as
configured by the SPI driver.
Change-Id: I4c587ba0a6983cd89dfb5ecedb2914335e86313b
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
This converts the pinmux/dev drivers to use DEVICE_AND_API_INIT(),
since the driver_api assignment will never change.
Change-Id: I0063b19e2afe932e1daf3255e718455aaa200ff1
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
