This CL introduces how to configure PSL (Power Switch Logic) pads
properties such as input detection mode/polarity, pin-muxing and so
on via pinctrl mechanism. It includes:
1. Add two pinctrl properties and their enums for PSL input
detection configuration.
psl-in-mode:
- "level"
- "mode"
psl-in-pole:
- "low-falling"
- "high-rising"
2. Add macro functions to get PSL input detection and pin-muxing
configurations from 'pinmux', 'psl-offset' abd 'psl-polarity'
properties.
Here is an example to configure PSL_IN2 as the PSL detection input and
its mode and polarity.
/* A falling edge detection type for PSL_IN2 */
&psl_in2_gp00 {
psl-in-mode = "edge";
psl-in-pol = "low-falling";
};
A device will be introduced later which uses this pinctrl node to
configure PSL input detection settings and how to turn off VCC1 power
rail by PSL_OUT.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
For vectored interrupts use the generated IRQ vector table instead of
relying on a custom-generated table.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Both idle and suspend states were just being used to set the cpu
idle. That is not necessary, if the pm policy does not find a suitable
power state the kernel automatically calls k_cpu_idle().
This remove unnecessary code and the weirdness of having
min-residency-us set to 0 and other arbitrary values.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
1. Improve the firmware transfer reliability by fixing the misuse
of the socket. Fix the most frequent occurence of the common `recv()`
bug described here:
https://docs.python.org/3/howto/sockets.html#using-a-socket
The longer term fix is to switch to a higher level API like Python
Remote Objects.
2. Not rely on the client's command to disconnect. Previously we
rely on the SIGINT to send stop_command to the server, but it does
not work well in some environments. Refine the whole logic and the
sever disconnect service by checking if the client is alive or not.
These changes make the client-server-based cavstool more stable.
Fixes#46864
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
Header soc.h is included during C++ source file compilation
and required adding C++ casts as implicit casting from void*
is forbidden. Fixed minor warning comparing signed with unsigned
integer.
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Replaced hardcoded for intel_adsp_ace15_mtpm board
HP_MEMORY_BANKS value used in SOF code with generic approach -
using PLATFORM_HPSRAM_EBB_COUNT read from Devicetree.
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Properly prefixing some include files with "zephyr", also organizing
the order they are included.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
These two timers were sharing pretty much the same code. Actually
mtl timer was a "superset" of cavs timer. Just merge them into a
single one called intel audio dsp timer (intel_adsp_timer).
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Do not duplicate code in new SoC and reuse code from intel_adsp/common.
Move SRAM code into own file in common code and setup SRAM in soc for
MTL platform.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch implements pm_state_set function for ACE platforms.
This is initial implementation and only includes the basic handling of
PM_STATE_SOFT_OFF.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch add soc_adsp_halt_cpu implementation for ace. Function disable
power and check CPA status to report success. Function should be used only
for secondary cores and can be executed only from primary core.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Poll for CPA bit by which HW confirms that the core has been powered up.
Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Co-authored-by: Tomasz Leman <tomasz.m.leman@intel.com>
Co-authored-by: Andrey Borisovich <andrey.borisovich@intel.com>
Add ace/mtl rom flags definitions.
Set the flags in battr to indicate to rom that it should execute
secondary core procedure.
Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Co-authored-by: Andrey Borisovich <andrey.borisovich@intel.com>
Meteorlake support as part of the Intel ADSP family.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Co-authored-by: Michal Wasko <michal.wasko@intel.com>
Co-authored-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Co-authored-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Co-authored-by: Enjia Mai <enjia.mai@intel.com>
Co-authored-by: Flavio Ceolin <flavio.ceolin@intel.com>
Co-authored-by: Tomasz Leman <tomasz.m.leman@intel.com>
Co-authored-by: Bonislawski Adrian <adrian.bonislawski@intel.com>
Co-authored-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Co-authored-by: Andrey Borisovich <andrey.borisovich@intel.com>
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We need more time to run codes because of the performance,
so I tune CONFIG_SYS_CLOCK_TICKS_PER_SEC down to reduce
the times of running k_usleep(1), then it can pass test_usleep().
Verified by follow test pattern:
west build -p always -b it8xxx2_evb tests/kernel/sleep
fixes#46208
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Keep the cavstwist.sh it is still working by specifying an
environment variable when CAVS_OLD_FLASHER is set. Provide
a fallback once the client-server-based tool does not work
well in some conditions.
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
Since the timer interrupt is delivered to all cores at the same
time, it needs to be disabled (or masked) to prevent it from
waking a suspended CPU core.
Note that there is no need to re-enable (unmask) timer
interrupt separately as it is being taken care of in
smp_timer_init() when the CPU re-inits itself.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
To power down secondary cores on cAVS 2.5 platforms the primary core
enables the power-saving mode for the respective secondary core and
waits until that core enters idle() and executes the waiti
instruction at which point the core should enter a lower-power mode.
However, that core can then also automatically wake up and execute
its reset path if, e.g. an interrupt is delivered to it. However, it
isn't entirely clear which events are able to wake up cores from that
state. Disabling interrupts on the interrupt controller didn't seem
to prevent that from happening completely. In particular a specific
ADL notebook seems to be susceptible to this problem. Checking for
such sporadic boots and returning to idle fixes the problem.
BugLink: https://github.com/zephyrproject-rtos/zephyr/issues/46372
BugLink: https://github.com/thesofproject/sof/issues/5733
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Select HAS_MCUX_XBARA Kconfig symbol for MIMXRT1062,
since the XBARA Inter-Peripheral Crossbar Switch peripheral is present
on this SOC.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Added mchp mec zephyr image generator python script. It takes
zephyr.bin as input and produces zephyr.mchp.bin.
The default behavior is to not pad to SPI flash size.
(Enable through CONFIG_MCHP_MEC_UNSIGNED_HEADER=y and
CONFIG_MCHP_MEC_HEADER_FLASH_SIZE_256K=y)
zephyr.mchp.bin is composed of:
1. First 4KB contains TAG at offset 0 and header at offset 0x100
2. Offset 0x1000 is the start of zephyr.bin which has been padded
to a multiple of 128 bytes.
3. Boot-ROM EC Info Block (128 bytes)
4. Boot-ROM Co-Signature Block (96 bytes)
5. Boot-ROM trailer (160 bytes) contains the SHA-384 digest of 2-4.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
A full second is too much, and since "Ack local interrupt before
processing IPC" patch, it doesn't seem necessary. This whole second
wait would break tests that log too much content, as the firmware
is already running during the reset - and the host script wouldn't read
the contents, thus some of the logs would be overwritten.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
External libraries can contain processing module code or common library
code. Library manager need to distinguish between both type of modules
for proper loading.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
This commit introduces driver for granting access for own grant
table and for mapping/unmapping foreign gref. Grant tables are used
for data exchange between Xen domains via shared memory page(s) (e.g.
for sharing ring buffer with driver data) This functionality is
widely used and needed for implementing PV backend/frontend drivers.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
enable swo output for iMX RT 10xx series. SWO pinmux settings are
currently only present for the RT1060 and RT1064
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
It seems a race can happen between the host acknowledging a DONE
interrupt and the DSP being able to mark some IPC as done. To avoid
this, the host script now always acknowledges the DONE interrupt
_before_ processing the IPC message.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Default to 1 CPU core on the Xilinx Zynq-7000 SoC series since Zephyr does
not yet suppport SMP on aarch32.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add Xilinx Zynq-70000 pinctrl header file to define SoC specific
pinctrl_soc_t structure. This is used to store pin configurations for the
pinctrl driver.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Unlock the Xilinx Zynq-7000 System Level Control Registers (SLCR) at boot
to allow write access using the generic syscon driver.
Since the generic syscon driver uses the DEVICE_MMIO_* APIs for
memory-mapped IO we can remove the dedicated SLCR MMU region.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
When using CONFIG_NPCX_IMAGE_OUTPUT_HEX, set the hex_file
runners_yaml_props_target property, so that west flash will flash the
correct file.
Change the cmake flash rules to populate the hex_file value in the
runners.yaml file if either CONFIG_BUILD_OUTPUT_HEX is enabled or some
cmake file set the runners_yaml_props_target hex_file property.
Update the npcx9m6f_evb instructions now that the filename is implicit.
Signed-off-by: Jeremy Bettis <jbettis@google.com>
They may be disabled in some environments (such as Gentoo based
developer mode on Chromebooks). Use extended regular expressions
instead.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Select missing HAS_MCUX_SRC Kconfig symbol for MIMXRT1062,
that allows using NXP i.MX mcux SRC hwinfo driver.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
