Microchip: MEC172x: I2C driver
Microchip MEC172x series I2C driver implementing controller and target modes. The driver implemenents its own I2C port pin control functions and does not depended upon pinmux. Future updates will make use of PINCTRL when that subystem is finalized. Signed-off-by: Scott Worley <scott.worley@microchip.com>
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9 changed files with 1280 additions and 1 deletions
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@ -21,6 +21,9 @@
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aliases {
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led0 = &led4;
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led1 = &led3;
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i2c0 = &i2c_smb_0;
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i2c1 = &i2c_smb_1;
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i2c7 = &i2c_smb_2;
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};
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leds {
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@ -67,3 +70,38 @@
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&adc0 {
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status = "okay";
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};
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&i2c_smb_0 {
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status = "okay";
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label = "I2C0";
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port_sel = <0>;
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pca9555@26 {
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compatible = "nxp,pca95xx";
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label = "GPIO_P0";
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/* Depends on JP53 for device address.
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* Pin 1-2 = A0, pin 3-4 = A1, pin 5-6 = A2.
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* Address is: 0100<A2><A1><A0>b.
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*
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* Default has pin 1-2 on JP53 connected,
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* resulting in device address 0x26.
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*/
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reg = <0x26>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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&i2c_smb_1 {
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status = "okay";
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label = "I2C1";
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port_sel = <1>;
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};
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&i2c_smb_2 {
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status = "okay";
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label = "I2C7";
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port_sel = <7>;
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};
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@ -16,3 +16,4 @@ flash: 352
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supported:
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- gpio
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- pinmux
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- i2c
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@ -16,3 +16,4 @@ CONFIG_SERIAL=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_ADC=y
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CONFIG_I2C=y
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@ -34,6 +34,7 @@ zephyr_library_sources_ifdef(CONFIG_I2C_NPCX i2c_npcx_port.c)
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zephyr_library_sources_ifdef(CONFIG_I2C_DW i2c_dw.c)
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zephyr_library_sources_ifdef(CONFIG_I2C_RCAR i2c_rcar.c)
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zephyr_library_sources_ifdef(CONFIG_I2C_TCA9546A i2c_tca9546a.c)
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zephyr_library_sources_ifdef(CONFIG_I2C_XEC_V2 i2c_mchp_xec_v2.c)
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zephyr_library_sources_ifdef(CONFIG_I2C_STM32_V1
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i2c_ll_stm32_v1.c
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@ -5,6 +5,12 @@
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config I2C_XEC
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bool "XEC Microchip I2C driver"
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depends on SOC_FAMILY_MEC
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depends on SOC_SERIES_MEC1501X
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help
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Enable the Microchip XEC I2C driver.
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config I2C_XEC_V2
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bool "XEC Microchip I2C driver"
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depends on SOC_SERIES_MEC172X
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help
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Enable the Microchip XEC I2C V2 driver.
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1180
drivers/i2c/i2c_mchp_xec_v2.c
Normal file
1180
drivers/i2c/i2c_mchp_xec_v2.c
Normal file
File diff suppressed because it is too large
Load diff
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@ -533,6 +533,7 @@
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status = "disabled";
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};
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i2c_smb_0: i2c@40004000 {
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compatible = "microchip,xec-i2c-v2";
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reg = <0x40004000 0x80>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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interrupts = <20 1>;
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@ -544,6 +545,7 @@
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status = "disabled";
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};
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i2c_smb_1: i2c@40004400 {
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compatible = "microchip,xec-i2c-v2";
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reg = <0x40004400 0x80>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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interrupts = <21 1>;
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@ -555,6 +557,7 @@
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status = "disabled";
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};
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i2c_smb_2: i2c@40004800 {
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compatible = "microchip,xec-i2c-v2";
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reg = <0x40004800 0x80>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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interrupts = <22 1>;
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@ -566,6 +569,7 @@
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status = "disabled";
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};
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i2c_smb_3: i2c@40004c00 {
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compatible = "microchip,xec-i2c-v2";
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reg = <0x40004C00 0x80>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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interrupts = <23 1>;
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@ -577,6 +581,7 @@
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status = "disabled";
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};
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i2c_smb_4: i2c@40005000 {
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compatible = "microchip,xec-i2c-v2";
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reg = <0x40005000 0x80>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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interrupts = <158 1>;
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43
dts/bindings/i2c/microchip,xec-i2c-v2.yaml
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43
dts/bindings/i2c/microchip,xec-i2c-v2.yaml
Normal file
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@ -0,0 +1,43 @@
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# Copyright (c) 2019 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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description: Microchip I2C/SMB V2 controller
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compatible: "microchip,xec-i2c-v2"
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include: i2c-controller.yaml
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properties:
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reg:
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required: true
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port_sel:
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type: int
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description: soc block mapping to pin
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required: true
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girqs:
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type: array
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required: true
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description: array of GIRQ numbers [8:26] and bit positions [0:31]
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pcrs:
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type: array
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required: true
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description: PCR sleep register index and bit position
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"#girq-cells":
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type: int
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const: 2
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"pcr-cells":
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type: int
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const: 2
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girq-cells:
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- girq_num
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- bitpos
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pcr-cells:
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- regidx
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- bitpos
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@ -27,4 +27,8 @@ config ADC_XEC_V2
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default y
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depends on ADC
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config I2C_XEC_V2
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default y
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depends on I2C
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endif # SOC_MEC172X_NSZ
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