Microchip: MEC172x: I2C driver

Microchip MEC172x series I2C driver implementing controller
and target modes. The driver implemenents its own I2C port
pin control functions and does not depended upon pinmux. Future
updates will make use of PINCTRL when that subystem is finalized.

Signed-off-by: Scott Worley <scott.worley@microchip.com>

boards/arm/mec172xevb_assy6906/mec172xevb_assy6906.dts

@@ -21,6 +21,9 @@
 	aliases {
 		led0 = &led4;
 		led1 = &led3;
+		i2c0 = &i2c_smb_0;
+		i2c1 = &i2c_smb_1;
+		i2c7 = &i2c_smb_2;
 	};
 
 	leds {
@@ -67,3 +70,38 @@
 &adc0 {
 	status = "okay";
 };
+
+&i2c_smb_0 {
+	status = "okay";
+	label = "I2C0";
+	port_sel = <0>;
+
+	pca9555@26 {
+		compatible = "nxp,pca95xx";
+		label = "GPIO_P0";
+
+		/* Depends on JP53 for device address.
+		 * Pin 1-2 = A0, pin 3-4 = A1, pin 5-6 = A2.
+		 * Address is: 0100<A2><A1><A0>b.
+		 *
+		 * Default has pin 1-2 on JP53 connected,
+		 * resulting in device address 0x26.
+		 */
+		reg = <0x26>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+};
+
+&i2c_smb_1 {
+	status = "okay";
+	label = "I2C1";
+	port_sel = <1>;
+};
+
+&i2c_smb_2 {
+	status = "okay";
+	label = "I2C7";
+	port_sel = <7>;
+};

boards/arm/mec172xevb_assy6906/mec172xevb_assy6906.yaml

@@ -16,3 +16,4 @@ flash: 352
 supported:
   - gpio
   - pinmux
+  - i2c

boards/arm/mec172xevb_assy6906/mec172xevb_assy6906_defconfig

@@ -16,3 +16,4 @@ CONFIG_SERIAL=y
 CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y
 CONFIG_ADC=y
+CONFIG_I2C=y

drivers/i2c/CMakeLists.txt

@@ -34,6 +34,7 @@ zephyr_library_sources_ifdef(CONFIG_I2C_NPCX		i2c_npcx_port.c)
 zephyr_library_sources_ifdef(CONFIG_I2C_DW		i2c_dw.c)
 zephyr_library_sources_ifdef(CONFIG_I2C_RCAR		i2c_rcar.c)
 zephyr_library_sources_ifdef(CONFIG_I2C_TCA9546A	i2c_tca9546a.c)
+zephyr_library_sources_ifdef(CONFIG_I2C_XEC_V2		i2c_mchp_xec_v2.c)
 
 zephyr_library_sources_ifdef(CONFIG_I2C_STM32_V1
 	i2c_ll_stm32_v1.c

drivers/i2c/Kconfig.xec

@@ -5,6 +5,12 @@
 
 config I2C_XEC
 	bool "XEC Microchip I2C driver"
-	depends on SOC_FAMILY_MEC
+	depends on SOC_SERIES_MEC1501X
 	help
 	  Enable the Microchip XEC I2C driver.
+
+config I2C_XEC_V2
+	bool "XEC Microchip I2C driver"
+	depends on SOC_SERIES_MEC172X
+	help
+	  Enable the Microchip XEC I2C V2 driver.

dts/arm/microchip/mec172xnsz.dtsi

@@ -533,6 +533,7 @@
 			status = "disabled";
 		};
 		i2c_smb_0: i2c@40004000 {
+			compatible = "microchip,xec-i2c-v2";
 			reg = <0x40004000 0x80>;
 			clock-frequency = <I2C_BITRATE_STANDARD>;
 			interrupts = <20 1>;
@@ -544,6 +545,7 @@
 			status = "disabled";
 		};
 		i2c_smb_1: i2c@40004400 {
+			compatible = "microchip,xec-i2c-v2";
 			reg = <0x40004400 0x80>;
 			clock-frequency = <I2C_BITRATE_STANDARD>;
 			interrupts = <21 1>;
@@ -555,6 +557,7 @@
 			status = "disabled";
 		};
 		i2c_smb_2: i2c@40004800 {
+			compatible = "microchip,xec-i2c-v2";
 			reg = <0x40004800 0x80>;
 			clock-frequency = <I2C_BITRATE_STANDARD>;
 			interrupts = <22 1>;
@@ -566,6 +569,7 @@
 			status = "disabled";
 		};
 		i2c_smb_3: i2c@40004c00 {
+			compatible = "microchip,xec-i2c-v2";
 			reg = <0x40004C00 0x80>;
 			clock-frequency = <I2C_BITRATE_STANDARD>;
 			interrupts = <23 1>;
@@ -577,6 +581,7 @@
 			status = "disabled";
 		};
 		i2c_smb_4: i2c@40005000 {
+			compatible = "microchip,xec-i2c-v2";
 			reg = <0x40005000 0x80>;
 			clock-frequency = <I2C_BITRATE_STANDARD>;
 			interrupts = <158 1>;

dts/bindings/i2c/microchip,xec-i2c-v2.yaml

@@ -0,0 +1,43 @@
+# Copyright (c) 2019 Intel Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+description: Microchip I2C/SMB V2 controller
+
+compatible: "microchip,xec-i2c-v2"
+
+include: i2c-controller.yaml
+
+properties:
+    reg:
+      required: true
+
+    port_sel:
+      type: int
+      description: soc block mapping to pin
+      required: true
+
+    girqs:
+      type: array
+      required: true
+      description: array of GIRQ numbers [8:26] and bit positions [0:31]
+
+    pcrs:
+      type: array
+      required: true
+      description: PCR sleep register index and bit position
+
+    "#girq-cells":
+      type: int
+      const: 2
+
+    "pcr-cells":
+      type: int
+      const: 2
+
+girq-cells:
+    - girq_num
+    - bitpos
+
+pcr-cells:
+    - regidx
+    - bitpos

soc/arm/microchip_mec/mec172x/Kconfig.defconfig.mec172xnsz

@@ -27,4 +27,8 @@ config ADC_XEC_V2
 	default y
 	depends on ADC
 
+config I2C_XEC_V2
+	default y
+	depends on I2C
+
 endif # SOC_MEC172X_NSZ