drivers: counter: Add ctimer driver for RT685
Add counter support using CTimer for RT685 Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
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6 changed files with 100 additions and 1 deletions
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@ -97,6 +97,8 @@ features:
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+-----------+------------+-------------------------------------+
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| CTIMER | on-chip | counter |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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@ -310,3 +310,23 @@ i2s1: &flexcomm3 {
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zephyr_udc0: &usbhs {
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status = "okay";
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};
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&ctimer0 {
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status = "okay";
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};
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&ctimer1 {
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status = "okay";
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};
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&ctimer2 {
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status = "okay";
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};
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&ctimer3 {
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status = "okay";
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};
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&ctimer4 {
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status = "okay";
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};
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@ -326,6 +326,71 @@
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offset-value-b = <10>;
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#io-channel-cells = <1>;
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};
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ctimer0: ctimer@28000 {
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compatible = "nxp,lpc-ctimer";
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reg = <0x28000 0x1000>;
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interrupts = <10 0>;
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status = "disabled";
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clk-source = <1>;
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clocks = <&clkctl1 MCUX_CTIMER0_CLK>;
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mode = <0>;
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input = <0>;
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prescale = <0>;
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label = "CTIMER_0";
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};
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ctimer1: ctimer@29000 {
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compatible = "nxp,lpc-ctimer";
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reg = <0x29000 0x1000>;
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interrupts = <11 0>;
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status = "disabled";
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clk-source = <1>;
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clocks = <&clkctl1 MCUX_CTIMER1_CLK>;
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mode = <0>;
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input = <0>;
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prescale = <0>;
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label = "CTIMER_1";
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};
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ctimer2: ctimer@2a000 {
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compatible = "nxp,lpc-ctimer";
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reg = <0x2a000 0x1000>;
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interrupts = <39 0>;
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status = "disabled";
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clk-source = <1>;
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clocks = <&clkctl1 MCUX_CTIMER2_CLK>;
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mode = <0>;
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input = <0>;
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prescale = <0>;
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label = "CTIMER_2";
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};
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ctimer3: ctimer@2b000 {
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compatible = "nxp,lpc-ctimer";
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reg = <0x2b000 0x1000>;
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interrupts = <13 0>;
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status = "disabled";
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clk-source = <1>;
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clocks = <&clkctl1 MCUX_CTIMER3_CLK>;
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mode = <0>;
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input = <0>;
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prescale = <0>;
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label = "CTIMER_3";
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};
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ctimer4: ctimer@2c000 {
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compatible = "nxp,lpc-ctimer";
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reg = <0x2c000 0x1000>;
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interrupts = <40 0>;
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status = "disabled";
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clk-source = <1>;
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clocks = <&clkctl1 MCUX_CTIMER4_CLK>;
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mode = <0>;
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input = <0>;
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prescale = <0>;
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label = "CTIMER_4";
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};
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};
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&nvic {
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@ -74,4 +74,8 @@ choice USB_MCUX_CONTROLLER_TYPE
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default USB_DC_NXP_LPCIP3511
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endchoice
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config COUNTER_MCUX_CTIMER
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default y
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depends on COUNTER
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endif # SOC_MIMXRT685S_CM33
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@ -31,7 +31,7 @@ config SOC_MIMXRT685S_CM33
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select INIT_SYS_PLL
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select HAS_MCUX_USB_LPCIP3511
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select USB_DEDICATED_MEMORY if USB_DEVICE_DRIVER
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select HAS_MCUX_CTIMER
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endchoice
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if SOC_SERIES_IMX_RT6XX
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@ -37,6 +37,12 @@
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(((uint32_t)nxp_rt600_init >= 0x18000000U) && \
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((uint32_t)nxp_rt600_init < 0x20000000U)))
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#define CTIMER_CLOCK_SOURCE(node_id) \
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TO_CTIMER_CLOCK_SOURCE(DT_CLOCKS_CELL(node_id, name), DT_PROP(node_id, clk_source))
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#define TO_CTIMER_CLOCK_SOURCE(inst, val) TO_CLOCK_ATTACH_ID(inst, val)
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#define TO_CLOCK_ATTACH_ID(inst, val) CLKCTL1_TUPLE_MUXA(CT32BIT##inst##FCLKSEL_OFFSET, val)
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#define CTIMER_CLOCK_SETUP(node_id) CLOCK_AttachClk(CTIMER_CLOCK_SOURCE(node_id));
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#ifdef CONFIG_INIT_SYS_PLL
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const clock_sys_pll_config_t g_sysPllConfig = {
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.sys_pll_src = kCLOCK_SysPllXtalIn,
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@ -269,6 +275,8 @@ static ALWAYS_INLINE void clock_init(void)
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RESET_PeripheralReset(kSDIO0_RST_SHIFT_RSTn);
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#endif
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DT_FOREACH_STATUS_OKAY(nxp_lpc_ctimer, CTIMER_CLOCK_SETUP)
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#endif /* CONFIG_SOC_MIMXRT685S_CM33 */
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}
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