soc: riscv: riscv-privilege: add GP relative addressing support

Initialize GP at common entry point of riscv-privilege SoCs so that
this commit add GP support of these SoCs at once.

As some privilege SoCs want to customize the entry point, they should
disable linker relaxation by `.norelax option` before entrying the
common entry point `__start`.

Signed-off-by: Jim Shu <cwshu@andestech.com>
This commit is contained in:
Jim Shu 2021-08-17 02:54:25 +08:00 committed by Christopher Friedt
commit c3ecf5331b
5 changed files with 20 additions and 0 deletions

View file

@ -15,6 +15,14 @@ GTEXT(__initialize)
GTEXT(__irq_wrapper)
SECTION_FUNC(vectors, __start)
#if defined(CONFIG_RISCV_GP)
/* Initialize global pointer */
.option push
.option norelax
la gp, __global_pointer$
.option pop
#endif
.option norvc;
/*

View file

@ -17,6 +17,9 @@ config RISCV_HAS_CPU_IDLE
config RISCV_HAS_PLIC
default y
config RISCV_GP
default y
config 2ND_LVL_ISR_TBL_OFFSET
default 12

View file

@ -17,6 +17,9 @@ config RISCV_HAS_CPU_IDLE
config RISCV_HAS_PLIC
default y
config RISCV_GP
default y
config 2ND_LVL_ISR_TBL_OFFSET
default 12

View file

@ -18,6 +18,9 @@ config RISCV_HAS_CPU_IDLE
config RISCV_HAS_PLIC
default y
config RISCV_GP
default y
config 2ND_LVL_ISR_TBL_OFFSET
default 12

View file

@ -18,6 +18,9 @@ config RISCV_HAS_CPU_IDLE
config RISCV_HAS_PLIC
default y
config RISCV_GP
default y
config 2ND_LVL_ISR_TBL_OFFSET
default 12