Commit graph

561 commits

Author SHA1 Message Date
Yuriy Vynnychek
d011e782c7 dts: riscv: add Telink B91 IEEE802154 driver support
Added IEEE802154 driver DTSI support for Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-08-04 11:58:02 +02:00
Felipe Neves
d368087fc0 drivers: serial: added minimal uart driver for esp32c3
based on uart rom functions, also enable console driver
on top if this driver enabling logging

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-08-03 11:20:06 -05:00
Tim Lin
e300c8ecbb ITE: dts/riscv it8xxx2: add pinmux control of SHI
Add pinmux control for SHI alternate function.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-07-27 17:42:47 -04:00
Ruibin Chang
21f0f958fe ITE drivers/ite_it8xxx2_timer: re-write ite timer driver
Re-write ite timer driver.

Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
2021-07-24 21:26:49 -04:00
Yuriy Vynnychek
77bd56f9b1 dts: riscv: add basic dts support for new Telink B91 platform
CPU, Power, GPIO, Serial and Pinctrl dtsi support for new
Telink B91 RISC-V platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Tim Lin
abe27c5bca ITE: driver/i2c: add I2C recovery function
Use GPIO output high and low to simulate I2C start and stop
conditions to restore i2c to normal.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-07-14 07:32:16 -04:00
Tim Lin
8fdcc11d6b ITE: drivers/i2c: create pinmux phandle to the I2C driver node
Create the pinmux phandle to the I2C driver node in the
devicetree. When the pinmux_pin_set function in
i2c_it8xxx2_init can refer to the setting of this phandle.
It is more flexible to use.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-07-14 07:32:16 -04:00
Felipe Neves
132ab922a8 drivers: timer: esp32c3: add esp32c3 systimer driver to CODEOWNERS
Also added maintainer to the entry

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-07-07 20:58:50 -04:00
Felipe Neves
c23b46a78a dts: riscv: espressif: correct sram0 compatible label to mmio-sram
And removes the odd esp32c3 competible from it

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-07-07 20:58:50 -04:00
Felipe Neves
5d736766ed soc: esp32c3: added initial soc support files for esp32c3
by adding the soc specific files such: soc initialization code,
linker scripts and support for esp32c3 devkitm

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-07-07 20:58:50 -04:00
Ruibin Chang
d0ce9bb877 ITE drivers/pwm: add PWM for it8xxx2
Add pulse width modulator (PWM) for it8xxx2.

Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
2021-07-01 13:21:06 -04:00
Tim Lin
ef3c8507a6 ite: drivers/flash: add flash driver for it8xxx2
Add flash driver for it8xxx2. The driver can implement
flash read, write and erase that will be mapped to the
ram section for executing.

TEST="flash write 0x80000 0x10 0x20 0x30 0x40 ..."
     "flash read 0x80000 0x100"
     "flash erase 0x80000 0x1000"

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-06-22 15:15:20 -04:00
Rajnesh Kanwal
1c584127ba boards: risc-v: add BeagleV Starlight JH7100 board support
Adding support for beagleV Starlight board based on Starfive JH7100
SoC. It's a base support, no drivers other than uart has been tested.

Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal49@gmail.com>
2021-06-22 08:45:00 -04:00
Ruibin Chang
d45668480a ITE driver/watchdog: add watchdog timer for it8xxx2
Add watchdog timer for it8xxx2.

Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
2021-06-18 11:21:53 +02:00
Tim Lin
8ea58d4389 ite: drivers/adc: create pinmux phandle to the ADC driver node
Create the pinmux phandle to the ADC driver node in the
devicetree. When the pinmux_pin_set function in
adc_it8xxx2_channel_setup can refer to the setting of
this phandle. It is more flexible to use.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-06-11 15:47:25 +02:00
Robert Szczepanski
ba56d751c0 drivers: gpio_litex: add support for changing IRQ type
LiteX GPIOIn module provides possibility to change IRQ mode
and edge via CSRs. This commit adds support for that feature.

Signed-off-by: Robert Szczepanski <rszczepanski@internships.antmicro.com>
2021-06-04 16:24:52 -05:00
Robert Szczepanski
639e1d1b36 drivers: gpio_litex: add support for disabling IRQs and update devicetree
This adds missing option to disable IRQs.
Devicetree is modified to match previous commit with custom IRQ CSR
addresses.

Signed-off-by: Robert Szczepanski <rszczepanski@internships.antmicro.com>
2021-06-04 16:24:52 -05:00
Robert Szczepanski
cf385b0a15 drivers: gpio_litex: add support for litex_vexriscv GPIO interrupts
This commit adds support for GPIO interrupts in GPIO driver for Litex
SoC Builder.

Signed-off-by: Robert Szczepanski <rszczepanski@internships.antmicro.com>
2021-06-04 16:24:52 -05:00
Ruibin Chang
8482b9a1a8 ITE dts/riscv/it8xxx2.dtsi: add ecpm node for it8xxx2
Add EC clock and power management (ecpm) node for it8xxx2.

Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
2021-06-04 16:16:57 -05:00
Tim Lin
f66cb34b13 dts: riscv: it8xxx2: fix default status of UART
The default status of UART should set disabled.
If UART needs to enable, it will be set in the
dts of board level.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-05-12 13:01:56 -05:00
Tim Lin
caa3328cc7 ite: drivers/pinmux: modify pinmux driver
Modify the pinmux control method and add support the fun3
& fun4 alternation function.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-05-05 08:45:16 -04:00
Dino Li
ee39291553 dts: it8xxx2: change flash size to 1M byte
Flash size of IT8xxx2 is 1M byte.

Change-Id: Ic1464b6e36f16291f14024a6fb49acbf3a243176
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2021-04-29 16:47:47 -05:00
Dino Li
0ab51ff657 drivers: gpio: ite_it8xxx2: enable more gpio groups
This change enables A, C, D, E, G, H, I, J, K, and L groups,
and fix gpio interrupt function.

This change also pull (and rename) dt-bindings/irq.h to
dt-bindings/interrupt-controller/ite-intc.h, because it is
chip-specific.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: Ifee039981c2cc4cf5980e663702a9921e629fc1e
2021-04-23 06:31:56 -04:00
Tim Lin
cd96046bee ite: drivers/adc: add adc drivers on it8xxx2_evb platform
This commit is about the it8xxx2 analog to digital converter
driver. Support 8 channels ch0~ch7 and 10-bit resolution.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-04-13 13:01:56 -04:00
Kumar Gala
c54005235c riscv: ite: it8xxx2: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-16 09:45:57 -05:00
Kumar Gala
f6b7dd09ec pinmux: sifive: Convert SiFive pinmux to be devicetree based
Add a simple pinctrl node for the IOF registers under the GPIO
controller node to be used by the pinmux driver.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-15 08:33:00 -05:00
Kumar Gala
d6b4995d6a riscv: rv32m1: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-15 08:32:41 -05:00
Kumar Gala
f44a6c6f85 dts: Cleanup litex,clk binding
Rework the litex,clk to use the clock-controller.yaml and remove
address-cells/size-cells as they aren't needed for the binding.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-03 13:41:47 -05:00
Martin Åberg
152d3e46ad soc/riscv: add the QEMU "RISC-V VirtIO board"
The QEMU RISC-V VirtIO board is capable:
- 8 x CPU
- 256 MiB RAM
- PMP
- PCI
- ISA string: RVnnIMAFDCSU
  - mul/div
  - FPU with double precision
  - MMU
  - Compressed instructions

Devicetree was extracted from QEMU as described in virt.dtsi.
The same .dtsi SOC description is used for 32-bit and 64-bit.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2021-01-15 13:06:33 -05:00
Tim Lin
981166eb8e drivers/i2c: add i2c driver on it8xxx2 platform
This commit is about the it8xxx2 i2c master driver which
includes six SMBus channels. The enhanced channel i2c3,
i2c4, i2c5 are controller which are designed to support
the I2C protocol.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-01-15 11:22:57 -05:00
Katsuhiro Suzuki
bbc563f5ac boards/dts: riscv: add SiFive FE310 watchdog driver bindings
This patch adds watchdog driver bindings and enable it for SiFive
HiFive1 rev.B board.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-01-15 07:19:38 -06:00
Katsuhiro Suzuki
32f23059a2 dts: bindings: add IRQ priority support for SiFive PLIC
This patch adds IRQ priority support for SiFive PLIC by device-tree.
Some IRQ sources of plic use Kconfig to set priority of their IRQ.

- AON: no driver
- I2C, SPI, PWM: not use IRQ
- GPIO, UART: default 1

So this patch specifies IRQ priority 1 for all sources.

Currently these drivers (gpio and uart) do not support that they get
and use IRQ priority from device-tree. We need more patches.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-01-14 12:43:58 -06:00
Cheryl Su
f060540b33 dts: it8xxx2 device tree and binding
This commit is about it8xxx2 platform device tree.
Add driver's binding files, and one device tree as sample.

Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw>
2020-12-16 08:47:36 -05:00
Pawel Czarnecki
98fd9d0975 boards/dts: riscv: litex_vexriscv: add clock control driver to devicetree
This extends litex_vexriscv.dts file by adding clock controller nodes.

Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-12-06 12:35:16 -05:00
Pawel Czarnecki
3c054dfd54 dts: riscv: litex_vexriscv: update copyrights
This updates Antmicro copyright header.

Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-12-06 12:35:16 -05:00
Katsuhiro Suzuki
0a6918d064 dts: riscv32-fe310: add missing clint properties
RISC-V clint is an interrupt controller but it has no required
properties (#interrupt-cells and interrupt-controller).
This patch just adds missing properties.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2020-11-19 12:45:14 -05:00
Maureen Helm
2d9b89e44f dts: riscv: Remove peripheral aliases from OpenISA RV32M1 SoC
Removes peripheral aliases from the OpenISA RV32M1 SoC, which are no
longer being used after converting their associated drivers to use
DT_INST macros.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-11-17 11:31:47 -06:00
Pawel Sagan
cc30fb871b drivers: i2s: Add LiteX I2S controller driver
This introduces LiteX I2S driver supporting the following features:
    - 8,16,24,32 bit sample width,
    - mono/stereo sound,
    - different sample frequencies
    - big/little-endian data format,
    - concatenated channels mode (for selected sample widths only),
    - slave/master mode operation.

Signed-off-by: Pawel Sagan <psagan@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-08-26 08:17:42 -04:00
Pawel Sagan
137d1d78b1 dts: riscv: Fix a label in litex-vexriscv DTS
This commit fixes a wrong "serial@e0002800" label
in riscv32-litex-vexriscv.dtsi.

Signed-off-by: Pawel Sagan <psagan@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-08-12 16:40:07 -05:00
Kumar Gala
7a15afc1d4 drivers: flash: replace DT_FLASH_DEV_NAME with DT macro
Replace DT_FLASH_DEV_NAME with DT_CHOSEN_ZEPHYR_FLASH_CONTROLLER_LABEL.
We now set zephyr,flash-controller in the chosen node of the device
tree to the flash controller device.

NOTE: For a SoCs with on die flash, this points to the controller and
      not the 'soc-nv-flash' node.  Typically the controller is the
      parent of the 'soc-nv-flash' node).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-27 18:43:20 -05:00
Kumar Gala
43a7d26603 drivers: entropy: replace CONFIG_ENTROPY_NAME with DT macro
Replace CONFIG_ENTROPY_NAME with DT_CHOSEN_ZEPHYR_ENTROPY_LABEL.  We now
set zephyr,entropy in the chosen node of the device tree to the entropy
device.

This allows us to remove CONFIG_ENTROPY_NAME from dts_fixup.h.  Also
remove any other stale ENTROPY related defines in dts_fixup.h files.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-13 09:14:21 -05:00
Kumar Gala
2880a0ef7b dts: openisa: rv32ma: Update openisa,rv32m1-gpio binding for ports
Add a property to the openisa,rv32m1-gpio binding that relates the GPIO
node to the pinmux PORT node.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-10 14:38:04 -05:00
Kumar Gala
8f0018663f drivers: pinmux: rv32m1: Convert driver to new DT_INST macros
Convert driver to use DT_INST macros and remove related board per
instance Kconfig symbol usage.

Updated the openisa,rv32m1_vega-pinmux binding to require the label
property and updated the rv32m1.dtsi to add label properties for the
pinmux nodes.

Also update gpio_basic_api test to use DT_NODELABEL.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-10 14:38:04 -05:00
Kumar Gala
b263a3379c soc: riscv: openisa_rv32m1: Convert from Kconfig to DT_NODELABEL
As prep for drivers being converted to utilize DT_INST and removal of
per instance Kconfig symbols, move soc.c code to utilize DT_NODELABEL
instead.

Also rename various node labels to match the SoC docs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-10 14:38:04 -05:00
Kumar Gala
0be9d2b18d drivers: entropy: rv32m1_trng: Add DTS support to rv32m1_trng driver
Add a YAML, DTS node and driver support to utilize data from devicetree
for register address and driver name.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-02 09:30:58 +02:00
Peter A. Bigot
7c15bae470 dts: riscv32-fe310: cleanup and correct plic register space
Use zero-padded 32-bit hex constants for the start address and
length so the fields are easier to compare.  Correct the span of
the priority/claim region.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-03-26 11:11:02 -05:00
Robert Winkler
94b8832585 boards: litex_vexriscv: Enable LiteX GPIO driver
Enable LiteX GPIO driver in litex_vexriscv board.

Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
2020-02-05 12:00:36 +01:00
Henrik Brix Andersen
575c211f97 dts: riscv: rv32m1: add timer/pwm modules
Add device tree nodes for the Timer/PWM (TPM) modules present in the
OpenISA RV32M1 SoC.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-13 09:12:34 -06:00
Robert Winkler
0b6c18bd64 boards: litex_vexriscv: Enable LiteX PWM driver
This commit enables LiteX PWM driver for litex_vexriscv board.

Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-01-08 11:04:36 +01:00
Robert Winkler
34fedd6cc9 boards: litex_vexriscv: Enable LiteX I2C driver
This commit enables LiteX I2C driver for litex_vexriscv board.

Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-01-07 20:55:43 +01:00