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drivers: entropy: esp32: enable rng driver

Browse source 
for esp32c3 allowing wifi subsystem to use inside
its driver.

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
This commit is contained in:
Felipe Neves 2021-08-10 12:55:34 -03:00 • committed by Christopher Friedt
commit d4ed7f69d4
6 changed files with 34 additions and 8 deletions
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5
boards/riscv/esp32c3_devkitm/Kconfig.defconfig
View file

@ -7,6 +7,9 @@ config BOARD
default "esp32c3"
depends on BOARD_ESP32C3_DEVKITM
config ENTROPY_ESP32_RNG
default y if ENTROPY_GENERATOR
if BT
config HEAP_MEM_POOL_SIZE
@ -16,4 +19,4 @@ choice BT_HCI_BUS_TYPE
default BT_ESP32
endchoice
endif # BT
endif # BT

4
boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts
View file

@ -23,3 +23,7 @@
status = "okay";
current-speed = <115200>;
};
&trng0 {
status = "okay";
};

2
drivers/entropy/Kconfig.esp32
View file

@ -5,7 +5,7 @@
config ENTROPY_ESP32_RNG
bool "ESP32 entropy number generator driver"
depends on SOC_ESP32
depends on SOC_ESP32 || SOC_ESP32C3
select ENTROPY_HAS_DRIVER
default y
help

15
drivers/entropy/entropy_esp32.c
View file

@ -7,18 +7,20 @@
#define DT_DRV_COMPAT espressif_esp32_trng
#include <string.h>
#include <drivers/entropy.h>
#include <soc/dport_reg.h>
#include <hal/cpu_hal.h>
#include <esp_clk.h>
#include <soc/rtc.h>
#include <soc/wdev_reg.h>
#include <soc/rtc_cntl_reg.h>
#include <soc/apb_ctrl_reg.h>
#include <esp_system.h>
#include <soc.h>
#include <xtensa/core-macros.h>
#include <drivers/entropy.h>
extern int esp_clk_cpu_freq(void);
extern int esp_clk_apb_freq(void);
#ifdef CONFIG_SOC_ESP32
#include <xtensa/core-macros.h>
#include <soc/dport_reg.h>
#endif
static inline uint32_t entropy_esp32_get_u32(void)
{
@ -37,9 +39,10 @@ static inline uint32_t entropy_esp32_get_u32(void)
uint32_t ccount;
do {
ccount = XTHAL_GET_CCOUNT();
ccount = cpu_hal_get_cycle_count();
} while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16);
last_ccount = ccount;
return REG_READ(WDEV_RND_REG);
}

10
dts/riscv/espressif/esp32c3.dtsi
View file

@ -8,6 +8,9 @@
/ {
#address-cells = <1>;
#size-cells = <1>;
chosen {
zephyr,entropy = &trng0;
};
cpus {
#address-cells = <1>;
@ -37,6 +40,13 @@
label = "UART_0";
status = "disabled";
};
trng0: trng@3ff700b0 {
compatible = "espressif,esp32-trng";
reg = <0x3FF700B0 0x4>;
label = "TRNG_0";
status = "disabled";
};
};
};

6
soc/riscv/esp32c3/linker.ld
View file

@ -130,6 +130,12 @@ SECTIONS
*libzephyr.a:log_backend_uart.*(.literal .text .literal.* .text.*)
*liblib__libc__minimal.a:string.*(.literal .text .literal.* .text.*)
*libgcov.a:(.literal .text .literal.* .text.*)
*libnet80211.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.*)
*libpp.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.*)
*libnet80211.a:( .wifirxiram .wifirxiram.* .wifislprxiram .wifislprxiram.*)
*libpp.a:( .wifirxiram .wifirxiram.* .wifislprxiram .wifislprxiram.*)
. = ALIGN(4);
_init_end = ABSOLUTE(.);
_iram_text_end = ABSOLUTE(.); *(.srodata)