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drivers: serial: added minimal uart driver for esp32c3

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based on uart rom functions, also enable console driver
on top if this driver enabling logging

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
This commit is contained in:
Felipe Neves 2021-07-02 21:16:08 -03:00 • committed by Maureen Helm
commit d368087fc0
10 changed files with 136 additions and 1 deletions
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1
CODEOWNERS
View file

@ -312,6 +312,7 @@
/drivers/serial/*rcar* @aaillet
/drivers/serial/Kconfig.test @str4t0m
/drivers/serial/serial_test.c @str4t0m
/drivers/serial/*esp32c3* @uLipe
/drivers/disk/ @jfischer-no
/drivers/disk/sdmmc_sdhc.h @JunYangNXP
/drivers/disk/sdmmc_spi.c @JunYangNXP

7
boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts
View file

@ -14,5 +14,12 @@
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
};
};
&uart0 {
status = "okay";
current-speed = <115200>;
};

3
boards/riscv/esp32c3_devkitm/esp32c3_devkitm_defconfig
View file

@ -6,4 +6,7 @@ CONFIG_MAIN_STACK_SIZE=2048
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=1000000
CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_ROM_ESP32C3=y
CONFIG_XIP=n

1
drivers/serial/CMakeLists.txt
View file

@ -8,6 +8,7 @@ zephyr_library_sources_ifdef(CONFIG_UART_CC13XX_CC26XX uart_cc13xx_cc26xx.c)
zephyr_library_sources_ifdef(CONFIG_UART_CC32XX uart_cc32xx.c)
zephyr_library_sources_ifdef(CONFIG_UART_CMSDK_APB uart_cmsdk_apb.c)
zephyr_library_sources_ifdef(CONFIG_UART_ESP32 uart_esp32.c)
zephyr_library_sources_ifdef(CONFIG_UART_ROM_ESP32C3 uart_rom_esp32c3.c)
zephyr_library_sources_ifdef(CONFIG_UART_SIFIVE uart_sifive.c)
zephyr_library_sources_ifdef(CONFIG_UART_GECKO uart_gecko.c)
zephyr_library_sources_ifdef(CONFIG_LEUART_GECKO leuart_gecko.c)

2
drivers/serial/Kconfig
View file

@ -121,6 +121,8 @@ source "drivers/serial/Kconfig.sifive"
source "drivers/serial/Kconfig.esp32"
source "drivers/serial/Kconfig.esp32c3_rom"
source "drivers/serial/Kconfig.gecko"
source "drivers/serial/Kconfig.leuart_gecko"

10
drivers/serial/Kconfig.esp32c3_rom Normal file
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@ -0,0 +1,10 @@
# Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0
config UART_ROM_ESP32C3
bool "ESP32C3 ROM UART driver"
default y
select SERIAL_HAS_DRIVER
depends on SOC_ESP32C3
help
Enable the ESP32C3 UART using ROM routines.

59
drivers/serial/uart_rom_esp32c3.c Normal file
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@ -0,0 +1,59 @@
/*
* Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT espressif_esp32c3_uart
/* Include esp-idf headers first to avoid redefining BIT() macro */
#include <device.h>
#include <soc.h>
#include <drivers/uart.h>
#include <drivers/clock_control.h>
#include <errno.h>
#include <sys/util.h>
#include <esp_attr.h>
static int uart_rom_esp32c3_poll_in(const struct device *dev, unsigned char *p_char)
{
ARG_UNUSED(dev);
return (int)esp_rom_uart_rx_one_char(p_char);
}
static IRAM_ATTR void uart_rom_esp32c3_poll_out(const struct device *dev,
unsigned char c)
{
ARG_UNUSED(dev);
esp_rom_uart_tx_one_char(c);
}
static int uart_rom_esp32c3_poll_err_check(const struct device *dev)
{
ARG_UNUSED(dev);
return 0;
}
static int uart_rom_esp32c3_init(const struct device *dev)
{
ARG_UNUSED(dev);
return 0;
}
static const DRAM_ATTR struct uart_driver_api uart_rom_esp32c3_api = {
.poll_in = uart_rom_esp32c3_poll_in,
.poll_out = uart_rom_esp32c3_poll_out,
.err_check = uart_rom_esp32c3_poll_err_check,
};
#define ESP32C3_ROM_UART_INIT(idx) \
DEVICE_DT_DEFINE(DT_NODELABEL(uart##idx), \
&uart_rom_esp32c3_init, \
NULL, \
NULL, \
NULL, \
PRE_KERNEL_1, \
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
&uart_rom_esp32c3_api); \
DT_INST_FOREACH_STATUS_OKAY(ESP32C3_ROM_UART_INIT)

32
dts/bindings/serial/espressif,esp32c3-uart.yaml Normal file
View file

@ -0,0 +1,32 @@
description: ESP32 UART
compatible: "espressif,esp32c3-uart"
include: uart-controller.yaml
properties:
reg:
required: true
interrupts:
required: false
tx-pin:
type: int
description: TX pin
required: false
rx-pin:
type: int
description: RX pin
required: false
rts-pin:
type: int
description: RTS pin
required: false
cts-pin:
type: int
description: CTS pin
required: false

7
dts/riscv/espressif/esp32c3.dtsi
View file

@ -27,6 +27,13 @@
compatible = "mmio-sram";
reg = <0x3fc7c000 0x50000>;
};
uart0: uart@60000000 {
compatible = "espressif,esp32c3-uart";
reg = <0x60000000 0x400>;
label = "UART_0";
status = "disabled";
};
};
};

15
soc/riscv/esp32c3/linker.ld
View file

@ -167,7 +167,7 @@ SECTIONS
*libzephyr.a:log_core.*(.rodata .rodata.*)
*libzephyr.a:log_backend_uart.*(.rodata .rodata.*)
*libzephyr.a:log_output.*(.rodata .rodata.*)
. = ALIGN(4);
. = ALIGN(4);
__esp_log_const_start = .;
KEEP(*(SORT(.log_const_*)));
__esp_log_const_end = .;
@ -236,6 +236,10 @@ SECTIONS
.flash.rodata : ALIGN(0x10)
{
_rodata_start = ABSOLUTE(.);
_image_rodata_start = .;
__esp_shell_root_cmds_start = .;
KEEP(*(SORT(.shell_root_cmd_*)));
__esp_shell_root_cmds_end = .;
*(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */
*(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
@ -283,6 +287,7 @@ SECTIONS
soc_reserved_memory_region_start = ABSOLUTE(.);
KEEP (*(.reserved_memory_address))
soc_reserved_memory_region_end = ABSOLUTE(.);
_image_rodata_end = .;
_rodata_end = ABSOLUTE(.);
/* Literals are also RO data. */
_lit4_start = ABSOLUTE(.);
@ -307,6 +312,14 @@ SECTIONS
#include <linker/common-rom.ld>
/* Restore original value for symbols referenced by `common-rom.ld` */
__log_const_start = __esp_log_const_start;
__log_const_end = __esp_log_const_end;
__log_backends_start = __esp_log_backends_start;
__log_backends_end = __esp_log_backends_end;
__shell_root_cmds_start = __esp_shell_root_cmds_start;
__shell_root_cmds_end = __esp_shell_root_cmds_end;
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif