Commit graph

270 commits

Author SHA1 Message Date
Daniel Leung
c7ed7e492b xtensa: intel_s1000: enable thread local storage
Adds the bits to enable thread local storage for
intel_s1000 SoC.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Andy Ross
e5f0571cbc soc/intel_adsp: Remove "firmware ready" message sending
This IPC protocol is designed to tell the host driver that the audio
firmware is ready.  It's not used within the Zephyr in-tree test code,
which does not run under the control of a host driver.  And SOF
already does this on its own, the Zephyr attempt to do it first (and
incorrectly) confuses the driver IPC.

Just remove it.  This is clearly application code, not platform code.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-23 12:53:53 -04:00
Anas Nashif
388a465d9d soc: intel_adsp: remove stray soc directory
This is now covered by intel_adsp.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-23 12:56:03 +02:00
Andy Ross
e6dfae0fea soc/intel_adsp: Fix linker warning
The linker will emit a warning condition when a section with a
declared alignment doesn't naturally start on that alignment (which
begets the question of why the declared alignment syntax exists at
all...).

Do the alignment for .bss between the sections instead as a simple
workaround.

Note that this alignment isn't architecturally required, as current
Zephyr targets don't use the page-aligned pseudo-MMU on this hardware;
the only requirement is alignment to the 64 byte cache stride.  It
should work to pack .bss tightly.  But when I try that, I get an error
from the rimage tool, which is apparently unprepared for
non-4k-aligned sections?

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-21 06:38:53 -04:00
Anas Nashif
483b4ff030 cmake: work around sdk toolchain configuration for xtensa [REVERTME]
until we have this change in the SDK where we should not depend on
SOC_NAME but a new identifier.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-21 06:38:53 -04:00
Anas Nashif
cba2f136cc intel_adsp: make idc variable depend on CONFIG_IPM_CAVS_IDC
Avoid build warnings by guarding variable with an if.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-21 06:38:53 -04:00
Anas Nashif
411bddf25a soc: xtensa: fix definition of PLATFORM_CORE_COUNT
Move statement to a multiline statement and avoid build errors.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-21 06:38:53 -04:00
Andy Ross
a8d5437799 soc/xtensa: Misc. checkpatch fixups
Code style fixes.  Kept separate from the original changes to permit
easier rebasing.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-21 06:38:53 -04:00
Andy Ross
ad4116cafb soc: intel_s1000: Catch up with API skew
The header scheme for the IPM_CAVS_IDC driver changed and this legacy
platform (which is really a very close cousin of intel_adsp/cavs_v15)
broke.  Fix things up.  Longer term we should unify the two.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-21 06:38:53 -04:00
Andy Ross
2d494ddfc0 soc/intel_adsp: Make SMP default on cavs_v15
This is working well enough that it ought to be the default now.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-21 06:38:53 -04:00
Andy Ross
a3848cb861 soc/xtensa/intel_adsp: Add arch_printk_char_out hook
Add a printk default hook that works in very early boot and doesn't
depend on the logging subsystem (which can still be used if desired,
of course).  It speaks the same protocol, is somewhat smaller (MUCH
smaller if the app doesn't otherwise need the logging and ring buffer
dependencies), and more efficiently uses the output slot space by
doing line buffering and flushing only when needed.

Most importantly this one is MP-safe via both locking and cache
coherence management, and can work reliably when SMP is enabled.
(Note that "reliable" means that all output appears without corruption
-- simulateous logging by two CPUs can still interleave bytes, of
course).

Longer term, if we keep this protocol it would be good to unify the
two backends to reduce duplicated code.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-21 06:38:53 -04:00
Andy Ross
0e83961b21 arch/xtensa: soc/xtensa/intel_adsp: Enable KERNEL_COHERENCE
Implement the kernel "coherence" API on top of the linker
cached/uncached mapping work.

Add Xtensa handling for the stack coherence API.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-21 06:38:53 -04:00
Andy Ross
15e2117a0b soc/xtensa/intel_adsp: Add support for L1-cache-aware linkage
Xtensa CPUs have incoherent L1 caches, which is deeply inconvenient
for SMP systems.  But as a treatment for this, the ADSP memory map
contains the RAM twice, in separate 512MB regions that can be managed
separately by the Xtensa TLB/cacheattr mechanism.  The low mapping is
set to bypass the cache where the high mapping is cached.

Set up linkage to use both as appropriate, then reassemble the final
sections to a contiguous region.  Read-only areas (.text, .rodata) are
cached.  Data sections are uncached by default, except for a special
".cache" section that may be used by higher level code to flag static
areas (e.g. stacks) which don't store multiprocessor-shared content.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-21 06:38:53 -04:00
Andy Ross
544a38ee62 soc/xtensa/intel_adsp: Upstream updates
Significant rework of the Intel Audio DSP SoC/board layers.  Includes
code from the following upstream commits:

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Thu Jun 25 16:34:36 2020 +0100

    xtesna: adsp: use 50k ticks per sec for audio

    Audio needs high resolution scheduling so schedule to nearest 20uS.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 24 13:59:01 2020 -0700

    soc/xtensa/intel_adsp: Remove sof-config.h includes

    This header isn't used any more, and in any case shouldn't be included
    by SoC-layer Zephyr headers that need to be able to build without SOF.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Sat Jun 20 15:42:58 2020 -0700

    soc/intel_adsp: Leave interrupts disabled at MP startup

    This had some code that was pasted in from esp32 that was inexplicably
    enabling interrupts when starting an auxiliary CPU.  The original
    intent was that the resulting key would be passed down to the OS, but
    that's a legacy SMP mechanism and unused.  What it actually did was
    SET the resulting value in PS.INTLEVEL, enabling interrupts globally
    before the CPU is ready to handle them.

    Just remove.  The system doesn't need to enable interrupts until the
    entrance to the first user thread on this CPU, which will do it
    automatically as part of the context switch.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 13:57:54 2020 +0300

    dts: intel_cavs: Add required label

    Add required label fixing build for CAVS15, 20, 25.
    Fixes following errors:
    ...
    devicetree error: 'label' is marked as required in 'properties:' in
    bindings/interrupt-controller/intel,cavs-intc.yaml,
    but does not appear in
    ...

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 15:19:56 2020 +0300

    soc: cavs_v18: Remove dts_fixup and fix build

    Remove unused now dts_fixup.h and fix build with the recent code base.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 15:12:25 2020 +0300

    soc: cavs_v20: Remove dts_fixup and fix build

    Remove unused now dts_fixup.h and fix build with the recent code base.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 14:59:23 2020 +0300

    soc: cavs_v25: Remove dts_fixup fix build

    Remove unused now dts_fixup and fix build with the latest code base.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 12 12:29:06 2020 +0300

    soc: intel_adsp: Remove unused functions

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 17:53:58 2020 +0300

    soc: intel_adsp: Clean up soc.h

    Remove unused or duplicated definitions.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 17:02:23 2020 +0300

    soc: intel_adsp: De-duplicate soc.h

    Move soc.h to common SOC area.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 15:54:19 2020 +0300

    soc: intel_adsp: Remove duplicated io.h

    Move duplicated io.h to common SOC area.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 12 12:39:46 2020 +0300

    cmake: Correct SOC_SERIES name for byt and bdw

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 12 12:39:02 2020 +0300

    soc: intel_adsp: Build bootloader only for specific SOCs

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Thu Jun 11 13:46:25 2020 +0100

    boards: xtensa: adsp: add byt and bdw boards WIP

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 10 10:01:29 2020 -0700

    soc/intel_adsp: Make the HDA timer the default always

    The CAVS_TIMER was originally written because the CCOUNT values are
    skewed between SMP CPUs, so it's the default when SMP=y.  But really
    it should be the default always, the 19.2 MHz timer is plenty fast
    enough to be the Zephyr cycle timer, and it's rate is synchronized
    across the whole system (including the host CPU), making it a better
    choice for timing-sensitive applications.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 15:21:43 2020 +0300

    soc: cavs_v25: Enable general samples build

    Enables general samples build for SOC cavs_v25.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 15:13:53 2020 +0300

    soc: cavs_v20: Enable general samples build

    Enable general sample build.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 14:35:13 2020 +0300

    soc: cavs_v18: Fix build general samples

    Fix building general samples for CAVS18.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 14:22:40 2020 +0300

    soc: intel_adsp: Add support for other SOCs

    Support other SOCs in the "ready" message to the Host.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 13:25:39 2020 +0300

    soc: intel_adsp: Move adsp.c to common SOC area

    Move adsp.c to common and clean makefiles.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 17:18:18 2020 +0300

    boards: intel_adsp: Remove dependency on SOF

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 9 14:29:44 2020 +0100

    soc: xtensa: cavs: build now good for cavs20 + 25

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 15:57:01 2020 +0300

    soc: cavs_v15: Fix build for hello_world

    Fix build for other then audio/sof targets.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 14:50:12 2020 +0300

    sample: audio/sof: Remove old overlays

    Removing old overlays used to switch logging backend.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon Jun 8 15:02:01 2020 +0300

    soc: intel_adsp: Correct TEXT area

    Correct HEADER_SPACE and put TEXT to:
    (HP_SRAM_WIN0_BASE +  HP_SRAM_WIN0_SIZE + VECTOR_TBL_SIZE)

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 14:44:47 2020 +0300

    soc: intel_adsp: Trivial syntax cleanup

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 14:41:07 2020 +0300

    soc: intel_adsp: Fix bootloader script path

    Make it possible to find linker script if build is done not inside
    ZEPHYR_BASE.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 9 12:10:17 2020 +0100

    soc: xtensa: cavs20/25: fix build with new headers - WIP

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 13:35:38 2020 +0300

    soc: intel_adsp: Fix include headers

    Fixes include headers

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 9 10:38:50 2020 +0100

    soc: xtensa: cav18: updated headers- WIP

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Fri May 1 15:29:26 2020 -0700

    soc/xtensa/intel_adsp: Clean up MP config logic

    CONFIG_MP_NUM_CPUS is a platform value, indicating the number of CPUs
    for which the Zephyr image is built.  This is the value kernel and
    device code should use to predicate questions like "is there more than
    one CPU?"

    CONFIG_SMP is an application tunable, controlling whether or not the
    kernel schedules threads on CPUs other than the first one.  This is
    orthogonal to MP_NUM_CPUS: it's possible to build a "SMP" kernel on a
    uniprocessor system or have a UP kernel on a MP system if the other
    cores are used for non-thread application code.

    CONFIG_SCHED_IPI_SUPPORTED is a platform flag telling an SMP kernel
    whether or not it can synchronously signal other CPUs of scheduler
    state changes.  It should be inspected only inside the scheduler (or
    other code that uses the API).  This should be selected in kconfig by
    soc layer code, or by a driver that implements the feature.

    CONFIG_IPM_CAVS_IDC is a driver required to implement IPI on this
    platform.  This is what we should use as a predicate if we have
    dependence on the IPM driver for a platform feature.

    These were all being sort of borged together in code.  Split them up
    correctly, allowing the platform MP layer to be unit tested in the
    absence of SMP (c.f. tests/kernel/mp), and SMP kernels with only one
    CPU (which is pathlogical in practice, but also a very good unit test)
    to be built.

    Also removes some dead linker code for SMP-related sections that don't
    exist in Zephyr.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Jun 8 16:41:55 2020 +0100

    soc: xtensa: bootloader - use linker script

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Jun 8 16:26:18 2020 +0100

    soc: xtensa: further fix headers - WIP

    Simplify the directory structure, WIP for cavs20 and cavs25

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon Jun 8 12:59:30 2020 +0300

    soc: cavs_v15: Remove unneeded include

    Remove include fixing build.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun Jun 7 12:37:35 2020 +0100

    soc:xtensa: adsp: remove sof specific code from soc headers

    TODO: v1.8+

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Marc Herbert <marc.herbert@intel.com>
 Date:   Thu Jun 4 23:19:37 2020 -0700

    intel_adsp_*/doc: fix duplicate .rst labels

    Quick fix purely to make the build green again.

    Signed-off-by: Marc Herbert <marc.herbert@intel.com>

 Author: Marc Herbert <marc.herbert@intel.com>
 Date:   Thu Jun 4 22:34:40 2020 -0700

    samples/audio/sof: use OVERLAY_CONFIG to import apollolake_defconfig

    This reverts commit 21f16b5b1d29fca83d1b62b1b75683b5a1bc2935 that
    copied it here instead.

    Signed-off-by: Marc Herbert <marc.herbert@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 5 12:34:48 2020 +0300

    soc: intel_adsp: Move soc_mp to common

    Moving soc_mp to common SOC area, it still needs fixes for taking
    number of cores from Zephyr Kconfig, etc.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 16:05:06 2020 +0300

    soc: intel_adsp: Move memory.h from lib/

    For those files from SOF referencing platform/lib/memory.h we have
    include.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 15:20:09 2020 +0300

    soc: intel_adsp: Rename platform.h to soc.h

    Rename to prevent including it from SOF.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 11:47:55 2020 +0300

    soc: intel_adsp: Move headers

    Move headers to more convenient place

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 11:21:51 2020 +0300

    soc: intel_adsp: More SOC cleaning

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Marc Herbert <marc.herbert@intel.com>
 Date:   Mon Jun 1 15:31:34 2020 -0700

    samples/audio/sof: import sof/src/arch/xtensa/  apollolake_defconfig

    Import modules/audio/sof/src/arch/xtensa/configs/apollolake_defconfig
    into prj.conf and new boards/up_squared_adsp.conf

    Signed-off-by: Marc Herbert <marc.herbert@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 15:07:40 2020 +0100

    soc:xtensa: adsp: let SOF configure the DSP for audio

    Let SOF do this for the moment.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 15:06:20 2020 +0100

    soc: xtensa: cavs: remove headers similar to cavs15

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 3 15:58:38 2020 +0300

    soc: intel_adsp: Move ipc header to common

    Remove duplicated headers from CAVS to common SOC part

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 3 13:02:09 2020 +0300

    soc: cavs_v15: Remove unneeded headers

    Remove also from CAVS15.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 18:34:11 2020 +0300

    Remove more headers

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 14:12:09 2020 +0100

    soc: xtensa: remove cavs sod headers for drivers and trace.

    Duplicate cavs15 headers.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 14:05:12 2020 +0100

    samples: move sof dai, dma and clk configs to SOF

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 17:38:45 2020 +0300

    soc: intel_adsp: Remove more duplicated headers

    Remove more headers

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 2 15:50:03 2020 +0100

    samples: sof: remove pm realted files.

    Use the SOF versions.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 16:55:40 2020 +0300

    WIP: Strip lib from include path

    WIP, pushed for sync

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 14:44:33 2020 +0300

    soc: intel_adsp: Remove more headers

    Remove even more common headers

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 14:00:47 2020 +0300

    soc: intel_adsp: Remove SOF headers

    The headers would be used by audio/sof app directly from SOF module.

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Sat May 30 11:01:26 2020 -0700

    soc/intel_adsp: Alternative log reading script

    This script speaks the same protocol and works with the same firmware,
    but:

    * Is a single file with no dependencies outside the python3 standard
      library and can be run out-of-tree (i.e. with setups where the
      firmware is not built on the device under test)

    * Operates in "tail" mode, where it will continue polling for more
      output, making it easier to watch a running process and acting more
      like a conventional console device.

    * Has no dependence on the diag_driver kernel module (it reads the DSP
      SRAM memory directly from the BAR mapping in the PCI device)

    * Is MUCH smaller than the existing tool.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu May 28 16:17:51 2020 +0300

    Decrease HEP pool size to 192000

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:27:00 2020 +0100

    soc: xtensa: cavs25: complete support for cavs25

    Builds, not tested on qmeu due to missing SOF ROM (TODO)

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:24:26 2020 +0100

    soc: xtensa: cavs20: complete cavs20 support

    Now boots on qemu.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:22:13 2020 +0100

    soc: xtensa: cavs18: complete boot support

    Now boots on qemu.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:19:23 2020 +0100

    soc: xtensa: cavs15: use cavs15 instead of apl as linker soc name

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:16:06 2020 +0100

    TODO: samples: sof: work  around missing trace symbols.

    Disable local trace.
    Needs trace updates finished before this can be removed.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:57:19 2020 +0100

    dts: xtensa: rename apl to cavs15 DTS

    This DTS is used by more than APL SOC. i.e. all CAVS15 SOCs

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:52:20 2020 +0100

    west: commands: sign: Add signing support for other CAVS targets

    Sign for CAVS15, CAVS18, CAVS20 and CAVS25 SOCs

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:50:07 2020 +0100

    boards: xtensa: cavs: used Zephyr mask macro

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:49:46 2020 +0100

    soc: xtensa: move code to SOF

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue May 26 11:40:36 2020 +0100

    soc: xtensa: use SOF versions of clk

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 18:38:45 2020 +0300

    soc: intel_adsp: Send FW ready for non SOF configuration

    Configure windows and send FW ready when used without SOF, should be
    loaded with fw_loader script.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 18:02:22 2020 +0300

    soc: intel_adsp: Use SOF version of the file

    Use exact copy from SOF module.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:47:27 2020 +0300

    soc: intel_adsp: Clean up include headers

    Remove SOF mentions from the SOC headers.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:43:05 2020 +0300

    soc: intel_adsp: Move SOF specific code to samples/audio/sof

    Move SOF specific code to the SOF sample.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:39:42 2020 +0300

    soc: intel_adsp: Use SOF module's version of mem_window.c

    Use exact copy from SOF module.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:36:41 2020 +0300

    soc: intel_adsp: Use exact copy from SOF module

    Use SOF module verion of the clk.c

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 14:03:35 2020 +0300

    soc: xtensa: Add {SOC_FAMILY}/common/include path

    Add ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/include path if exist.
    Fixes issues for xtensa SOCs.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 25 16:18:50 2020 +0100

    soc: xtensa: cavs common: fix headers for build

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 25 16:10:57 2020 +0100

    soc: xtensa: adsp: add so_inthandlers.h for Intel platforms

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 25 16:08:26 2020 +0100

    cmake: xtensa: select correct compiler per CAVS target.

    TODO: what about XCC ?

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue May 19 14:59:26 2020 +0300

    boards: up_squared_adsp: Move SOF configuration to samples

    Move SOF-specific configuration to samples/audio/sof prj.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri May 15 15:29:50 2020 +0300

    soc: intel_adsp: Move SOF code to modules/audio/sof

    Move SOF dependent code out of SOC area.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu May 14 17:30:38 2020 +0300

    Move task_main_start() to audio/sof sample

    Start task_main_start() from main of audio/sof sample.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed May 13 15:37:20 2020 +0300

    Rename up_xtreme_adsp to intel_adsp_cavs18

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon Apr 27 14:12:59 2020 +0300

    Add sample audio/sof for SOF initialization

    Add dedicated sample where we put SOF specific initialization.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 11 18:49:36 2020 +0300

    WIP: soc: cavs_v18: Cleanup

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 11 15:44:06 2020 +0300

    soc: cavs_v15: Move soc init to common part

    Moving SOC init to the right place.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 11 15:02:28 2020 +0300

    soc: intel_adsp: Move common part to special dir

    Moving common part to common/adsp.c

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri May 8 14:37:50 2020 +0300

    boards: up_xtreme_adsp: Add initial up_xtreme_adsp board

    Add initial board copying existing up_squared_adsp board and using
    CAVS1.8 SOC family.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu May 7 15:30:51 2020 +0300

    soc: intel_adsp: Generalize bootloader

    Move bootloader to soc/xtensa/intel_adsp making it available for other
    boards.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue May 5 21:31:00 2020 +0100

    boards: xtensa: up_squared: Add support for all CAVS

    Add boot support for all CAVS versions. TODO: needs to be made common

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue May 5 21:25:34 2020 +0100

    soc: xtensa: intel_adsp: Manage cache for DMA descriptors

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 4 21:10:50 2020 +0100

    soc: xtensa: adsp: use 24M567 clock

    Use audio clock

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 4 10:04:01 2020 +0100

    xtensa: soc: adsp: enable system agent

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 15:03:07 2020 +0100

    soc: xtensa: intel_adsp: increase mem pool to 192k

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 15:02:31 2020 +0100

    soc: xtensa: intel_adsp: re-enable DMA trace

    Buffer will be empty (as trace items sent to Zephyr LOG) but
    logic is running.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 11:18:55 2020 +0100

    soc: xtensa: intel: dont use uncache region yet.

    Some code was still using this region. Use later.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 10:07:28 2020 +0100

    soc: xtensa: intel_adsp: fix notifier init

    Topology now loads.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 1 21:18:38 2020 +0100

    boards: up2: Need to use sof config for bootloader

    This will need uncoupled at some point. For testing today.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 1 21:16:38 2020 +0100

    boards: up2: increase heap to 128k

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Apr 30 11:35:19 2020 +0300

    boards: up_squared_adsp: Use bigger HEAP

    Use HEAP from old demo.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 1 16:06:32 2020 +0100

    soc: xtensa: intel_adsp: Fix config.h naming collisions

    Rename sof version to sof-config.h

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Apr 30 11:22:42 2020 +0300

    Small cleanups

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 29 22:00:44 2020 +0300

    tests: sof/audio: Test ll scheduler

    Add more tests for scheduler.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 29 18:38:35 2020 +0300

    tests: Add first schedule test

    Add initial test for testing scheduling.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 29 13:36:23 2020 +0100

    soc: xtensa: rmeove build warnings

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 28 18:04:33 2020 +0300

    soc/intel_adsp: Register sof logging

    Register sof logging for tracing

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 28 14:16:55 2020 +0300

    boards: up_squared_adsp: Define HEAP_MEM_POOL_SIZE

    Define HEAP_MEM_POOL_SIZE when SOF enabled.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 28 10:09:20 2020 +0300

    tests: audio/sof: Add interrupt API for testing

    Add initial interrupt API for testing.

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 27 15:54:28 2020 +0100

    soc: xtensa: adsp: Update linker script for SOF sections.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 27 11:20:01 2020 +0100

    soc: xtensa: adsp: send SOF FW metadata as boot message

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun Apr 26 21:47:20 2020 +0100

    soc: xtensa: adsp: re-enable all SOF IP init.

    Do all SOF IP init.

    TODO: ATOMCTL, WFI on LX6

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sat Apr 25 15:30:40 2020 +0100

    soc: xtensa: irq: Make sure IPC IRQ is registered.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 22 20:56:09 2020 +0300

    tests: sof: Enable console

    Enable console for the test.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 22 17:57:22 2020 +0300

    soc: cavs_v15: Fix XTENSA_KERNEL_CPU_PTR_SR

    Use correct value for XTENSA_KERNEL_CPU_PTR_SR.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 22 14:48:31 2020 +0300

    tests: audio/sof: Add tests for alloc API testing

    Add initial tests for allocation API testing. Can be extended for
    other later.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 21 17:49:32 2020 +0300

    logging: Enable xtensa simulator backend for ADSP

    Enable xtensa simulator backend for SOC_FAMILY_INTEL_ADSP.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 20:58:30 2020 +0100

    soc: xtensa: add common cpu logic

    Support for additional cores.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 21 10:11:07 2020 +0300

    Update west.yaml to point to the latest repo

    Update west.yaml

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:17:01 2020 +0100

    soc: xtensa: cavs: Fix build for clk.c on cavs18+

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:05:31 2020 +0100

    soc: xtensa: cavs15: removed unused headers.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:05:09 2020 +0100

    soc: xtensa: cavs25: align with SOF headers

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:03:52 2020 +0100

    soc: xtensa: cavs20: align with SOF headers

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:03:09 2020 +0100

    soc: xtensa: cavs18:  Align with SOF headers.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 11:42:39 2020 +0100

    west: sof: Updated to latest version.

    Now builds, links and runs SOF code (but not to FW ready).

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun Apr 19 13:28:53 2020 +0100

    xtensa: intel adsp: build in SOF symbols if CONFIG_SOF

    Code now fully links against SOF. Needs to be run tested.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Wed Apr 15 10:19:28 2020 -0700

    DO NOT MERGE: temporarily add thesoftproject as remote for sof module

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Wed Apr 15 10:33:40 2020 -0700

    ipm: cavs_idc: use the IPC/IDC definitions in SoC

    The SoC definitions have the necessary IPC/IDC bits so there is
    no need to define them separately.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 14:30:20 2020 +0100

    TODO: config: Use static config for SOF module.

    TODO: needs to be generated as part of SOF kconfig

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri Apr 10 21:56:07 2020 +0100

    HACK: Add SOF into build

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 13:55:15 2020 +0100

    west: modules: Add SOF audio module.

    Add support for building SOF as a Zephyr module. This is the starting
    point for add SOF audio into Zephyr. Currently builds but does not use
    any symbols yet.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 13:48:48 2020 +0100

    WIP soc: adsp-cavs15: Use same include directory structure as SOF

    Use the same directory structure as SOF to simplify porting and allow
    SOF to build without Zephyr until porting work is complete.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 13:43:44 2020 +0100

    WIP soc: adsp-common: Use same include directory structure as SOF

    Use the same directory structure as SOF to simplify porting and allow
    SOF to build without Zephyr until porting work is complete.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 14:36:32 2020 +0000

    WIP: soc: adsp-common: cache is common across all Intel ADSP platforms

    De-duplicate soc.h cache definitions.
    TODO: this needs done for other common functions.
    TODO: need to fix include path

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 30 11:07:43 2020 -0700

    WIP: soc: cavs25: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 30 11:07:12 2020 -0700

    WIP: soc: cavs20: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 30 11:06:40 2020 -0700

    WIP: soc: cavs18: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 12:37:17 2020 -0700

    soc: intel_adsp: use main_entry.S in common for cavs_v15

    The files are identical anyway.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 11:38:14 2020 -0700

    soc: intel_adsp/cavs_v15: link common code

    Let cavs_v15 link against the code compiled under common/.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 13:08:28 2020 +0000

    WIP: soc: common: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 14:37:32 2020 +0000

    WIP soc: adsp-cavs15: build power down support

    Build the power down support for CAVS1.5

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 12:40:17 2020 +0000

    WIP: soc: cavs15: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 14:30:08 2020 +0000

    soc: cavs15: Add missing SHIM registers.

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 9 15:43:01 2020 +0000

    xtensa: intel_adsp/cavs_v15: fix usage of LP SRAM power gating

    Remove LSPGCTL as it can cause confusion, use SHIM_LSPGCTL instead.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Feb 26 15:28:48 2020 +0000

    boards: up_squared_adsp: Use local xtensa HAL instead of SDK HAL

    SDK HAL is deprecated for Intel ADSP SoCs so fix and use local HAL
    module.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>
    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 10:45:15 2020 -0700

    soc: add Intel Audio DSP SoC family

    This creates a SoC family for the audio DSPs on various
    Intel CPUs. The intel_apl_adsp is being moved into
    this family as well, since it is part of the CAVS v1.5
    series of DSPs.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 11:29:02 2020 -0700

    soc: xtensa: add CMakeLists.txt

    Add CMakeLists.txt under soc/xtensa so that CMakeLists.txt
    inside each SoC directory will be included, similar to
    what ARM and RISCV have.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 17 12:30:43 2020 -0700

    Revert "boards: up_squared_adsp: Add flasher script"

    This reverts commit 80f295a9dd.

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 17 12:30:32 2020 -0700

    Revert "boards: up_squared_adsp: Update logtool tool"

    This reverts commit 7770d182c1.

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 17 12:30:23 2020 -0700

    Revert "soc: intel_adsp: Generalize bootloader"

    This reverts commit d6a33ef467.

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>

    soc: xtensa; intel: remove sof-config.h - SQUASH

    No longer used.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-21 06:38:53 -04:00
Daniel Leung
41967f999f esp32: workaround esptool linker sections limit
When converting ELF to a flashable image, the esptool can only
process up to 16 ELF sections. Zephyr has been happily grouping
similar objects into linker sections which can easily go over
esptool's limit. This patch consolidates the kernel, net, log,
and shell objects into their own sections.

Also remove the app_noinit section as no one is emitting
anything into that section, and it's not being used by other
arch/SoC/boards in Zephyr.

Fixes #20980

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-13 08:53:39 -07:00
Andrei Emeltchenko
92a699155c soc: intel_apl_adsp: Tweak adsp initialization
Tweak ADSP initialization to catch early console output.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-09-04 07:55:52 -04:00
Andrei Emeltchenko
a852416cc2 soc: intel_apl_adsp: Add defaults for IPM and IPM console
Add defaults for IPM and IPM_CONSOLE when IPM and CONSOLE are
enabled.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-09-04 07:55:52 -04:00
Tomasz Bursztyka
93cd336204 arch: Apply dynamic IRQ API change
Switching to constant parameter.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
e18fcbba5a device: Const-ify all device driver instance pointers
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.

A coccinelle rule is used for this:

@r_const_dev_1
  disable optional_qualifier
@
@@
-struct device *
+const struct device *

@r_const_dev_2
 disable optional_qualifier
@
@@
-struct device * const
+const struct device *

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Andrei Emeltchenko
765305e697 ipm: ipm_intel_adsp: Add INTEL ADSP IPM driver
Add IPM driver for Host-DSP communication channel.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-08-24 13:38:33 -04:00
Kumar Gala
d2b0735c12 build: Fix usage of hardcoded zephyr.{elf,bin,hex}
Its possible to rename the executable we build via the Kconfig symbol
CONFIG_KERNEL_BIN_NAME.  So we really should use ${KERNEL_ELF_NAME},
${KERNEL_BIN_NAME} and ${KERNEL_HEX_NAME} variables instead of hardcoded
zephyr.elf, zephyr.bin, and zephyr.elf.

This fixes an build issue with
tests/misc/test_build/buildsystem.kconfig.utf8_in_values on
up_squared_adsp and lpcxpresso11u68 platforms.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-08-14 13:33:49 +02:00
Torsten Rasmussen
13153678cb xtensa: SOC_DIR usage cleanup.
This commit is a cleanup of the SOC_DIR usage.
This cleanup is a preparation for supporting a list of SOC_ROOT instead
of just allowing one SOC_ROOT.

Supporting a list of SOC_ROOTs allows for placing of SOC in Zephyr
modules. It also aligns how BOARD_ROOT supports a list, and thus usage
of n_ROOT in Zephyr becomes more consistent.

This commit introduces the following changes:
- soc/xtensa/intel_apl_adsp/bootloader.cmake removed.
  This file is not included elsewhere in the build system, and appears
  to be leftover from #25133. Almost identical content is found in
  `soc/xtensa/intel_apl_adsp/commonbootloader.cmake`
- Changed xtensa/intel_apl_adsp to named library. Using a named library
  allow fetching library files based on library name without the need to
  know build path (and thus removes the need for knowing `${SOC_DIR}`).
- Changed SOC_DIR/ARCH/SOC_FAMILY to use CMAKE_CURRENT_LIST_DIR for
  configure time commands, as CMake code is already located inside this
  path.
- Using generator expression for library files from other CMake targets.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-08-05 08:06:07 -04:00
Stephanos Ioannidis
3322489d22 config: Rename TEXT_SECTION_OFFSET to ROM_START_OFFSET
The `TEXT_SECTION_OFFSET` symbol is used to specify the offset between
the beginning of the ROM area and the address of the first ROM section.

This commit renames `TEXT_SECTION_OFFSET` to `ROM_START_OFFSET` because
the first ROM section is not always the `.text` section.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-07-09 14:02:38 -04:00
Torsten Rasmussen
bab3a2562e xtensa: changing $ENV{ZEPHYR_SDK_INSTALL_DIR} to CMake var
ZEPHYR_SDK_INSTALL_DIR will be set as an internal CMake variable when
using the Zephyr SDK.
The Zephyr SDK zephyr/host-tools.cmake will ensure to set the CMake
ZEPHYR_SDK_INSTALL_DIR variable to the environment setting, or the
install directory in case the CMake package was used.

Users not using the environment variable will experience the following
error:
```
Linking C executable zephyr/.../bootloader/bootloader.elf
FAILED: zephyr/.../bootloader/bootloader.elf
<path>/xtensa-zephyr-elf/bin/ld: cannot find -lhal
```

This commit ensures code build correctly both when setting the
environment variable ZEPHYR_SDK_INSTALL_DIR, and when using Zephyr SDK
CMake `find_package(Zephyr-sdk)`

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-07-02 11:32:58 -07:00
Tomasz Konieczny
c73578f37a logging: enhanced external logsystems
Introduced interface for efficient logging from external logsystems:
Added handling of vaargs and automatic strdup to macros intended
to be used in logging interface function. Fast path to less then 4
arguments to speed up the execution. Made log_count_args external,
if external logsystem cannot count arguments.

Signed-off-by: Tomasz Konieczny <tomasz.konieczny@nordicsemi.no>
2020-06-17 17:08:12 +02:00
Mohamed ElShahawi
f9e0fa9af3 drivers: esp32/clock_control: support UART, I2C
- Change default CPU Clock to 240MHz
(PLL is activated)
- I2C, UART will use sysclk from clock driver
- esp32_enable_peripheral replaced by
clock_control_on

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-06-16 09:00:51 -05:00
Mohamed ElShahawi
4acac3e9ef drivers: esp32/clock_control: Add Clock Driver
- Support PLL for Higher Frequencies 80,160,240 MHz
- Support XTAL Frequencies 26MHz, 40MHz
- Clock Driver can't be disabled, because all of the other drivers
will depend on it to get their operating Frequency based on chosen
clock source (XTAL/PLL).

- Add needed references to BBPLL i2c bus ROM functions.
- Add `rtc` node to Device Tree.
- Since All Peripherals Frequency is depending on CPU_CLK Source,
`clock-source` property added to CPU node

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-06-16 09:00:51 -05:00
Kumar Gala
a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Andrei Emeltchenko
d6a33ef467 soc: intel_adsp: Generalize bootloader
Move bootloader to soc/xtensa/intel_adsp making it available for other
boards.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-05-09 13:07:33 +02:00
Daniel Leung
4962bf3875 soc: intel_s1000: fix SMP build error
During devicetree macro changes, LPSRAM_BOOT_VECTOR_ADDR
pointed to another macro which was renamed to a non-existent
one. Fix it so that SMP builds again.

Fixes #24720

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-04-29 14:59:33 -05:00
Kumar Gala
8aeb8a3814 soc: xtensa: rework DT_L2_SRAM and DT_L2_SRAM
Rename DT_L2_SRAM_* to just L2_SRAM_* and set it using new DT macros.
Do something similar for DT_LP_SRAM_* renamed to LP_SRAM_*

Updated the intel_gna driver as it used the DT_L2_SRAM_* defines.

This change also lets us remove dts_fixup.h on intel_s1000 and
intel_apl_adsp SoCs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-25 09:32:00 -05:00
Kumar Gala
6784558b22 arch: xtensa: replace DT_CPU_CLOCK_FREQUENCY with new dt macros
Replace DT_CPU_CLOCK_FREQUENCY with a PATH based reference to cpu@0
(DT_PATH(cpus, cpu_0)) and than getting the clock_frequency property:

DT_CPU_CLOCK_FREQUENCY -> DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency)

This lets us remove DT_CPU_CLOCK_FREQUENCY from dts_fixup.h

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-22 11:38:33 -05:00
Kumar Gala
45a014a883 drivers: intc: intc_cavs: Convert to DT_INST
Convert driver to use new DT_INST macros throughout.  This allows us to
also remove dts_fixup.h that are no longer used.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-22 04:59:22 -05:00
Kumar Gala
9b4aef7422 soc: xtensa: replace DT_CAVS_ICTL_x_IRQ with new dt macros
Replace macros of the form DT_CAVS_ICTL_x_IRQ with new dt form macro
DT_IRQN(DT_INST(x, intel_cavs_intc))

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-22 04:59:22 -05:00
Kumar Gala
e53ddb5037 intc: intc_cavs: Replace DT_CAVS_ICTL_BASE_ADDR with new macros
Replace various drivers and soc code that use DT_CAVS_ICTL_BASE_ADDR
with DT_REG_ADDR(DT_NODELABEL(cavs0)).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-22 04:59:22 -05:00
Kumar Gala
492fbf7bba intc: intc_cavs: Use DTS labels for device names
Replace Kconfig device names with one's that come from device tree like
most all other devices do.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-22 04:59:22 -05:00
Kumar Gala
576033f858 drivers: pinmux: intel_s1000: Convert to DT_INST
Convert driver to use new DT_INST macros throughout.  This allows us to
also remove dts_fixup.h that are no longer used.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-20 15:21:39 -05:00
Martí Bolívar
f3b4d8a86f soc: remove DT_WDT_0_NAME, DT_WDT_1_NAME
There are no more in-tree users of these fixup macros.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-04-17 16:09:07 -05:00
Kumar Gala
43a7d26603 drivers: entropy: replace CONFIG_ENTROPY_NAME with DT macro
Replace CONFIG_ENTROPY_NAME with DT_CHOSEN_ZEPHYR_ENTROPY_LABEL.  We now
set zephyr,entropy in the chosen node of the device tree to the entropy
device.

This allows us to remove CONFIG_ENTROPY_NAME from dts_fixup.h.  Also
remove any other stale ENTROPY related defines in dts_fixup.h files.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-13 09:14:21 -05:00
Daniel Leung
7b31f93980 xtensa: enable XTENSA_HAL at SoC level
This moves enabling XTENSA_HAL to the SoC definitions.
As Xtensa SoCs are highly configurable, it is possible
that the generic Xtensa HAL provided in the tree is
not suitable. So only enable XTENSA_HAL only if
the generic version can be used.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-04-08 13:10:35 -07:00
Kumar Gala
120674660e soc: xtensa: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-27 10:06:14 -05:00
Kumar Gala
1229820504 soc: esp32: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 08:49:11 -05:00
Daniel Leung
fb1e7a563c soc: intel_apl_adsp: add multi-processing support
This adds multi-processing support for Intel Apollo Lake ADSP.

Some of the start-up code is borrowed from ESP32.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung
8cce5d31ba soc: intel_apl_adsp: select CONFIG_ATOMIC_OPERATIONS_BUILTIN
The GCC 9.2 toolchain for intel_apl_adsp has builtin atomic
functions already so we can use that instead of the custom
one in arch. This allows the atomic function calls to be
inlined.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung
0ba204083d soc: intel_s1000: add SMP support
This adds SMP support for Intel S1000 SoC.

Some of the start-up code is borrowed from ESP32.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung
ad2ee13c27 soc: intel_s1000: use EXCSAVE7 for CPU pointer
EXCSAVE2 is used for level 2 exception save location.
Since we are using level 2 interrupts, use EXCSAVE7
instead as level 7 interrupts are not being used
by the SoC.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung
3751c396cd soc: intel_s1000: use CAVS DSP wall clock timer for SMP
The DSP wall clock timer is a timer driven directly by
external oscillator and is external to the CPU core(s).
It provides a common and synchronized counter for all
CPU cores (which is useful for SMP), instead of
indepedently running local core timer (xtensa_timer).

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Kumar Gala
47968e30cf drivers: spi: dw: handle flags differences in driver
Towards cleaning up (and hopefully removing dts_fixup.h in the near
future).  We need to move the handling of different names for the irq
flag propety into the driver and out of dts_fixup.h.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-17 19:37:59 -04:00
Kumar Gala
78ae42d86b drivers: gpio: dw: handle flags differences in driver
Towards cleaning up (and hopefully removing dts_fixup.h in the near
future).  We need to move the handling of different names for the irq
flag propety into the driver and out of dts_fixup.h.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-17 19:37:59 -04:00
Timo Teräs
6fd168e9a1 driver: uart: ns16550: convert to DT_INST_*
Change to code to use the automatically generated DT_INST_*
defines and remove the now unneeded configs and fixups.

Signed-off-by: Timo Teräs <timo.teras@iki.fi>
2020-03-14 02:22:05 +02:00