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drivers: gpio: dw: handle flags differences in driver

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Towards cleaning up (and hopefully removing dts_fixup.h in the near
future).  We need to move the handling of different names for the irq
flag propety into the driver and out of dts_fixup.h.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-03-17 10:58:48 -05:00 • committed by Anas Nashif
commit 78ae42d86b
5 changed files with 25 additions and 25 deletions
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29
drivers/gpio/gpio_dw.c
View file

@ -616,6 +616,11 @@ DEVICE_AND_API_INIT(gpio_dw_0, DT_INST_0_SNPS_DESIGNWARE_GPIO_LABEL,
&api_funcs);
#endif
#if defined(DT_INST_0_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS)
#define INST_0_IRQ_FLAGS DT_INST_0_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS
#else
#define INST_0_IRQ_FLAGS 0
#endif
static void gpio_config_0_irq(struct device *port)
{
#if (DT_INST_0_SNPS_DESIGNWARE_GPIO_IRQ_0 > 0)
@ -625,7 +630,7 @@ static void gpio_config_0_irq(struct device *port)
IRQ_CONNECT(DT_INST_0_SNPS_DESIGNWARE_GPIO_IRQ_0,
DT_INST_0_SNPS_DESIGNWARE_GPIO_IRQ_0_PRIORITY, gpio_dw_isr,
DEVICE_GET(gpio_dw_0),
DT_INST_0_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS);
INST_0_IRQ_FLAGS);
irq_enable(config->irq_num);
#elif defined(CONFIG_GPIO_DW_0_IRQ_SHARED)
struct device *shared_irq_dev;
@ -680,6 +685,12 @@ DEVICE_AND_API_INIT(gpio_dw_1, DT_INST_1_SNPS_DESIGNWARE_GPIO_LABEL,
&api_funcs);
#endif
#if defined(DT_INST_1_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS)
#define INST_1_IRQ_FLAGS DT_INST_1_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS
#else
#define INST_1_IRQ_FLAGS 0
#endif
static void gpio_config_1_irq(struct device *port)
{
#if (DT_INST_1_SNPS_DESIGNWARE_GPIO_IRQ_0 > 0)
@ -689,7 +700,7 @@ static void gpio_config_1_irq(struct device *port)
IRQ_CONNECT(DT_INST_1_SNPS_DESIGNWARE_GPIO_IRQ_0,
DT_INST_1_SNPS_DESIGNWARE_GPIO_IRQ_0_PRIORITY, gpio_dw_isr,
DEVICE_GET(gpio_dw_1),
DT_INST_1_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS);
INST_1_IRQ_FLAGS);
irq_enable(config->irq_num);
#elif defined(CONFIG_GPIO_DW_1_IRQ_SHARED)
struct device *shared_irq_dev;
@ -743,6 +754,11 @@ DEVICE_AND_API_INIT(gpio_dw_2, DT_INST_2_SNPS_DESIGNWARE_GPIO_LABEL,
&api_funcs);
#endif
#if defined(DT_INST_2_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS)
#define INST_2_IRQ_FLAGS DT_INST_2_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS
#else
#define INST_2_IRQ_FLAGS 0
#endif
static void gpio_config_2_irq(struct device *port)
{
#if (DT_INST_2_SNPS_DESIGNWARE_GPIO_IRQ_0 > 0)
@ -752,7 +768,7 @@ static void gpio_config_2_irq(struct device *port)
IRQ_CONNECT(DT_INST_2_SNPS_DESIGNWARE_GPIO_IRQ_0,
DT_INST_2_SNPS_DESIGNWARE_GPIO_IRQ_0_PRIORITY, gpio_dw_isr,
DEVICE_GET(gpio_dw_2),
DT_INST_2_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS);
INST_2_IRQ_FLAGS);
irq_enable(config->irq_num);
#elif defined(CONFIG_GPIO_DW_2_IRQ_SHARED)
struct device *shared_irq_dev;
@ -806,6 +822,11 @@ DEVICE_AND_API_INIT(gpio_dw_3, DT_INST_3_SNPS_DESIGNWARE_GPIO_LABEL,
&api_funcs);
#endif
#if defined(DT_INST_3_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS)
#define INST_3_IRQ_FLAGS DT_INST_3_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS
#else
#define INST_3_IRQ_FLAGS 0
#endif
static void gpio_config_3_irq(struct device *port)
{
#if (DT_INST_3_SNPS_DESIGNWARE_GPIO_IRQ_0 > 0)
@ -815,7 +836,7 @@ static void gpio_config_3_irq(struct device *port)
IRQ_CONNECT(DT_INST_3_SNPS_DESIGNWARE_GPIO_IRQ_0,
DT_INST_3_SNPS_DESIGNWARE_GPIO_IRQ_0_PRIORITY, gpio_dw_isr,
DEVICE_GET(gpio_dw_3),
DT_INST_3_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS);
INST_3_IRQ_FLAGS);
irq_enable(config->irq_num);
#elif defined(CONFIG_GPIO_DW_3_IRQ_SHARED)
struct device *shared_irq_dev;

5
soc/arc/snps_arc_hsdk/dts_fixup.h
View file

@ -6,11 +6,6 @@
/* SoC level DTS fixup file */
/*
* GPIO configuration
*/
#define DT_INST_0_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS 0
/*
* SPI configuration
*/

6
soc/arc/snps_emsdp/dts_fixup.h
View file

@ -13,10 +13,4 @@
#define DT_ICCM_BASE_ADDRESS DT_ARC_ICCM_60000000_BASE_ADDRESS
#define DT_ICCM_SIZE (DT_ARC_ICCM_60000000_SIZE >> 10)
/*
* GPIO configuration
*/
#define DT_INST_0_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS 0
#define DT_INST_1_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS 0
/* End of SoC Level DTS fixup file */

8
soc/arc/snps_emsk/dts_fixup.h
View file

@ -12,14 +12,6 @@
#define DT_DDR_BASE_ADDRESS DT_MMIO_SRAM_10000000_BASE_ADDRESS
#define DT_DDR_SIZE (DT_MMIO_SRAM_10000000_SIZE >> 10)
/*
* GPIO configuration
*/
#define DT_INST_0_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS 0
#define DT_INST_1_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS 0
#define DT_INST_2_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS 0
#define DT_INST_3_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS 0
/*
* SPI configuration
*/

2
soc/xtensa/intel_s1000/dts_fixup.h
View file

@ -29,8 +29,6 @@
#define DT_INST_0_SNPS_DESIGNWARE_SPI_IRQ_FLAGS 0
#define DT_INST_0_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS 0
#define DT_PINMUX_BASE_ADDR \
DT_INTEL_S1000_PINMUX_81C30_BASE_ADDRESS
#define DT_PINMUX_CTRL_REG_COUNT \