The heltec_wireless_stick_lite_v3 board does not properly handle
receive operations when the SPI used to communicate with onboard SX1262 has
the clock frequency set too high. This causes radio recv operation to
almost always hang forever without any error, as the SX1262 module returns
0xFF00 value as the interrupt status which does not make any sense, thus
causing the LoRaWAN library to trigger RXTX timeout handler which in the
current SX1262 driver implementation is not privded. The issue occurs
almost always, sometimes allowing to receive few (3-5) tranmissions
correctly, then fail. The root of the problem is not known for sure, but it
is highly likely a board's limitation, though not confirmed by the
manufacturer.
The current SPI frequency was chosen arbitrarily based on the conducted
experiments where the 30 000 messages have been received continiously
without any problems (with 5s interval for each message).
Signed-off-by: Patryk Biel <pbiel7@gmail.com>
Initial commit for entropy support on RA8
- drivers: entropy: implementation for TRNG driver of RA8x1
- dts: arm: add device node for trng of RA8x1
- boards: arm: enable support zephyr_entropy for ek_ra8m1 and
update board documentation
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
Add board support for Application, Radio and PPR cores
of the nRF9230 SoC / nRF9280 SiP on the nRF9280 PDK board.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Co-authored-by: Andreas Moltumyr <andreas.moltumyr@nordicsemi.no>
Adds a new board definition for the ADI MAX32690FTHR board. This board
uses the same SoC as the MAX32690EVKIT board, but with a smaller feather
form factor.
Tested on hardware with the following samples:
- samples/hello_world
- samples/basic/blinky
- samples/basic/threads
- samples/subsys/shell/shell_module
- samples/subsys/input/input_dump
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Updated the clocks that get initialized for the MCXN947
when using the LPTMR. The LPTMR allows the user to select
and Input clock, however said input clock must be
initialized before the user can select it.
Update description for clk-source in binding file.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Currently this code related to how to configure the
flash size and address when using flexspi to XIP is copy
pasted in all sort of places and ways all over the tree,
let's clean this up and have single point of control over
this configuration.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
To prepare for supporting flexcan, can node should be
renamed to canxl to support both flexcan and canxl
Signed-off-by: Tu Nguyen Van <tu.nguyenvan@nxp.com>
Add the support of the reset-cmd property for the stm32h7 disco kits
where the quad-spi flash is mt25ql512ab
This device accepts the SPI_NOR_CMD_RESET_En/SPI_NOR_CMD_RESET_MEM
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Configures pins for the SPI instance attached to the Pmod connector to
enable using this board with the pmod_acl shield.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Adds a new shield definition for the Digilent Pmod ACL module. This
module provides support for an ADI ADXL345 3-axis accelerometer over a
Pmod SPI connector.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add initial support for npcm400 evaluation board
Signed-off-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: James Chiang <cpchiang1@nuvoton.com>
Signed-off-by: Joseph Liu <kwliu@nuvoton.com>
ESP32-C3-DevKit-RUST-1 is a ESP32C3 based board
that includes a builtin LED, button, WS2812,
temperature and humidity sensor (SHTC3) and a IMU
(ICM42670).
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Add LPTMR driver counter support for NXP frdm_ke17z and frdm_ke17z512
boards, tested 'drivers.counter.basic_api' case.
Enable cpu power states and determine the default
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC from devicetree when using the
Arm SysTick hardware timer.
Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
MAX32690EVKIT board has CFAF128128B1-0145T display which
is 128x128 graphic display.
The pins goes to display is not standard SPI interface, it requires
SPI bitbanging to drive display.
This commit enables mpi dbi display support with LVGL graphic library
Pin connection of display is 3wire mode
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
MAX32680EVKIT board has CFAF128128B1-0145T display which
is 128x128 graphic display.
This commit enables mpi dbi display support with LVGL graphic library
Pin connection of display is 3wire mode
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
MAX32672EVKIT board has CFAF128128B1-0145T display which
is 128x128 graphic display.
This commit enable mpi dbi display support with LVGL graphic library.
Pin connection of display is 3wire mode
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
Update the bus_clk divider value from 4 to 2 for frdm_ke17z512
platform. The bus and flash clocks are raised to 16Mhz to ensure
that `tests.kernel.timer.timer_jitter_drift` sample passes.
Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
Add support for the ST nucleo h755zi_q board which
uses an stm32h755 in the st nucleo-144 board
format.
Signed-off-by: Mike Banducci <michael.banducci@sandc.com>
Change NuMaker M463/M467 series USBD clock source to HIRC48M.
This makes core-clock and its clock source PLL not required
to be multiple of 48MHz.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Background of this modification is to make clock control
driver code provided by Renesas vendor to support for Renesas MCU
on Zephyr.
Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
