boards: st: nucleo_h723zg: enable fdcan1
Enable FDCAN1 on the ST Nucleo H723ZG development board. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
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@ -117,6 +117,8 @@ features:
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+-------------+------------+-------------------------------------+
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| RTC | on-chip | rtc |
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+-------------+------------+-------------------------------------+
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| FDCAN1 | on-chip | CAN-FD Controller |
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+-------------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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@ -138,6 +140,7 @@ and a ST morpho connector. Board is configured as follows:
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- LD3 : PB14
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- I2C : PB8, PB9
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- SPI1 NSS/SCK/MISO/MOSI : PD14PA5/PA6/PB5 (Arduino SPI)
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- FDCAN1 RX/TX : PD0, PD1
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System Clock
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------------
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@ -158,6 +161,13 @@ Backup SRAM
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In order to test backup SRAM you may want to disconnect VBAT from VDD. You can
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do it by removing ``SB52`` jumper on the back side of the board.
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FDCAN
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=====
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The Nucleo H723ZG board does not have any onboard CAN transceiver. In order to
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use the FDCAN bus on this board, an external CAN bus transceiver must be
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connected to pins PD0 (RX) and PD1 (TX).
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Programming and Debugging
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*************************
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@ -24,6 +24,7 @@
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zephyr,dtcm = &dtcm;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,canbus = &fdcan1;
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};
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leds: leds {
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@ -97,6 +98,16 @@
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status = "okay";
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};
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&pll2 {
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div-m = <1>;
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mul-n = <10>;
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div-p = <1>;
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div-q = <1>;
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div-r = <1>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(550)>;
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@ -190,3 +201,11 @@ zephyr_udc0: &usbotg_hs {
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&rng {
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status = "okay";
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};
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&fdcan1 {
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pinctrl-0 = <&fdcan1_rx_pd0 &fdcan1_tx_pd1>;
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pinctrl-names = "default";
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clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000100>,
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<&rcc STM32_SRC_PLL2_Q FDCAN_SEL(2)>;
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status = "okay";
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};
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@ -22,4 +22,5 @@ supported:
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- backup_sram
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- usb_device
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- rtc
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- can
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vendor: st
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