boards: nxp: frdm_ke17z512: update dts to update bus_clk divider

Update the bus_clk divider value from 4 to 2 for frdm_ke17z512
platform. The bus and flash clocks are raised to 16Mhz to ensure
that `tests.kernel.timer.timer_jitter_drift` sample passes.

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
This commit is contained in:
Anke Xiao 2024-08-13 14:44:45 +08:00 committed by Anas Nashif
commit 2a1b924aa0

View file

@ -100,6 +100,12 @@
status = "okay";
};
&scg {
bus_clk {
clock-div = <2>;
};
};
&gpioe {
status = "okay";
};