soc: nxp: Centralize flexspi related configuration

Currently this code related to how to configure the
flash size and address when using flexspi to XIP is copy
pasted in all sort of places and ways all over the tree,
let's clean this up and have single point of control over
this configuration.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2024-08-12 14:15:19 -05:00 committed by Alberto Escolar
commit a097cdc4fe
19 changed files with 63 additions and 218 deletions

View file

@ -31,15 +31,6 @@ config SYS_CLOCK_HW_CYCLES_PER_SEC
default 240000000 if BOARD_MIMXRT1160_EVK_MIMXRT1166_CM4 && CORTEX_M_SYSTICK
default 600000000 if BOARD_MIMXRT1160_EVK_MIMXRT1166_CM7 && CORTEX_M_SYSTICK
if FLASH_MCUX_FLEXSPI_XIP && MEMC_MCUX_FLEXSPI
choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET
default FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM if CPU_CORTEX_M7
default FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM if CPU_CORTEX_M4
endchoice
endif # FLASH_MCUX_FLEXSPI_XIP && MEMC_MCUX_FLEXSPI
if NETWORKING
config NET_L2_ETHERNET

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@ -34,15 +34,6 @@ config IMX_USDHC_DAT3_PWR_TOGGLE
endif # DISK_DRIVERS
if FLASH_MCUX_FLEXSPI_XIP && MEMC_MCUX_FLEXSPI
choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET
default FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM if CPU_CORTEX_M7
default FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM if CPU_CORTEX_M4
endchoice
endif # FLASH_MCUX_FLEXSPI_XIP && MEMC_MCUX_FLEXSPI
if NETWORKING
config NET_L2_ETHERNET

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@ -8,10 +8,6 @@ if BOARD_MIMXRT595_EVK_MIMXRT595S_CM33
config FLASH_MCUX_FLEXSPI_MX25UM51345G
default y if FLASH
choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET
default FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM
endchoice
config FXOS8700_DRDY_INT1
default y
depends on FXOS8700_TRIGGER

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@ -18,10 +18,6 @@ choice FLASH_MCUX_FLEXSPI_MX25UM51345G_OPI_MODE
default FLASH_MCUX_FLEXSPI_MX25UM51345G_OPI_STR
endchoice
choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET
default FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM
endchoice
config FXOS8700_DRDY_INT1
default y
depends on FXOS8700_TRIGGER

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@ -12,15 +12,6 @@ config IMX_USDHC_DAT3_PWR_TOGGLE
endif # DISK_DRIVERS
if FLASH_MCUX_FLEXSPI_XIP && MEMC_MCUX_FLEXSPI
choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET
default FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM if CPU_CORTEX_M7
default FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM if CPU_CORTEX_M4
endchoice
endif # FLASH_MCUX_FLEXSPI_XIP && MEMC_MCUX_FLEXSPI
if NETWORKING
config NET_L2_ETHERNET