boards: witte_technology: linum: add initial support
To the Linum board from Witte Technology based on STM32H753xx. Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
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10
boards/witte/index.rst
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boards/witte/index.rst
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.. _boards-witte:
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Witte
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#####
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.. toctree::
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:maxdepth: 1
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:glob:
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**/*
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boards/witte/linum/Kconfig.defconfig
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boards/witte/linum/Kconfig.defconfig
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# STM32H753ZI Linum board configuration
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# Copyright (c) 2024 Felipe Neves
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_LINUM
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if NETWORKING
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config NET_L2_ETHERNET
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default y
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endif # NETWORKING
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endif # BOARD_LINUM
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boards/witte/linum/Kconfig.linum
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boards/witte/linum/Kconfig.linum
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# Copyright (c) 2024 Felipe Neves
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_LINUM
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select SOC_STM32H753XX
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boards/witte/linum/board.cmake
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boards/witte/linum/board.cmake
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(jlink "--device=STM32H753BI" "--speed=4000")
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
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board_runner_args(openocd --target-handle=_CHIPNAME.cpu0)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
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boards/witte/linum/board.yml
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boards/witte/linum/board.yml
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board:
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name: linum
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vendor: witte
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socs:
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- name: stm32h753xx
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BIN
boards/witte/linum/doc/img/linum-stm32h753bi-top.jpg
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boards/witte/linum/doc/img/linum-stm32h753bi-top.jpg
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406
boards/witte/linum/doc/index.rst
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boards/witte/linum/doc/index.rst
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.. _linum:
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Witte Technology Linum Board
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############################
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Overview
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********
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Linum is a development board released by Witte Tenology in 2023, and it was developed around the
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STM32H753BI microcontroller. The board has 2 expansion connectors used by the LCD display with
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touchscreen and another for access to other peripherals of microcontroller. Also it brings plenty
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of communications interfaces like UART with RS232 and RS485 capabillities, CAN bus compatible to
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FD standard, and networking over Ethernet.
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.. image:: img/linum-stm32h753bi-top.jpg
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:align: center
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:alt: Linum development board
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Hardware
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********
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The board features:
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- 8 to 52V power supply
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- SWD Pins for use as STLink (Pin header) and TC2030-IDC 6-Pin Tag-Connect Plug-of-Nails™ Connector
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- Crystal for HS 25MHz
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- Crystal for RTC 32.768KHz
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- 1 UART serial for debug
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- 1 Led RGB
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- 1 Buzzer without internal oscillator
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- 1 Mono audio up to 3W
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- 1 Ethernet 10/100
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- 1 MicroSD connector supporting 1 or 4-bit bus
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- 1 USB 2.0 Host/Device
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- 1 EEPROM memory with 512K bits
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- 1 External SRAM memory with 8MB
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- 1 NOR memory with 16MB
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- 2 On-board RS232 Transceiver with RTS/CTS
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- 2 On-board RS485 Transceiver
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- 2 On-board CAN-FD Transceiver
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Expansion connector 1 features:
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- 1 Display RBG 888
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- 1 Capacitive Touchscreen sensor
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Expansion connector 2 features.
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- 1 SPI
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- 1 I2C
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- 1 One Wire
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- 2 DACs
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- 6 PWM Channels
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- 10 ADCs
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Supported Features
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==================
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The Zephyr Linum board configuration supports the following hardware
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features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| RTC | on-chip | counter |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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| PWM | on-chip | pwm |
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+-----------+------------+-------------------------------------+
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| RNG | on-chip | True Random number generator |
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+-----------+------------+-------------------------------------+
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| ETHERNET | on-chip | ethernet |
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+-----------+------------+-------------------------------------+
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| SPI | on-chip | spi |
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+-----------+------------+-------------------------------------+
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| USB | on-chip | usb_device |
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+-----------+------------+-------------------------------------+
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| CAN/CANFD | on-chip | canbus |
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+-----------+------------+-------------------------------------+
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| LTDC | on-chip | LCD Interface |
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+-----------+------------+-------------------------------------+
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| FMC | on-chip | memc (SDRAM) |
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+-----------+------------+-------------------------------------+
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| SDMMC | on-chip | disk access |
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+-----------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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The default configuration can be found in the defconfig file:
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:zephyr_file:`boards/witte_technology/linum/linum_defconfig`
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Default Zephyr Peripheral Mapping:
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----------------------------------
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BOARD-LEDs
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----------
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The LINUM-STM32H753BI has 3 software controllable LEDs.
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======= =====
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LED RGB PINS
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======= =====
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LED_R PG2
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LED_G PG3
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LED_B PB2
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======= =====
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UART/USART
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----------
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The LINUM-STM32H753BI used the USART1 for serial console.
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USART1
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------
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====== =====
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USART1 PINS
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====== =====
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TX PB14
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RX PB15
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====== =====
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The LINUM-STM32H753BI board has two on-board RS-232 transceiver connected to USART2 and USART3.
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====== =====
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USART2 PINS
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====== =====
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TXD PD5
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RXD PD6
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CTS PD3
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RTS PD4
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====== =====
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====== =====
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USART3 PINS
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====== =====
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TXD PB10
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RXD PB11
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CTS PD11
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RTS PD12
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====== =====
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The LINUM-STM32H753BI board has two on-board RS-485 transceiver connected to USART4 and USART6.
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====== =====
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UART4 PINS
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====== =====
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TXD PB9
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RXD PB8
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DE PA15
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====== =====
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====== =====
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USART6 PINS
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====== =====
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TXD PC6
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RXD PC7
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DE PG12
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====== =====
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SDMMC
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-----
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The LINUM-STM32H753BI has one SDCard slot connected as below:
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========== =====
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SDMMC1 PINS
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========== =====
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SDMMC_D0 PC8
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SDMMC_D1 PC9
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SDMMC_D2 PC10
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SDMMC_D3 PC11
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SDMMC_DK PC12
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========== =====
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=============== =====
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GPIO PINS
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=============== =====
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SDCARD_DETECTED PG7
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SDCARD_PWR_EN PD7
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=============== =====
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ETHERNET
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--------
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The LINUM-STM32H753BI has a ethernet connection using the transceiver KSZ8081RNACA.
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============ =====
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ETH PINS
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============ =====
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ETH_REF_CLK PA1
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ETH_MDIO PA2
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ETH_CRS_DV PA7
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ETH_MDC PC1
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ETH_RXD0 PC4
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ETH_RXD1 PC5
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ETH_TX_EN PG11
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ETH_TXD0 PG13
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ETH_TXD1 PG14
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ETH_CLK PA8
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ETH_RESET PI4
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============ =====
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CAN-FD
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------
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The LINUM-STM32H753BI board has two on-board CAN-FD transceiver connected to FDCAN1 and FDCAN2.
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====== =====
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FDCAN1 PINS
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====== =====
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TXD PH13
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RXD PH14
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STD PI2
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====== =====
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====== =====
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FDCAN2 PINS
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====== =====
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TXD PB13
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RXD PB12
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STD PE3
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====== =====
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USB
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---
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The LINUM-STM32H753BI has one usb port.
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========= =====
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USB PINS
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========= =====
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USB_VBUS PA9
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USB_N PA11
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USB_P PA12
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USB_EN PI12
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USB_FLT PI13
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========= =====
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I2C3
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----
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The LINUM-STM32H753BI connects the EEPROM memory and the touchscreen sensor to I2C3.
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====== =====
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I2C3 PINS
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====== =====
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SCL PH7
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SDA PH8
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====== =====
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External SDRAM
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--------------
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The LINUM-STM32H753BI has a external SDRAM with 8Mbytes connected to FMC peripheral.
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=========== =====
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FMC PINS
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=========== =====
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FMC_A0 PF0
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FMC_A1 PF1
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FMC_A2 PF2
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FMC_A3 PF3
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FMC_A4 PF4
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FMC_A5 PF5
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FMC_A6 PF12
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FMC_A7 PF13
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FMC_A8 PF14
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FMC_A9 PF15
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FMC_A10 PG0
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FMC_A11 PG1
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FMC_BA0 PG4
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FMC_BA1 PG5
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FMC_D0 PD14
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FMC_D1 PD15
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FMC_D2 PD0
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FMC_D3 PD1
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FMC_D4 PE7
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FMC_D5 PE8
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FMC_D6 PE9
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FMC_D7 PE10
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FMC_D8 PE11
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FMC_D9 PE12
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FMC_D10 PE13
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FMC_D11 PE14
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FMC_D12 PE15
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FMC_D13 PD8
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FMC_D14 PD9
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FMC_D15 PD10
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FMC_NBL0 PE0
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FMC_NBL1 PE1
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FMC_SDCKE0 PC3
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FMC_SDCLK PG8
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FMC_SDNCAS PG15
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FMC_SDNEO PC2
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FMC_SDNRAS PF11
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FMC_SDNWE PC0
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=========== =====
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LCD
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---
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The LINUM-STM32H753BI use the LTDC to support one LCD with RGB connection.
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============= =====
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LTDC PINS
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============= =====
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LTDC_B0 PJ12
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LTDC_B1 PJ13
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LTDC_B2 PJ14
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LTDC_B3 PJ15
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LTDC_B4 PK3
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LTDC_B5 PK4
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LTDC_B6 PK5
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LTDC_B7 PK6
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LTDC_CLK PI14
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LTDC_DE PK7
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LTDC_G0 PJ7
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LTDC_G1 PJ8
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LTDC_G2 PJ9
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LTDC_G3 PJ10
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LTDC_G4 PJ11
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LTDC_G5 PK0
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LTDC_G6 PK1
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LTDC_G7 PK2
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LTDC_HSYNC PI10
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LTDC_R0 PI15
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LTDC_R1 PJ0
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LTDC_R2 PJ1
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LTDC_R3 PJ2
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LTDC_R4 PJ3
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LTDC_R5 PJ4
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LTDC_R6 PJ5
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LTDC_R7 PJ6
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LTDC_VSYNC PI9
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PWM_BACKLIGHT PH6
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============= =====
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System Clock
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------------
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Linum H753ZI System Clock could be driven by an internal or external
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oscillator, as well as the main PLL clock. By default, the System clock is
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driven by the PLL clock at 480MHz, driven by an 25MHz high-speed external clock.
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Programming and Debugging
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*************************
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Applications for the ``linum`` board configuration can be built and
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flashed in the usual way (see :ref:`build_an_application` and
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:ref:`application_run` for more details).
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.. note::
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For debugging or programming Linum you will need to use an external debug
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debug or flash tool and connect it to the SWD Connnector. JLink or ST-Link
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probes are examples of out of the box compatible tools.
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Flashing
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========
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Flashing an application to the Linum board
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-------------------------------------------
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Here is an example for the :ref:`hello_world` application.
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Run a serial host program to connect with your Nucleo board.
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.. code-block:: console
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$ minicom -b 115200 -D /dev/ttyACM0
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Build and flash the application:
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: linum
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:goals: build flash
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You should see the following message on the console:
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.. code-block:: console
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$ Hello World! linum
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Debugging
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=========
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You can debug an application in the usual way. Here is an example for the
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:ref:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: linum
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:maybe-skip-config:
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:goals: debug
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.. _Witte Linum website:
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https://wittetech.com/
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392
boards/witte/linum/linum.dts
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392
boards/witte/linum/linum.dts
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/*
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* Copyright (c) 2024 Felipe Neves
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/h7/stm32h753Xi.dtsi>
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#include <st/h7/stm32h753bitx-pinctrl.dtsi>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "Witte Technology STM32H753ZI Linum board";
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compatible = "witte,linum";
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chosen {
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zephyr,console = &usart1;
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zephyr,shell-uart = &usart1;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,dtcm = &dtcm;
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zephyr,code-partition = &slot0_partition;
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zephyr,canbus = &fdcan1;
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};
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sdram1: sdram@c0000000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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device_type = "memory";
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reg = <0xc0000000 DT_SIZE_M(8)>;
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zephyr,memory-region = "SDRAM1";
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
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};
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leds: leds {
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compatible = "gpio-leds";
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green_led: led_0 {
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gpios = <&gpiog 2 GPIO_ACTIVE_LOW>;
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label = "User LD1";
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};
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red_led: led_1 {
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gpios = <&gpiob 2 GPIO_ACTIVE_LOW>;
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label = "User LD2";
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};
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blue_led: led_2 {
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gpios = <&gpiog 3 GPIO_ACTIVE_LOW>;
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label = "User LD3";
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};
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};
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aliases {
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led0 = &green_led;
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led1 = &blue_led;
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};
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};
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&gpiod {
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status = "okay";
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/* power the SD card */
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mcu-sel-gpios {
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gpio-hog;
|
||||
gpios = <7 GPIO_ACTIVE_HIGH>;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
&gpioi {
|
||||
status = "okay";
|
||||
/* power the ETH PHY , and FDCAN1 XVCR*/
|
||||
mcu-sel-gpios {
|
||||
gpio-hog;
|
||||
gpios = <2 GPIO_ACTIVE_HIGH>,
|
||||
<4 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
&gpioe {
|
||||
status = "okay";
|
||||
|
||||
/* power FDCAN2 XVCR*/
|
||||
mcu-sel-gpios {
|
||||
gpio-hog;
|
||||
gpios = <2 GPIO_ACTIVE_HIGH>,
|
||||
<4 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
&clk_lsi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&clk_hsi48 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&clk_hse {
|
||||
/delete-property/ hse-bypass;
|
||||
clock-frequency = <DT_FREQ_M(25)>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pll {
|
||||
div-m = <5>;
|
||||
mul-n = <192>;
|
||||
div-p = <2>;
|
||||
div-q = <4>;
|
||||
div-r = <4>;
|
||||
clocks = <&clk_hse>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pll2 {
|
||||
div-m = <2>;
|
||||
mul-n = <48>;
|
||||
div-p = <8>;
|
||||
div-q = <40>;
|
||||
div-r = <3>;
|
||||
clocks = <&clk_hse>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rcc {
|
||||
clocks = <&pll>;
|
||||
clock-frequency = <DT_FREQ_M(480)>;
|
||||
d1cpre = <1>;
|
||||
hpre = <2>;
|
||||
d1ppre = <2>;
|
||||
d2ppre1 = <2>;
|
||||
d2ppre2 = <2>;
|
||||
d3ppre = <2>;
|
||||
};
|
||||
|
||||
&usart1 {
|
||||
pinctrl-0 = <&usart1_tx_pb14 &usart1_rx_pb15>;
|
||||
pinctrl-names = "default";
|
||||
current-speed = <115200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usart2 {
|
||||
pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
|
||||
pinctrl-names = "default";
|
||||
current-speed = <115200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usart3 {
|
||||
pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb11>;
|
||||
pinctrl-names = "default";
|
||||
current-speed = <115200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-0 = <&uart4_tx_pb9 &uart4_rx_pb8>;
|
||||
pinctrl-names = "default";
|
||||
current-speed = <115200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usart6 {
|
||||
pinctrl-0 = <&usart6_tx_pc6 &usart6_rx_pc7>;
|
||||
pinctrl-names = "default";
|
||||
current-speed = <115200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
zephyr_udc0: &usbotg_fs {
|
||||
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>,
|
||||
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
pinctrl-0 = <&i2c3_scl_ph7 &i2c3_sda_ph8>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
clock-frequency = <I2C_BITRATE_FAST>;
|
||||
};
|
||||
|
||||
&timers12 {
|
||||
st,prescaler = <10000>;
|
||||
status = "okay";
|
||||
|
||||
pwm12: pwm {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&tim12_ch1_pb14>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
};
|
||||
|
||||
&adc1 {
|
||||
pinctrl-0 = <&adc1_inp15_pa3>;
|
||||
pinctrl-names = "default";
|
||||
st,adc-clock-source = <SYNC>;
|
||||
st,adc-prescaler = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rng {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fdcan1 {
|
||||
clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000100>,
|
||||
<&rcc STM32_SRC_PLL2_Q FDCAN_SEL(2)>;
|
||||
pinctrl-0 = <&fdcan1_tx_ph13 &fdcan1_rx_ph14>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fdcan2 {
|
||||
clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000100>,
|
||||
<&rcc STM32_SRC_PLL2_Q FDCAN_SEL(2)>;
|
||||
pinctrl-0 = <&fdcan2_rx_pb12 &fdcan2_tx_pb13>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mac {
|
||||
status = "okay";
|
||||
pinctrl-0 = <ð_rxd0_pc4
|
||||
ð_rxd1_pc5
|
||||
ð_ref_clk_pa1
|
||||
ð_crs_dv_pa7
|
||||
ð_tx_en_pg11
|
||||
ð_txd0_pg13
|
||||
ð_txd1_pg14>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&mdio {
|
||||
status = "okay";
|
||||
pinctrl-0 = <ð_mdio_pa2 ð_mdc_pc1>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
ethernet-phy@0 {
|
||||
compatible = "microchip,ksz8081";
|
||||
reg = <0x00>;
|
||||
status = "okay";
|
||||
microchip,interface-type = "rmii-25MHz";
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pb5>;
|
||||
pinctrl-names = "default";
|
||||
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
|
||||
};
|
||||
|
||||
&fmc {
|
||||
pinctrl-0 = <&fmc_nbl0_pe0
|
||||
&fmc_nbl1_pe1 &fmc_sdclk_pg8 &fmc_sdnwe_pc0 &fmc_sdcke0_pc3_c
|
||||
&fmc_sdne0_pc2_c &fmc_sdnras_pf11 &fmc_sdncas_pg15
|
||||
&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4
|
||||
&fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14
|
||||
&fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1
|
||||
&fmc_a14_pg4 &fmc_a15_pg5 &fmc_d0_pd14 &fmc_d1_pd15
|
||||
&fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9
|
||||
&fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13
|
||||
&fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9
|
||||
&fmc_d15_pd10>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
sdram {
|
||||
status = "okay";
|
||||
power-up-delay = <100>;
|
||||
num-auto-refresh = <8>;
|
||||
mode-register = <0x220>;
|
||||
refresh-rate = <0x603>;
|
||||
bank@1 {
|
||||
reg = <1>;
|
||||
st,sdram-control = <STM32_FMC_SDRAM_NC_8
|
||||
STM32_FMC_SDRAM_NR_12
|
||||
STM32_FMC_SDRAM_MWID_16
|
||||
STM32_FMC_SDRAM_NB_4
|
||||
STM32_FMC_SDRAM_CAS_3
|
||||
STM32_FMC_SDRAM_SDCLK_PERIOD_2
|
||||
STM32_FMC_SDRAM_RBURST_ENABLE
|
||||
STM32_FMC_SDRAM_RPIPE_0>;
|
||||
st,sdram-timing = <2 7 4 7 2 2 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
<dc {
|
||||
pinctrl-0 = <<dc_r0_pi15 <dc_r1_pj0 <dc_r2_pj1 <dc_r3_pj2
|
||||
<dc_r4_pj3 <dc_r5_pj4 <dc_r6_pj5 <dc_r7_pj6
|
||||
<dc_g0_pj7 <dc_g1_pj8 <dc_g2_pj9 <dc_g3_pj10
|
||||
<dc_g4_pj11 <dc_g5_pk0 <dc_g6_pk1 <dc_g7_pk2
|
||||
<dc_b0_pj12 <dc_b1_pj13 <dc_b2_pj14 <dc_b3_pj15
|
||||
<dc_b4_pk3 <dc_b5_pk4 <dc_b6_pk5 <dc_b7_pk6
|
||||
<dc_de_pk7 <dc_clk_pi14 <dc_hsync_pi10 <dc_vsync_pi9>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
disp-on-gpios = <&gpiod 7 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
ext-sdram = <&sdram1>;
|
||||
status = "okay";
|
||||
|
||||
clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00000008>,
|
||||
<&rcc STM32_SRC_PLL3_R NO_SEL>;
|
||||
|
||||
width = <480>;
|
||||
height = <272>;
|
||||
pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
|
||||
display-timings {
|
||||
compatible = "zephyr,panel-timing";
|
||||
de-active = <1>;
|
||||
pixelclk-active = <0>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
hsync-len = <1>;
|
||||
vsync-len = <10>;
|
||||
hback-porch = <43>;
|
||||
vback-porch = <12>;
|
||||
hfront-porch = <8>;
|
||||
vfront-porch = <4>;
|
||||
};
|
||||
def-back-color-red = <0xFF>;
|
||||
def-back-color-green = <0xFF>;
|
||||
def-back-color-blue = <0xFF>;
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
pinctrl-0 = <&sdmmc1_d0_pc8
|
||||
&sdmmc1_d1_pc9
|
||||
&sdmmc1_d2_pc10
|
||||
&sdmmc1_d3_pc11
|
||||
&sdmmc1_ck_pc12
|
||||
&sdmmc1_cmd_pd2>;
|
||||
pinctrl-names = "default";
|
||||
cd-gpios = <&gpiog 7 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
disk {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&flash0 {
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* 128KB for bootloader */
|
||||
boot_partition: partition@0 {
|
||||
label = "mcuboot";
|
||||
reg = <0x00000000 DT_SIZE_K(128)>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
/* storage: 128KB for settings */
|
||||
storage_partition: partition@20000 {
|
||||
label = "storage";
|
||||
reg = <0x00020000 DT_SIZE_K(128)>;
|
||||
};
|
||||
|
||||
/* application image slot: 256KB */
|
||||
slot0_partition: partition@40000 {
|
||||
label = "image-0";
|
||||
reg = <0x00040000 DT_SIZE_K(256)>;
|
||||
};
|
||||
|
||||
/* backup slot: 256KB */
|
||||
slot1_partition: partition@80000 {
|
||||
label = "image-1";
|
||||
reg = <0x00080000 DT_SIZE_K(256)>;
|
||||
};
|
||||
|
||||
/* swap slot: 128KB */
|
||||
scratch_partition: partition@c0000 {
|
||||
label = "image-scratch";
|
||||
reg = <0x000c0000 DT_SIZE_K(128)>;
|
||||
};
|
||||
|
||||
};
|
||||
};
|
21
boards/witte/linum/linum.yaml
Normal file
21
boards/witte/linum/linum.yaml
Normal file
|
@ -0,0 +1,21 @@
|
|||
identifier: linum
|
||||
name: Linum
|
||||
type: mcu
|
||||
arch: arm
|
||||
toolchain:
|
||||
- zephyr
|
||||
- gnuarmemb
|
||||
- xtools
|
||||
ram: 512
|
||||
flash: 2048
|
||||
supported:
|
||||
- uart
|
||||
- gpio
|
||||
- counter
|
||||
- i2c
|
||||
- pwm
|
||||
- netif:eth
|
||||
- spi
|
||||
- usb_device
|
||||
- can
|
||||
vendor: witte
|
23
boards/witte/linum/linum_defconfig
Normal file
23
boards/witte/linum/linum_defconfig
Normal file
|
@ -0,0 +1,23 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
# Enable MPU
|
||||
CONFIG_ARM_MPU=y
|
||||
|
||||
# Enable HW stack protection
|
||||
CONFIG_HW_STACK_PROTECTION=y
|
||||
|
||||
# Enable UART
|
||||
CONFIG_SERIAL=y
|
||||
|
||||
# Console
|
||||
CONFIG_CONSOLE=y
|
||||
CONFIG_UART_CONSOLE=y
|
||||
|
||||
# Enable GPIO
|
||||
CONFIG_GPIO=y
|
||||
|
||||
# Enable clocks
|
||||
CONFIG_CLOCK_CONTROL=y
|
||||
|
||||
# enable pin controller
|
||||
CONFIG_PINCTRL=y
|
21
boards/witte/linum/support/openocd.cfg
Normal file
21
boards/witte/linum/support/openocd.cfg
Normal file
|
@ -0,0 +1,21 @@
|
|||
source [find board/st_nucleo_h743zi.cfg]
|
||||
|
||||
reset_config srst_only srst_nogate connect_assert_srst
|
||||
|
||||
$_CHIPNAME.cpu0 configure -event gdb-attach {
|
||||
echo "Debugger attaching: halting execution"
|
||||
gdb_breakpoint_override hard
|
||||
}
|
||||
|
||||
$_CHIPNAME.cpu0 configure -event gdb-detach {
|
||||
echo "Debugger detaching: resuming execution"
|
||||
resume
|
||||
}
|
||||
|
||||
# Due to the use of connect_assert_srst, running gdb requires
|
||||
# to reset halt just after openocd init.
|
||||
rename init old_init
|
||||
proc init {} {
|
||||
old_init
|
||||
reset halt
|
||||
}
|
Loading…
Add table
Add a link
Reference in a new issue