boards: witte_technology: linum: add initial support

To the Linum board from Witte Technology based on STM32H753xx.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
This commit is contained in:
Felipe Neves 2024-07-26 14:59:57 -03:00 committed by Fabio Baltieri
commit 3d39644a2c
12 changed files with 908 additions and 0 deletions

10
boards/witte/index.rst Normal file
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.. _boards-witte:
Witte
#####
.. toctree::
:maxdepth: 1
:glob:
**/*

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# STM32H753ZI Linum board configuration
# Copyright (c) 2024 Felipe Neves
# SPDX-License-Identifier: Apache-2.0
if BOARD_LINUM
if NETWORKING
config NET_L2_ETHERNET
default y
endif # NETWORKING
endif # BOARD_LINUM

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# Copyright (c) 2024 Felipe Neves
# SPDX-License-Identifier: Apache-2.0
config BOARD_LINUM
select SOC_STM32H753XX

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# SPDX-License-Identifier: Apache-2.0
board_runner_args(jlink "--device=STM32H753BI" "--speed=4000")
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
board_runner_args(openocd --target-handle=_CHIPNAME.cpu0)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)

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board:
name: linum
vendor: witte
socs:
- name: stm32h753xx

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.. _linum:
Witte Technology Linum Board
############################
Overview
********
Linum is a development board released by Witte Tenology in 2023, and it was developed around the
STM32H753BI microcontroller. The board has 2 expansion connectors used by the LCD display with
touchscreen and another for access to other peripherals of microcontroller. Also it brings plenty
of communications interfaces like UART with RS232 and RS485 capabillities, CAN bus compatible to
FD standard, and networking over Ethernet.
.. image:: img/linum-stm32h753bi-top.jpg
:align: center
:alt: Linum development board
Hardware
********
The board features:
- 8 to 52V power supply
- SWD Pins for use as STLink (Pin header) and TC2030-IDC 6-Pin Tag-Connect Plug-of-Nails™ Connector
- Crystal for HS 25MHz
- Crystal for RTC 32.768KHz
- 1 UART serial for debug
- 1 Led RGB
- 1 Buzzer without internal oscillator
- 1 Mono audio up to 3W
- 1 Ethernet 10/100
- 1 MicroSD connector supporting 1 or 4-bit bus
- 1 USB 2.0 Host/Device
- 1 EEPROM memory with 512K bits
- 1 External SRAM memory with 8MB
- 1 NOR memory with 16MB
- 2 On-board RS232 Transceiver with RTS/CTS
- 2 On-board RS485 Transceiver
- 2 On-board CAN-FD Transceiver
Expansion connector 1 features:
- 1 Display RBG 888
- 1 Capacitive Touchscreen sensor
Expansion connector 2 features.
- 1 SPI
- 1 I2C
- 1 One Wire
- 2 DACs
- 6 PWM Channels
- 10 ADCs
Supported Features
==================
The Zephyr Linum board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| RTC | on-chip | counter |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| RNG | on-chip | True Random number generator |
+-----------+------------+-------------------------------------+
| ETHERNET | on-chip | ethernet |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| USB | on-chip | usb_device |
+-----------+------------+-------------------------------------+
| CAN/CANFD | on-chip | canbus |
+-----------+------------+-------------------------------------+
| LTDC | on-chip | LCD Interface |
+-----------+------------+-------------------------------------+
| FMC | on-chip | memc (SDRAM) |
+-----------+------------+-------------------------------------+
| SDMMC | on-chip | disk access |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/witte_technology/linum/linum_defconfig`
Default Zephyr Peripheral Mapping:
----------------------------------
BOARD-LEDs
----------
The LINUM-STM32H753BI has 3 software controllable LEDs.
======= =====
LED RGB PINS
======= =====
LED_R PG2
LED_G PG3
LED_B PB2
======= =====
UART/USART
----------
The LINUM-STM32H753BI used the USART1 for serial console.
USART1
------
====== =====
USART1 PINS
====== =====
TX PB14
RX PB15
====== =====
The LINUM-STM32H753BI board has two on-board RS-232 transceiver connected to USART2 and USART3.
====== =====
USART2 PINS
====== =====
TXD PD5
RXD PD6
CTS PD3
RTS PD4
====== =====
====== =====
USART3 PINS
====== =====
TXD PB10
RXD PB11
CTS PD11
RTS PD12
====== =====
The LINUM-STM32H753BI board has two on-board RS-485 transceiver connected to USART4 and USART6.
====== =====
UART4 PINS
====== =====
TXD PB9
RXD PB8
DE PA15
====== =====
====== =====
USART6 PINS
====== =====
TXD PC6
RXD PC7
DE PG12
====== =====
SDMMC
-----
The LINUM-STM32H753BI has one SDCard slot connected as below:
========== =====
SDMMC1 PINS
========== =====
SDMMC_D0 PC8
SDMMC_D1 PC9
SDMMC_D2 PC10
SDMMC_D3 PC11
SDMMC_DK PC12
========== =====
=============== =====
GPIO PINS
=============== =====
SDCARD_DETECTED PG7
SDCARD_PWR_EN PD7
=============== =====
ETHERNET
--------
The LINUM-STM32H753BI has a ethernet connection using the transceiver KSZ8081RNACA.
============ =====
ETH PINS
============ =====
ETH_REF_CLK PA1
ETH_MDIO PA2
ETH_CRS_DV PA7
ETH_MDC PC1
ETH_RXD0 PC4
ETH_RXD1 PC5
ETH_TX_EN PG11
ETH_TXD0 PG13
ETH_TXD1 PG14
ETH_CLK PA8
ETH_RESET PI4
============ =====
CAN-FD
------
The LINUM-STM32H753BI board has two on-board CAN-FD transceiver connected to FDCAN1 and FDCAN2.
====== =====
FDCAN1 PINS
====== =====
TXD PH13
RXD PH14
STD PI2
====== =====
====== =====
FDCAN2 PINS
====== =====
TXD PB13
RXD PB12
STD PE3
====== =====
USB
---
The LINUM-STM32H753BI has one usb port.
========= =====
USB PINS
========= =====
USB_VBUS PA9
USB_N PA11
USB_P PA12
USB_EN PI12
USB_FLT PI13
========= =====
I2C3
----
The LINUM-STM32H753BI connects the EEPROM memory and the touchscreen sensor to I2C3.
====== =====
I2C3 PINS
====== =====
SCL PH7
SDA PH8
====== =====
External SDRAM
--------------
The LINUM-STM32H753BI has a external SDRAM with 8Mbytes connected to FMC peripheral.
=========== =====
FMC PINS
=========== =====
FMC_A0 PF0
FMC_A1 PF1
FMC_A2 PF2
FMC_A3 PF3
FMC_A4 PF4
FMC_A5 PF5
FMC_A6 PF12
FMC_A7 PF13
FMC_A8 PF14
FMC_A9 PF15
FMC_A10 PG0
FMC_A11 PG1
FMC_BA0 PG4
FMC_BA1 PG5
FMC_D0 PD14
FMC_D1 PD15
FMC_D2 PD0
FMC_D3 PD1
FMC_D4 PE7
FMC_D5 PE8
FMC_D6 PE9
FMC_D7 PE10
FMC_D8 PE11
FMC_D9 PE12
FMC_D10 PE13
FMC_D11 PE14
FMC_D12 PE15
FMC_D13 PD8
FMC_D14 PD9
FMC_D15 PD10
FMC_NBL0 PE0
FMC_NBL1 PE1
FMC_SDCKE0 PC3
FMC_SDCLK PG8
FMC_SDNCAS PG15
FMC_SDNEO PC2
FMC_SDNRAS PF11
FMC_SDNWE PC0
=========== =====
LCD
---
The LINUM-STM32H753BI use the LTDC to support one LCD with RGB connection.
============= =====
LTDC PINS
============= =====
LTDC_B0 PJ12
LTDC_B1 PJ13
LTDC_B2 PJ14
LTDC_B3 PJ15
LTDC_B4 PK3
LTDC_B5 PK4
LTDC_B6 PK5
LTDC_B7 PK6
LTDC_CLK PI14
LTDC_DE PK7
LTDC_G0 PJ7
LTDC_G1 PJ8
LTDC_G2 PJ9
LTDC_G3 PJ10
LTDC_G4 PJ11
LTDC_G5 PK0
LTDC_G6 PK1
LTDC_G7 PK2
LTDC_HSYNC PI10
LTDC_R0 PI15
LTDC_R1 PJ0
LTDC_R2 PJ1
LTDC_R3 PJ2
LTDC_R4 PJ3
LTDC_R5 PJ4
LTDC_R6 PJ5
LTDC_R7 PJ6
LTDC_VSYNC PI9
PWM_BACKLIGHT PH6
============= =====
System Clock
------------
Linum H753ZI System Clock could be driven by an internal or external
oscillator, as well as the main PLL clock. By default, the System clock is
driven by the PLL clock at 480MHz, driven by an 25MHz high-speed external clock.
Programming and Debugging
*************************
Applications for the ``linum`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
.. note::
For debugging or programming Linum you will need to use an external debug
debug or flash tool and connect it to the SWD Connnector. JLink or ST-Link
probes are examples of out of the box compatible tools.
Flashing
========
Flashing an application to the Linum board
-------------------------------------------
Here is an example for the :ref:`hello_world` application.
Run a serial host program to connect with your Nucleo board.
.. code-block:: console
$ minicom -b 115200 -D /dev/ttyACM0
Build and flash the application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: linum
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! linum
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: linum
:maybe-skip-config:
:goals: debug
.. _Witte Linum website:
https://wittetech.com/

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/*
* Copyright (c) 2024 Felipe Neves
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <st/h7/stm32h753Xi.dtsi>
#include <st/h7/stm32h753bitx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Witte Technology STM32H753ZI Linum board";
compatible = "witte,linum";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,dtcm = &dtcm;
zephyr,code-partition = &slot0_partition;
zephyr,canbus = &fdcan1;
};
sdram1: sdram@c0000000 {
compatible = "zephyr,memory-region", "mmio-sram";
device_type = "memory";
reg = <0xc0000000 DT_SIZE_M(8)>;
zephyr,memory-region = "SDRAM1";
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
};
leds: leds {
compatible = "gpio-leds";
green_led: led_0 {
gpios = <&gpiog 2 GPIO_ACTIVE_LOW>;
label = "User LD1";
};
red_led: led_1 {
gpios = <&gpiob 2 GPIO_ACTIVE_LOW>;
label = "User LD2";
};
blue_led: led_2 {
gpios = <&gpiog 3 GPIO_ACTIVE_LOW>;
label = "User LD3";
};
};
aliases {
led0 = &green_led;
led1 = &blue_led;
};
};
&gpiod {
status = "okay";
/* power the SD card */
mcu-sel-gpios {
gpio-hog;
gpios = <7 GPIO_ACTIVE_HIGH>;
output-high;
};
};
&gpioi {
status = "okay";
/* power the ETH PHY , and FDCAN1 XVCR*/
mcu-sel-gpios {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>,
<4 GPIO_ACTIVE_HIGH>;
output-high;
};
};
&gpioe {
status = "okay";
/* power FDCAN2 XVCR*/
mcu-sel-gpios {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>,
<4 GPIO_ACTIVE_HIGH>;
output-high;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&clk_hse {
/delete-property/ hse-bypass;
clock-frequency = <DT_FREQ_M(25)>;
status = "okay";
};
&pll {
div-m = <5>;
mul-n = <192>;
div-p = <2>;
div-q = <4>;
div-r = <4>;
clocks = <&clk_hse>;
status = "okay";
};
&pll2 {
div-m = <2>;
mul-n = <48>;
div-p = <8>;
div-q = <40>;
div-r = <3>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(480)>;
d1cpre = <1>;
hpre = <2>;
d1ppre = <2>;
d2ppre1 = <2>;
d2ppre2 = <2>;
d3ppre = <2>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pb14 &usart1_rx_pb15>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart3 {
pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb11>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&uart4 {
pinctrl-0 = <&uart4_tx_pb9 &uart4_rx_pb8>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart6 {
pinctrl-0 = <&usart6_tx_pc6 &usart6_rx_pc7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&i2c3 {
pinctrl-0 = <&i2c3_scl_ph7 &i2c3_sda_ph8>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&timers12 {
st,prescaler = <10000>;
status = "okay";
pwm12: pwm {
status = "okay";
pinctrl-0 = <&tim12_ch1_pb14>;
pinctrl-names = "default";
};
};
&adc1 {
pinctrl-0 = <&adc1_inp15_pa3>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&rng {
status = "okay";
};
&fdcan1 {
clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000100>,
<&rcc STM32_SRC_PLL2_Q FDCAN_SEL(2)>;
pinctrl-0 = <&fdcan1_tx_ph13 &fdcan1_rx_ph14>;
pinctrl-names = "default";
status = "okay";
};
&fdcan2 {
clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000100>,
<&rcc STM32_SRC_PLL2_Q FDCAN_SEL(2)>;
pinctrl-0 = <&fdcan2_rx_pb12 &fdcan2_tx_pb13>;
pinctrl-names = "default";
status = "okay";
};
&mac {
status = "okay";
pinctrl-0 = <&eth_rxd0_pc4
&eth_rxd1_pc5
&eth_ref_clk_pa1
&eth_crs_dv_pa7
&eth_tx_en_pg11
&eth_txd0_pg13
&eth_txd1_pg14>;
pinctrl-names = "default";
};
&mdio {
status = "okay";
pinctrl-0 = <&eth_mdio_pa2 &eth_mdc_pc1>;
pinctrl-names = "default";
ethernet-phy@0 {
compatible = "microchip,ksz8081";
reg = <0x00>;
status = "okay";
microchip,interface-type = "rmii-25MHz";
};
};
&spi1 {
status = "okay";
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pb5>;
pinctrl-names = "default";
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
&fmc {
pinctrl-0 = <&fmc_nbl0_pe0
&fmc_nbl1_pe1 &fmc_sdclk_pg8 &fmc_sdnwe_pc0 &fmc_sdcke0_pc3_c
&fmc_sdne0_pc2_c &fmc_sdnras_pf11 &fmc_sdncas_pg15
&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4
&fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14
&fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1
&fmc_a14_pg4 &fmc_a15_pg5 &fmc_d0_pd14 &fmc_d1_pd15
&fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9
&fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13
&fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9
&fmc_d15_pd10>;
pinctrl-names = "default";
status = "okay";
sdram {
status = "okay";
power-up-delay = <100>;
num-auto-refresh = <8>;
mode-register = <0x220>;
refresh-rate = <0x603>;
bank@1 {
reg = <1>;
st,sdram-control = <STM32_FMC_SDRAM_NC_8
STM32_FMC_SDRAM_NR_12
STM32_FMC_SDRAM_MWID_16
STM32_FMC_SDRAM_NB_4
STM32_FMC_SDRAM_CAS_3
STM32_FMC_SDRAM_SDCLK_PERIOD_2
STM32_FMC_SDRAM_RBURST_ENABLE
STM32_FMC_SDRAM_RPIPE_0>;
st,sdram-timing = <2 7 4 7 2 2 2>;
};
};
};
&ltdc {
pinctrl-0 = <&ltdc_r0_pi15 &ltdc_r1_pj0 &ltdc_r2_pj1 &ltdc_r3_pj2
&ltdc_r4_pj3 &ltdc_r5_pj4 &ltdc_r6_pj5 &ltdc_r7_pj6
&ltdc_g0_pj7 &ltdc_g1_pj8 &ltdc_g2_pj9 &ltdc_g3_pj10
&ltdc_g4_pj11 &ltdc_g5_pk0 &ltdc_g6_pk1 &ltdc_g7_pk2
&ltdc_b0_pj12 &ltdc_b1_pj13 &ltdc_b2_pj14 &ltdc_b3_pj15
&ltdc_b4_pk3 &ltdc_b5_pk4 &ltdc_b6_pk5 &ltdc_b7_pk6
&ltdc_de_pk7 &ltdc_clk_pi14 &ltdc_hsync_pi10 &ltdc_vsync_pi9>;
pinctrl-names = "default";
disp-on-gpios = <&gpiod 7 GPIO_ACTIVE_HIGH>;
ext-sdram = <&sdram1>;
status = "okay";
clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00000008>,
<&rcc STM32_SRC_PLL3_R NO_SEL>;
width = <480>;
height = <272>;
pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
display-timings {
compatible = "zephyr,panel-timing";
de-active = <1>;
pixelclk-active = <0>;
hsync-active = <0>;
vsync-active = <0>;
hsync-len = <1>;
vsync-len = <10>;
hback-porch = <43>;
vback-porch = <12>;
hfront-porch = <8>;
vfront-porch = <4>;
};
def-back-color-red = <0xFF>;
def-back-color-green = <0xFF>;
def-back-color-blue = <0xFF>;
};
&sdmmc1 {
pinctrl-0 = <&sdmmc1_d0_pc8
&sdmmc1_d1_pc9
&sdmmc1_d2_pc10
&sdmmc1_d3_pc11
&sdmmc1_ck_pc12
&sdmmc1_cmd_pd2>;
pinctrl-names = "default";
cd-gpios = <&gpiog 7 GPIO_ACTIVE_LOW>;
status = "okay";
disk {
status = "okay";
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* 128KB for bootloader */
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(128)>;
read-only;
};
/* storage: 128KB for settings */
storage_partition: partition@20000 {
label = "storage";
reg = <0x00020000 DT_SIZE_K(128)>;
};
/* application image slot: 256KB */
slot0_partition: partition@40000 {
label = "image-0";
reg = <0x00040000 DT_SIZE_K(256)>;
};
/* backup slot: 256KB */
slot1_partition: partition@80000 {
label = "image-1";
reg = <0x00080000 DT_SIZE_K(256)>;
};
/* swap slot: 128KB */
scratch_partition: partition@c0000 {
label = "image-scratch";
reg = <0x000c0000 DT_SIZE_K(128)>;
};
};
};

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identifier: linum
name: Linum
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 512
flash: 2048
supported:
- uart
- gpio
- counter
- i2c
- pwm
- netif:eth
- spi
- usb_device
- can
vendor: witte

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# SPDX-License-Identifier: Apache-2.0
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable UART
CONFIG_SERIAL=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable GPIO
CONFIG_GPIO=y
# Enable clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y

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source [find board/st_nucleo_h743zi.cfg]
reset_config srst_only srst_nogate connect_assert_srst
$_CHIPNAME.cpu0 configure -event gdb-attach {
echo "Debugger attaching: halting execution"
gdb_breakpoint_override hard
}
$_CHIPNAME.cpu0 configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
# Due to the use of connect_assert_srst, running gdb requires
# to reset halt just after openocd init.
rename init old_init
proc init {} {
old_init
reset halt
}