Commit graph

1403 commits

Author SHA1 Message Date
Kumar Gala 1d605684ce drivers: usb: device: mcux_ehci: Convert driver to DT_INST macro
Convert from using dts_fixup.h based macros to DT_INST macro.  This lets
us remove the dependancy on dts_fixup.h for this driver.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-17 11:27:30 -05:00
Kumar Gala fbdeda9df2 dts: arm: remove DT_NUM_IRQ_PRIO_BITS and DT_NUM_MPU_REGIONS
We don't need to define DT_NUM_IRQ_PRIO_BITS or DT_NUM_MPU_REGIONS in
dts_fixup.h files anymore, so we can remove them.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-17 15:17:43 +02:00
Kumar Gala 5648df39ac arch: arm: cortex_m: Rework DT_NUM_IRQ_PRIO_BITS
To remove the need to have DT_NUM_IRQ_PRIO_BITS defined in every
dts_fixup.h we can just handle the few variant cases in irq.h.  This
allows us to remove DT_NUM_MPU_REGIONS from all the dts_fixup.h files.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-17 15:17:43 +02:00
Stephanos Ioannidis a399c90009 soc: atmel_sam0: Add GMAC fix-up for SAM D/E5x
This commit adds the MCLK clock configuration symbol fix-up for the
GMAC peripheral.

The APB-agnostic clock configuration fix-up symbols map to the
SoC-specific APB, in order to accommodate different SoC variants with
the GMAC on different APBs.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-17 04:56:28 -05:00
Gerson Fernando Budke f765e2300d soc: arm: atmel: Add sam4e gmac pins
Add sam4e gmac pin definitions to use ethernet driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-04-17 09:23:33 +03:00
Kumar Gala 7b6796ee79 soc: arm: nordic_nrf: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-15 11:17:32 -05:00
Paolo Teti 563990c9ce dts: stm32: G4: Add adc0 and adc1 nodes
Add adc0 and adc1 nodes for STM32G4X SoC series.

Signed-off-by: Paolo Teti <paolo.teti@gmail.com>
2020-04-15 08:26:28 -05:00
Erwan Gouriou c01c74c020 drivers/i2c: stm32: Use DT_NODELABEL_ macros
Make use of DT_NODELABEL macros to get device instances
information to configure drivers I2C instances.
This allows to remove I2C related lines in fixup.h files

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-04-15 08:21:30 -05:00
Erwan Gouriou 9580992b3e drivers/i2c: stm32: Configure driver by compatible
Use compatible information to configure i2c stm32.
With this, driver version selection is done thanks to compatible
and it is not needed anymore to do this via Kconfig symbol
selection under soc/

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-04-15 08:21:30 -05:00
Kumar Gala 43a7d26603 drivers: entropy: replace CONFIG_ENTROPY_NAME with DT macro
Replace CONFIG_ENTROPY_NAME with DT_CHOSEN_ZEPHYR_ENTROPY_LABEL.  We now
set zephyr,entropy in the chosen node of the device tree to the entropy
device.

This allows us to remove CONFIG_ENTROPY_NAME from dts_fixup.h.  Also
remove any other stale ENTROPY related defines in dts_fixup.h files.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-13 09:14:21 -05:00
Gerson Fernando Budke d4867ff058 dts: arm: atmel: sam3x: Fix SoC compatible
Atmel SAM3X is a Cortex-M3 SoC.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-04-13 07:34:05 -05:00
Kumar Gala d280660792 dts: i2c: Remove DT_I2C_._NAME references
Now that there are no users of DT_I2C_._NAME we can remove all the
defines in dts_fixup.h.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-10 15:11:18 -05:00
Kumar Gala 977cd7b588 soc: riscv: openisa_rv32m1: Add helper to get clock_ip_name from dts
Add a helper macro that will go from a DT_DRV_INST number and return the
clock_ip_name value for that instance.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-10 14:38:04 -05:00
Kumar Gala b263a3379c soc: riscv: openisa_rv32m1: Convert from Kconfig to DT_NODELABEL
As prep for drivers being converted to utilize DT_INST and removal of
per instance Kconfig symbols, move soc.c code to utilize DT_NODELABEL
instead.

Also rename various node labels to match the SoC docs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-10 14:38:04 -05:00
Daniel Leung b935903543 soc: mec1501: modifies interrupt restoration after deep sleep
z_power_soc_deep_sleep() is called with interrupt locked already
so restoring BASEPRI is pointless here, as it would only allow
exceptions afterwards. The situation is complicated by the fact
that kernel/idle.c:idle() only locks interrupt without unlocking
which means the BASEBRI at entry of z_power_soc_deep_sleep() is
already set to allow exceptions only but not lower priority
interrupts like timer. So when, e.g. timer, interrupt fires,
the SoC would come out of deep sleep but the waking interrupts
are never delivered since they are masked, and idle() will try
to sleep again. And now it gets into a loop of going into deep
sleep briefly and waking up immediately and it goes on and on.
The solution is not to restore BASEPRI and simply leave it at
zero. This is a workaround as a proper fix would involve
invasion changes to the PM subsystem.

Also, _sys_pm_power_state_exit_post_ops() is not being called
when deep sleep is involved, so PRIMASK needs to be reset
after coming out of deep sleep.

Fixes #23274

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-04-10 07:48:33 -04:00
Maureen Helm c5ef6dc73f boards: lpcxpresso54114: Enable i2c instance 4
Enables i2c instance 4 on the lpcxpresso54114 board. Configures pinmuxes
and clocks, and updates board documentation accordingly.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-04-09 08:52:13 -05:00
Maureen Helm ab949b023b boards: lpcxpresso55s69: Enable i2c instance 4
Enables i2c instance 4 on the lpcxpresso55s69 board. Configures pinmuxes
and clocks, and updates board documentation accordingly.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-04-09 08:52:13 -05:00
Maureen Helm ecd31dfd47 soc: nxp_lpc: Enable the mcux flexcomm i2c driver
Enables the mcux flexcomm i2c driver on lpc54xxx and lpc55xxx socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-04-09 08:52:13 -05:00
Daniel Leung 7b31f93980 xtensa: enable XTENSA_HAL at SoC level
This moves enabling XTENSA_HAL to the SoC definitions.
As Xtensa SoCs are highly configurable, it is possible
that the generic Xtensa HAL provided in the tree is
not suitable. So only enable XTENSA_HAL only if
the generic version can be used.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-04-08 13:10:35 -07:00
Serafin Leschke 2e5313dc56 soc: arm: st_stm32: stm32l0: Add RTC support
This commits adds support for the on chip RTC of the stm32l0 series

Signed-off-by: Serafin Leschke <serafin.leschke@bytesatwork.ch>
2020-04-08 12:18:16 -05:00
Martí Bolívar 4689822799 soc: nordic_nrf: validate base addresses with new DT API
Use the new devicetree API in a file which cross-checks dt reg base
addresses with values from the vendor HAL.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-04-07 08:00:29 -05:00
Dominik Ermel 143f9bfd4e drivers/flash/nrfx: Enable partial erase of flash
When enabled, instead of erasing entire flash page at once, page will
be erased in defined time slices. Erasing single page stalls CPU
for significant time share (~80ms) and partial erase divides the
operation in to the shorter time periods, resuming CPU operation in
meantime and enabling better scheduling of time sensitive operations.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2020-04-06 22:12:33 -04:00
Erwan Gouriou 7e1b1213d7 drivers/entropy: stm32: Enable driver based on compatible
To ease driver configuration, enable ENTROPY_STM32_RNG
only if device node  matching driver compatible is enabled.
No more need to enable config symbol under soc/


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-04-06 09:14:33 -05:00
Erwan Gouriou 92c4092283 drivers/entropy: stm32: Convert driver to dt based configuration
Convert stm32 entropy driver to configuration based on device tree.
Select HAS_DTS_ENTROPY symbols and configure CONFIG_ENTROPY_NAME
in fixup files.

Since rng node is not enabled (or available) on all boards, it could
happen that symbol ENTROPY_STM32_RNG is not enabled and hence
ENTROPY_HAS_DRIVER not selected which ends up with a symbol
ENTROPY_NAME defined throufg Kconfig selection. Thus, in fixup file,
CONFIG_ENTROPY_NAME is defined only if not already defined.

Additionally, update boards that used to configure entropy by default.
On these boards, enable rng device in device tree and remove Kconfig
related configuration (which should not be part of default
configuration).

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-04-06 09:14:33 -05:00
Andrzej Głąbek 97e4c0cbad drivers: entropy_nrf5: Use device name and IRQ priority from DTS
Instead of using Kconfig options for setting the device name and IRQ
priority for the entropy_nrf5 driver, get these settings from the rng
node defined in DTS for a given SoC.

Provide also fixups for CONFIG_ENTROPY_NAME, until applications using
entropy drivers are converted to use DTS as well.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-04-06 09:10:43 -05:00
Kumar Gala 6c6c1010bb drivers: counter: imx_epit: Convert driver to new DT_INST macros
Convert driver to use DT_INST macros and remove related board per
instance Kconfig symbol usage.

Also update counter_basic_api test to use DT_INST and remove the
udoo_neo_full_m4.conf as its not longer needed since the per instance
Kconfig sybmols don't exist anymore.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-04 09:34:00 -05:00
Kumar Gala 5ed7b7e487 drivers: ipm: ipm_imx: Convert driver to new DT_INST macros
Convert driver to use DT_INST macros.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-04 09:34:00 -05:00
Kumar Gala f4b61c5505 drivers: gpio: gpio_imx: Convert driver to new DT_INST macros
Convert driver to use DT_INST macros and remove related board per
instance Kconfig symbol usage.

Additionally remove udoo_neo_full_m4.conf from gpio_basic_api test since
the Kconfig symbols don't need to be set anymore.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-04 09:34:00 -05:00
Kumar Gala 7056c2304c drivers: serial: uart_imx: Convert driver to new DT_INST macros
Convert driver to use DT_INST macros and remove related board per
instance Kconfig symbol usage.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-04 09:34:00 -05:00
Kumar Gala e6a1dc9674 soc: arm: nxp_imx: Convert from Kconfig to DT_NODELABEL
As prep for drivers being converted to utilize DT_INST and removal of
per instance Kconfig symbols, move soc.c code to utilize DT_NODELABEL
instead.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-04 09:34:00 -05:00
Andrzej Głąbek 011e9bac0b drivers: nrf: Remove no longer suitable dependencies on Kconfig options
Make I2C and SPI drivers for nRF SoCs no longer dependent on Kconfig
options that enable instances (i.e. I2C_x and SPI_x). Now these drivers
enable hardware instances when corresponding nodes in devicetree are
enabled (have status "okay").
For I2C, SPI, and UART drivers, instead of using Kconfig dependencies
to prevent enabling of hardware instances that cannot be used together
(e.g. SPIM1 and TWIM1), a file that signals invalid configurations with
build assertions is added to compilation.
Also dependencies on HAS_HW_NRF_* options are removed from Kconfigs
of I2C, SPI, and UART drivers, as for hidden options that activate
proper type of driver such dependencies are not actually helpful.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-04-03 14:47:32 +02:00
Kumar Gala 1951c79db4 drivers: gpio: cmsdk_ahb: Convert driver to be full DTS based
Convert driver to utilize the new DT_INST macros completely and remove
associated Kconfig symbols that now come from devicetree.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-03 04:11:36 -05:00
Kumar Gala e0a1e07bbd soc: arm: beetle: Use DT_NODELABEL for arm,cmsdk-gpio references
Move to using DT_NODELABEL to get references to determine if specific
GPIO ports are enabled in the beetle SoC code.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-03 04:11:36 -05:00
Kumar Gala b108b7488e soc: arm: stm32l4: Remove Kconfig symbol GPIO_STM32_PORTH to fix build
Recent stm32 gpio driver changed removed the per port Kconfig symbols.
We had a type in flight issue in which the stm32l422xx got added and set
GPIO_STM32_PORTH.  Just remove the Kconfig symbol as its not needed
anymore to fix build issues.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-02 16:50:31 +03:00
Erwan Gouriou e26767fc06 drivers/gpio: stm32: Remove Kconfig based device declaration
Use device node declaration instead.
Clean up GPIO_STM32_PORT* Kconfig symbols.

On some boards some gpio ports where disabled using Kconfig symbols.
Disable them now via device tree nodes in boards dts files.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-04-02 06:50:05 -05:00
Erwan Gouriou c4de0d3b5b drivers: gpio: Use new DT macros for device driver init
Kconfig based device declaration is kept as is.
Clean up the fixup files.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-04-02 06:50:05 -05:00
Aurelien Jarno 1134edd6ad soc: arm: st_stm32: add support for STM32L422Xb
Add support for the STM32L422Xb SoC. Base stm32l422.dtsi on
stm32l412.dtsi to be able to add the crypto device later.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2020-04-02 10:37:14 +02:00
Kumar Gala 0be9d2b18d drivers: entropy: rv32m1_trng: Add DTS support to rv32m1_trng driver
Add a YAML, DTS node and driver support to utilize data from devicetree
for register address and driver name.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-02 09:30:58 +02:00
Frank Li 9162e7d812 kconfig: add CODE_SEMC for CODE_LOCATION
Add CODE_SEMC to support nxp-rt series
code run in external sdram.

Signed-off-by: Frank Li <lgl88911@163.com>
2020-04-01 16:51:55 -05:00
Arnaud Pouliquen 5c310521d1 stm32mp1: update resource table management
Rebase the resource table management to
the new implementation in open-amp module

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2020-04-01 09:21:15 -05:00
Kumar Gala b68039f0ed soc: arm: qemu_cortex_a53: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-31 19:28:47 -05:00
Andy Ross 7832738ae9 kernel/timeout: Make timeout arguments an opaque type
Add a k_timeout_t type, and use it everywhere that kernel API
functions were accepting a millisecond timeout argument.  Instead of
forcing milliseconds everywhere (which are often not integrally
representable as system ticks), do the conversion to ticks at the
point where the timeout is created.  This avoids an extra unit
conversion in some application code, and allows us to express the
timeout in units other than milliseconds to achieve greater precision.

The existing K_MSEC() et. al. macros now return initializers for a
k_timeout_t.

The K_NO_WAIT and K_FOREVER constants have now become k_timeout_t
values, which means they cannot be operated on as integers.
Applications which have their own APIs that need to inspect these
vs. user-provided timeouts can now use a K_TIMEOUT_EQ() predicate to
test for equality.

Timer drivers, which receive an integer tick count in ther
z_clock_set_timeout() functions, now use the integer-valued
K_TICKS_FOREVER constant instead of K_FOREVER.

For the initial release, to preserve source compatibility, a
CONFIG_LEGACY_TIMEOUT_API kconfig is provided.  When true, the
k_timeout_t will remain a compatible 32 bit value that will work with
any legacy Zephyr application.

Some subsystems present timeout (or timeout-like) values to their own
users as APIs that would re-use the kernel's own constants and
conventions.  These will require some minor design work to adapt to
the new scheme (in most cases just using k_timeout_t directly in their
own API), and they have not been changed in this patch, instead
selecting CONFIG_LEGACY_TIMEOUT_API via kconfig.  These subsystems
include: CAN Bus, the Microbit display driver, I2S, LoRa modem
drivers, the UART Async API, Video hardware drivers, the console
subsystem, and the network buffer abstraction.

k_sleep() now takes a k_timeout_t argument, with a k_msleep() variant
provided that works identically to the original API.

Most of the changes here are just type/configuration management and
documentation, but there are logic changes in mempool, where a loop
that used a timeout numerically has been reworked using a new
z_timeout_end_calc() predicate.  Also in queue.c, a (when POLL was
enabled) a similar loop was needlessly used to try to retry the
k_poll() call after a spurious failure.  But k_poll() does not fail
spuriously, so the loop was removed.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-03-31 19:40:47 -04:00
Andy Ross 32bb2395c2 timeout: Fix up API usage
Kernel timeouts have always been a 32 bit integer despite the
existence of generation macros, and existing code has been
inconsistent about using them.  Upcoming commits are going to make the
timeout arguments opaque, so fix things up to be rigorously correct.
Changes include:

+ Adding a K_TIMEOUT_EQ() macro for code that needs to compare timeout
  values for equality (e.g. with K_FOREVER or K_NO_WAIT).

+ Adding a k_msleep() synonym for k_sleep() which can continue to take
  integral arguments as k_sleep() moves away to timeout arguments.

+ Pervasively using the K_MSEC(), K_SECONDS(), et. al. macros to
  generate timeout arguments.

+ Removing the usage of K_NO_WAIT as the final argument to
  K_THREAD_DEFINE().  This is just a count of milliseconds and we need
  to use a zero.

This patch include no logic changes and should not affect generated
code at all.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-03-31 19:40:47 -04:00
Kumar Gala 99b7f1772d soc: arc: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-31 07:04:30 -05:00
Oleg Zhurakivskyy b1e1f64d14 global: Replace BUILD_ASSERT_MSG() with BUILD_ASSERT()
Replace all occurences of BUILD_ASSERT_MSG() with BUILD_ASSERT()
as a result of merging BUILD_ASSERT() and BUILD_ASSERT_MSG().

Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
2020-03-31 07:18:06 +02:00
Kumar Gala a92d61a316 soc: litex: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-30 12:49:43 -05:00
Arvid Rosén 76267051ee soc: nxp_imx: Fix type in linker.ld
Fix typo where DT_REG_ADDR was used istead of DT_REG_SIZE in
linker script for i.MX RT socs and their ITCM and DTCM memories.

Signed-off-by: Arvid Rosén <arvid@softube.com>
2020-03-30 08:03:38 -05:00
Vincent van der Locht bf46bee917 soc: sam4e: fix uart1 pinmap
UART1 Rx and Tx pins were assigned the wrong GPIO periperal.

Signed-off-by: Vincent van der Locht <vincent@vlotech.nl>
2020-03-28 10:16:42 -05:00
Jaron Kelleher c6fd99d048 api: irq: Add Multi-level IRQ utility functions
This adds utility functions to irq.h in accordance with zephyr's
multi-level irq numbering schema. Functions that are added will
get the zephyr IRQs level and provide function to return the
interrupt number at a particular level.

Fixes issue #20338

Signed-off-by: Jaron Kelleher <jkelleher@fb.com>
2020-03-28 07:12:30 -04:00
Kumar Gala 4192254ef2 dts: nios2: Add interrupt controller support in dts
Added properties to support the core interrupt controller on the NIOS2
cpu cores and enable that support for the NS16550 UART.

We rename some compatibles so that the cpu core compatibles is unique.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-27 15:16:53 -05:00
Henrik Brix Andersen 639ae0bcd7 soc: arm: nxp: ke1xf: add NXP Kinetis LPTMR
Indicate that the NXP Kinetis KE1xF SoC contains a Low Power Timer
(LPTMR) and default to enabling the corresponding driver if
CONFIG_COUNTER is enabled.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-03-27 11:17:58 -05:00
Kumar Gala 3300751082 soc: atmel_sam0: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-27 11:02:57 -05:00
Kumar Gala 120674660e soc: xtensa: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-27 10:06:14 -05:00
Kieran Levin acac1584bc drivers: serial: add dts peripherals to stm32g0
Added device tree nodes and associated headers for
defined uarts on the stm32g0 and stm32g07x 8x parts.

Tested with uart on stm32g071rb disco board with usart3 going to stlink.
Using shell.

Signed-off-by: Kieran Levin <ktl@frame.work>
2020-03-26 22:45:01 +01:00
Kumar Gala 1a0ba4c6ec soc: microchip_mec: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 16:31:52 -05:00
Kumar Gala 8e65c69bb4 soc: sifive: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 16:06:09 -05:00
Kumar Gala 3b24ab418a soc: st_stm32: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 12:22:12 -05:00
Kieran Levin 1b3410e197 soc: kconfig: move Kconfig.defconfig.stm32g071rb
use series designator instead

Signed-off-by: Kieran Levin <ktl@frame.work>
2020-03-26 09:39:10 -05:00
Kumar Gala 1229820504 soc: esp32: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 08:49:11 -05:00
Kumar Gala 64bd0951e4 soc: silabs: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 05:26:23 -05:00
Stephanos Ioannidis a033683783 arch: arm: aarch32: Rename cortex_r to cortex_a_r
This commit renames the `cortex_r` directory under the AArch32 to
`cortex_a_r`, in preparation for the AArch32 Cortex-A support.

The rationale for this renaming is that the Cortex-A and Cortex-R share
the same base design and the difference between them, other than the
MPU vs. MMU, is minimal.

Since most of the architecture port code and configurations will be
shared between the Cortex-A and Cortex-R architectures, it is
advantageous to have them together in the same directory.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-26 11:20:36 +01:00
Kumar Gala ecaf368f9d soc: cc13x2_cc26x2: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 05:20:19 -05:00
Kumar Gala 6143a628dd soc: nxp_lpc: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:40:09 -05:00
Kumar Gala 9acb2f9f1b soc: nxp_imx: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:40:09 -05:00
Kumar Gala d267ad1b22 soc: nxp_kinetis: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:40:09 -05:00
Kumar Gala e31026310d soc: x86: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:29:23 -05:00
Daniel Leung fb1e7a563c soc: intel_apl_adsp: add multi-processing support
This adds multi-processing support for Intel Apollo Lake ADSP.

Some of the start-up code is borrowed from ESP32.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung 8cce5d31ba soc: intel_apl_adsp: select CONFIG_ATOMIC_OPERATIONS_BUILTIN
The GCC 9.2 toolchain for intel_apl_adsp has builtin atomic
functions already so we can use that instead of the custom
one in arch. This allows the atomic function calls to be
inlined.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung 0ba204083d soc: intel_s1000: add SMP support
This adds SMP support for Intel S1000 SoC.

Some of the start-up code is borrowed from ESP32.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung ad2ee13c27 soc: intel_s1000: use EXCSAVE7 for CPU pointer
EXCSAVE2 is used for level 2 exception save location.
Since we are using level 2 interrupts, use EXCSAVE7
instead as level 7 interrupts are not being used
by the SoC.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung 3751c396cd soc: intel_s1000: use CAVS DSP wall clock timer for SMP
The DSP wall clock timer is a timer driven directly by
external oscillator and is external to the CPU core(s).
It provides a common and synchronized counter for all
CPU cores (which is useful for SMP), instead of
indepedently running local core timer (xtensa_timer).

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Vincent Wan b591bc0b94 soc: cc13x2_cc26x2: set SYS_PM_STATE_LOCK when power management is enabled
When power management is enabled, SYS_PM_STATE_LOCK is necessary
in order to prevent the power policy from automatically entering
certain sleep states.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-03-25 16:21:33 -04:00
Kumar Gala 9ede3c9a97 drivers: serial: uart_pl011: remove shared irq support
The shared irq support isn't needed in this driver.  We just need to
deal with the fact that some SoCs have only a single interrupt line and
some have three interrupts.  We can just ifdef that based on
DT_NUM_IRQS.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-25 08:34:40 -05:00
Giancarlo Stasi 2f3c3a65fd soc: arm: st_stm32: add support for STM32L462xE
Add support for the STM32L462xE SoC (AES not yet supported).

Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
2020-03-25 09:38:30 +01:00
Tomasz Bursztyka e68cec3614 soc: stm32: Add flash dts fixup for stm32f4
This was a simple missing macro, that prevented flash_shell to build
for stm32f4 based boards (which is weird, CI should have caught that
much earlier)

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-03-25 03:25:54 -05:00
Piotr Mienkowski 8a9df52943 drivers: gpio_gecko: convert to DT_INST defines
Convert the driver to use DT_INST_ defines, update all dependent dts,
soc and board files.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-03-24 10:14:21 -05:00
Piotr Mienkowski bdcfa4f375 soc: silabs_exx32: Add support for SiLabs EFR32BG13P SoC
This commit adds support for Silicon Labs EFR32BG13P (Blue Gecko) SoC.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-03-20 14:40:42 -05:00
Armand Ciejak f00843feff drivers: eth: eth_mcux: Add 2nd Ethernet controller to RT1060 device tree
Add eth1 in dtsi and defines for the second controller in fixup.

Signed-off-by: Armand Ciejak <armandciejak@users.noreply.github.com>
2020-03-20 10:55:04 +01:00
Kumar Gala 24fb6da4f3 soc: arc: snps_emsk: fix typo bug in DT define
DT_INST_{0,1}_NS16650 should be DT_INST_{0,1}_NS16550.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-19 17:12:39 -04:00
Parthiban Nallathambi b2d020bdbf soc: arm: nxp: kinetis: k6x: add K66F support
Add MK66F18 series support with MK66FN2M0VMD18 part.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
2020-03-19 15:58:08 -05:00
Parthiban Nallathambi 7dcffb6ccd soc: arm: nxp: kinetis: k6x: move clock defines
Rename the clock defines from k64 to K6X. This allows
inclusion of K66 series MCU's support without much
re-defines. Clock divider defaults to K64 series.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
2020-03-19 15:58:08 -05:00
Pooja Karanjekar b49501e3c9 drivers: entropy: gecko: add entropy driver based on GECKO TRNG
Add entropy driver based on GECKO TRNG module along with device
tree support for EFM32PG and EFR32MG SOCs.

Signed-off-by: Pooja Karanjekar <pooja.karanjekar@lemonbeat.com>
2020-03-19 15:45:01 -05:00
Carles Cufi 4b37a8f3a4 Revert "global: Replace BUILD_ASSERT_MSG() with BUILD_ASSERT()"
This reverts commit 8739517107.

Pull Request #23437 was merged by mistake with an invalid manifest.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2020-03-19 18:45:13 +01:00
Oleg Zhurakivskyy 8739517107 global: Replace BUILD_ASSERT_MSG() with BUILD_ASSERT()
Replace all occurences of BUILD_ASSERT_MSG() with BUILD_ASSERT()
as a result of merging BUILD_ASSERT() and BUILD_ASSERT_MSG().

Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
2020-03-19 15:47:53 +01:00
Erwan Gouriou d65e54da5e soc: stm32l4: Factorize includes declarations for GPIO driver
Group #include declarations for CONFIG_GPIO_STM32


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-03-19 15:27:09 +01:00
Takumi Ando 8d106d198e drivers: adc: Add STM32L1X ADC support
Add ADC driver support for STM32L1X SoC series.

Signed-off-by: Takumi Ando <takumi@t15.red>
2020-03-19 03:10:39 -05:00
Takumi Ando 5eb7862f7f soc: arm: stm32: Revert changes for ADC fixups
We need to define DT_ADC_1_NAME to use
generic ADC subsystems(ex. adc_shell).

Signed-off-by: Takumi Ando <takumi@t15.red>
2020-03-19 03:10:39 -05:00
Gerard Marull-Paretas 39b1f6cbba drivers: i2c: stm32: add support for H7 series
Enable I2C driver for STM32 H7 series.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-03-18 15:48:48 -05:00
Stephanos Ioannidis 4d778b789a soc: arm: xilinx_zynqmp: Use CMSIS-Core(R)
This commit updates the `xilinx_zynqmp` SoC initialisation code to use
the CMSIS-Core(R) features.

In addition, it also defines the Core IP revision value for the SoC as
specified in the Zynq UltraScale+ Device Technical Reference Manual.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-18 15:47:21 -05:00
Kumar Gala 47968e30cf drivers: spi: dw: handle flags differences in driver
Towards cleaning up (and hopefully removing dts_fixup.h in the near
future).  We need to move the handling of different names for the irq
flag propety into the driver and out of dts_fixup.h.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-17 19:37:59 -04:00
Kumar Gala 78ae42d86b drivers: gpio: dw: handle flags differences in driver
Towards cleaning up (and hopefully removing dts_fixup.h in the near
future).  We need to move the handling of different names for the irq
flag propety into the driver and out of dts_fixup.h.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-17 19:37:59 -04:00
Erwan Gouriou 9367c6ad3f drivers/usb: usb_dc_stm32: Convert to DT_INST
Convert usb_stm32 driver to use of DT_INST macros.

Since driver is compatible with 3 different dt compatibles and
compatible string is included in DT_INST macros, I've kept the
DT_USB_ compatible agnostic macros based on DT_INST ones, which
allowed to remove fixup definitions.
Use of DT_USB symbols is now limited to usb_dc_stm32.

Additionally, compatible "st,stm32-otgfs" is removed from list
of compatibles for usbotg_hs ips.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-03-17 11:03:10 -06:00
Erwan Gouriou 6275513051 drivers: serial: uart_stm32: convert to DT_INST defines
Convert driver to use DT_INST_ defines.
In the process, we've removed all UART/USART/LPUART code in
device instanciation code which had no impact.
Since all uart/usart/lpuart nodes declare compatibility with
st,stm32uart, DT_INST_X_ST_STM32_UART_FOO could be used.

Removed DT_UART fixup macros.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-03-17 11:03:10 -06:00
Erwan Gouriou c2f19dc52e drivers: spi: spi_stm32: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-03-17 11:03:10 -06:00
Erwan Gouriou ac516aa888 drivers: pwm: pmw_stm32: convert to DT_INST defines
Convert driver to use DT_INST_ defines.
Removed DT_FLASH_DEV fixup macros.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-03-17 11:03:10 -06:00
Erwan Gouriou 22af564f19 drivers: flash: flash_stm32: convert to DT_INST defines
Convert driver to use DT_INST_ defines.
Removed DT_FLASH_DEV fixup macros, except DT_FLASH_DEV_NAME
used in applications.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-03-17 11:03:10 -06:00
Erwan Gouriou f289a6f3be drivers: counter: rtc_stm32: convert to DT_INST defines
Convert driver to use DT_INST_ defines.
Removed DT_RTC_0 fixup macros but keep DT_RTC_NAME_0 as it is
still in use across RTC users.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-03-17 11:03:10 -06:00
Erwan Gouriou 0c9b537edf drivers: adc: adc_stm32: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-03-17 11:03:10 -06:00
Kumar Gala c44a4d84e0 drivers: watchdog: wwdg_stm32: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-03-17 11:03:10 -06:00
Øyvind Rønningstad 6492dcec6f soc: nrf53: soc: Add nrf53_has_erratum19()
And add assert on bootup if workarounds are not enabled.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-03-17 11:41:19 +01:00
Øyvind Rønningstad 1d5cb928dd soc: arm: Kconfig: Add config for NRF_SPU region sizes
Needs to be aware of the Kconfig NRF5340_CPUAPP_ERRATUM19.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-03-17 11:41:19 +01:00
Øyvind Rønningstad c5094b82f5 soc: arm: nrf53: defconfig: Add config for Erratum 19
Erratum 19: SPU region size is 32 kB instead of 16 kB.
The config should be used for alignment for data that must follow SPU
region boundaries, and to enable runtime checks when configuring SPU
regions.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-03-17 11:41:19 +01:00
Andrew Boie 80a0d9d16b kernel: interrupt/idle stacks/threads as array
The set of interrupt stacks is now expressed as an array. We
also define the idle threads and their associated stacks this
way. This allows for iteration in cases where we have multiple
CPUs.

There is now a centralized declaration in kernel_internal.h.

On uniprocessor systems, z_interrupt_stacks has one element
and can be used in the same way as _interrupt_stack.

The IRQ stack for CPU 0 is now set in init.c instead of in
arch code.

The extern definition of the main thread stack is now removed,
this doesn't need to be in a header.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-03-16 23:17:36 +02:00
Gerard Marull-Paretas ff8fea4ebb drivers: counter: stm32: enable support for H7 series
Enable counter driver support for H7 series. Tested with H743ZI MCU
using samples/drivers/counter/alarm.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-03-16 10:23:13 -05:00
Timo Teräs 6fd168e9a1 driver: uart: ns16550: convert to DT_INST_*
Change to code to use the automatically generated DT_INST_*
defines and remove the now unneeded configs and fixups.

Signed-off-by: Timo Teräs <timo.teras@iki.fi>
2020-03-14 02:22:05 +02:00
Timo Teräs e740818093 driver: uart: ns16550: convert custom init options to DTS flow control
The sole purpose of init options has been to enable hardware flow
control on NS16750 when asked. Use the proper DTS tags for this.

Signed-off-by: Timo Teräs <timo.teras@iki.fi>
2020-03-14 02:22:05 +02:00
Jose Alberto Meza 64f8aa9e0d soc: arm: microchip: Expose PECI feature on MEC1501 SoC
Define PECI_XEC feature.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-03-13 18:53:04 +02:00
Stephanos Ioannidis 685bf54829 soc: arm: qemu_cortex_a53: Use the refactored AArch64 interrupt system
This commit updates the `qemu_cortex_a53` platform to use the
refactored AArch64 interrupt system.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-13 09:59:59 +01:00
Stephanos Ioannidis 5ac617c817 soc: arm: xilinx_zynqmp: Use the refactored AArch32 interrupt system
This commit updates the `xilinx_zynqmp` platform to use the refactored
AArch32 interrupt system.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-13 09:59:59 +01:00
Vincent Wan c58d8fcb79 soc: ti_simplelink: system power management for cc13x2_cc26x2
Add support for sleep states. Sleep state 1 corresponds to idle mode,
and Sleep state 2 corresponds to standby mode, as per the Technical
Reference Manual.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-03-12 19:22:53 -06:00
Jukka Rissanen 0f1700a08b soc: arm: st_stm32: Add STM32F407XE
Add support for the STM32F407XE SoC.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-03-12 20:18:39 +02:00
Pooja Karanjekar 173f636426 soc: silabs_exx32: Make HFRCO frequency configurable
This commit adds an option to configure the frequency
in Hz for the HFRCO clock source. The default value
for this option is 0 which skips the configuration of the HFRCO.
This feature is supported for efm32gg, efm32jg, efm32pg, efm32fg
and efm32mg SOCs currently.

Signed-off-by: Pooja Karanjekar <pooja.karanjekar@lemonbeat.com>
2020-03-12 09:00:21 -05:00
Andrei Emeltchenko 767d1bb6f9 logging: log_backend_rb: Use int for memory area size
Change "hex" to "int" for LOG_BACKEND_RB_MEM_SIZE.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-03-12 13:31:24 +02:00
Andrei Emeltchenko f4357837af logging: Make ring buffer backend more general
Ring buffer in memory backend does not depends on xtensa adsp board,
so make it general: remove to log_backend_rb and remove dependency on
up_squared_adsp.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-03-12 13:31:24 +02:00
Kumar Gala 9213024696 drivers: gpio: stellaris: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-12 04:54:04 -06:00
Kumar Gala dbcd856dc1 drivers: ethernet: stellaris: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-12 04:54:04 -06:00
Kumar Gala aa98c7ba17 drivers: serial: pl011: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-12 04:53:30 -06:00
Andrei Gansari 3692da14ea soc: lpc55xxx define secure/non-secure core
Define secure related features on the lpc55xxx soc cores.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-03-12 12:24:12 +02:00
Andrei Gansari b833aa1136 soc: lpc55xxx mpu areas defined from dts
Number of MPU regions obtained from MPU.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-03-12 12:24:12 +02:00
Kumar Gala 4372efe4ef drivers: uart: miv: convert to DT_INST defines
Convert driver to fully use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 16:37:22 -06:00
Kumar Gala 836b485377 drivers: ethernet: e1000: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 16:36:21 -06:00
Kumar Gala df45e4df77 drivers: intc: ioapic: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 16:36:21 -06:00
Gerard Marull-Paretas f2b93fae5a soc: stm32: add support for stm32h743xx
Add support for STM32H743XX SoC series.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-03-11 17:10:58 +01:00
Daniel Leung 4700c93f3c soc: mec1501: wait for PLL to lock coming out of deep sleep
The 48MHz PLL on MEC1501 is shut off during deep sleep (i.e. heavy
sleep in datasheet). When coming out of deep sleep, this PLL needs
about 3ms to lock. Most peripherals are using this PLL as clock
source and timing would be off before PLL is locked. Example of
this is seen on serial console where garbage characters are sent
as the UART block is not pushing characters out at the configured
baud rate. This likely affects all other peripherals such as I2C
and eSPI. Luckily, there is a register to indicate whether the PLL
is ready. So spin on it when coming out of deep sleep.

Fixes #23207

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-11 10:13:41 -04:00
Kumar Gala 490494c58f drivers: entropy: sam: convert to DT_INST defines
Convert driver to use DT_INST_ defines.  The preferred defines for
drivers are DT_INST_.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala 70d78412f7 drivers: watchdog: sam: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala 76e0cf63b3 drivers: ps2: mchp_xec: convert to DT_INST defines
Convert driver to use DT_INST_ defines.  The preferred defines for
drivers are DT_INST_.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala c68a1d427d drivers: espi: mchp_xec: convert to DT_INST defines
Convert driver to use DT_INST_ defines.  The preferred defines for
drivers are DT_INST_.  The driver mostly used DT_INST_ defines but
a few IRQ priority defines needed conversion.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala 9a8831b781 drivers: counter: mchp_xec: convert to DT_INST defines
Convert driver to use DT_INST_ defines.  The preferred defines for
drivers are DT_INST_.

As part of this change we utilize the device tree for GIRQ info and
rename timer3 to 2 since we are doing this by instance number.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala d6b6ebe522 drivers: counter: mchp_xec: Fix dts prop type for max-value
The max-value should just be an int and not an array.  Change the type
to 'int' in the binding and fixup the driver to match.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala 61d30ed927 drivers: intc: plic: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala e2d71c9c77 driver: interrupt_controller: dw: convert to DT_INST defines
Convert driver to use DT_INST_ defines.  The preferred defines for
drivers are DT_INST_.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala 69c5aa0b32 driver: spi: dw: convert to DT_INST defines
Convert driver to use DT_INST_ defines.  The preferred defines for
drivers are DT_INST_.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala bdcf87956b driver: gpio: dw: convert to DT_INST defines
Convert driver to use DT_INST_ defines.  The preferred defines for
drivers are DT_INST_.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala 5d332c974e board: hsdk: Convert defines into dts for display
The ILITEK ILI9340 should have been in the dts and added as #defines in
dts_fixup.h.  Fix this by adding a display node in the dts.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala 0c7a5fdf1c drivers: usb: usb_dw: convert to DT_INST defines
Convert driver to use DT_INST_ defines.  The preferred defines for
drivers are DT_INST_.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala f91b4dbe94 drivers: dma: dma_dw: convert to DT_INST defines
Convert driver to use DT_INST_ defines.  The preferred defines for
drivers are DT_INST_.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala 3e6614a330 drivers: uart: msp432p4xx: convert to DT_INST defines
Convert driver to fully use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala 1b0e654aec drivers: i2c: nios2: convert to DT_INST defines
Convert driver to use DT_INST_ defines.  The preferred defines for
drivers are DT_INST_.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala e04a367408 drivers: mcux_rtc: convert to DT_INST defines
Convert driver to use DT_INST_ defines.  Replace dts_fixup.h use
for DT_RTC_0_NAME with DT_INST_0_NXP_KINETIS_RTC_LABEL to be
consistent.  Also, remove the aliases that had been used for this
driver in various nxp_k*.dtsi.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala a49de1543b drivers: entropy: mcux_trng: convert to DT_INST defines
Convert driver to use DT_INST_ defines.  The preferred defines for
drivers are DT_INST_.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala a9e68d61df drivers: clock_control: mcux_sim: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala a32eed06f7 drivers: clock_control: mcux_pcc: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala 6ad07b6a2a drivers: clock_control: mcux_mcg: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala ee53047aff drivers: clock_control: mcux_ccm: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala 41fcf784e9 drivers: mcux_gpt: convert to DT_INST defines
Convert driver to use DT_INST_ defines and remove Kconfig per instance
enablement in favor of DT_INST_ define existing.  Also, remove the
aliases that had been used for this driver in nxp_rt.dtsi.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Andrzej Głąbek 3e93f9f67d modules: hal: nordic: Fix translation of peripheral symbols
Update the hal_nordic module revision, to apply the following changes:

nrfx_config: Fix translation of symbols for _S or _NS only peripherals

For peripherals with only one type of access available (either secure
or non-secure), the common symbol translation scheme cannot be used
as it leads to mapping to non-existing symbols (e.g. NRF_FICR_NS).
Instead, use fixed translations for these symbols (e.g. NRF_FICR to
NRF_FICR_S, only for secure images).

nrfx_config: Add missing _S/_NS symbol translations for nRF5340/nRF9160

Add translations of names with _S and _NS suffixes for peripheral
access symbols that are available for a given chip but were not used
so far in any nrfx HAL or driver, to make the lists of translations
complete and consistent.

This commit corrects also the translation of NRF_I2S symbol for nRF5340
whose name for this SoC contains also the index 0 (so it needs to be
handled similarly like NRF_PDM0 is).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-03-10 17:21:27 +01:00
Gerard Marull-Paretas 5df13cb910 soc: arm: stm32: configure LDO supply on H7 init
Configure the LDO supply when initializing H7 (M7) SoC. I have
observed MCU hanging on LL_PWR_IsActiveFlag_VOS() wait loop when
doing a cold boot if LDO supply is not explicitely enabled.
According to the datasheet LDO should be enabled by default,
however HAL examples also configure LDO, so there may be a
reason to perform such step.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-03-10 10:22:08 -05:00
Paul M. Bendixen 878faa9e5a soc: arm: st_stm32 : Add stm32f303Xe version
Added stm32f303Xe based on the stm32f303Xc Kconfig

Signed-off-by: Paul M. Bendixen <paulbendixen@gmail.com>
2020-03-10 15:08:59 +02:00
Gerard Marull-Paretas 244ebb85bd soc: stm32: add support for stm32h750xx
Add support for STM32H750XX SoC.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-03-10 14:48:06 +02:00
Thomas Stranger a44e9f496e soc: stm32g0: Add support for STM32 IWDG
The driver for STM32's independent watchdog already exists and is
compatible with the stm32g0 SoC. Enable the independent watchdog
for the stm32g0 series for use with this driver.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2020-03-10 14:46:07 +02:00
Gerson Fernando Budke 1203547034 soc: arm: atmel: sam4s: Add missing symbols for usart
This add dts_fixup and soc_pinmap to enable usart serial driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-03-10 14:43:14 +02:00
Gerson Fernando Budke 2da3b0a7fd soc: arm: atmel: sam4s: Fix code align
Fix dts_fixup.h code align.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-03-10 14:43:14 +02:00
Francois Ramu abd8ca94c2 soc: arm: stm32g474 config device
This patch aligns the Kconfig.defconfig.stm32g474re to the
Kconfig.defconfig.stm32g431rb

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-03-09 17:26:40 +02:00
Daniel Leung 2ac3a85273 soc: mec1501: wait for UART FIFO clear before deep sleep
It is observed that after each test, weird characters appear on
console. This problem goes away if deep sleep is disabled.
The theory is that the CPU runs to deep sleep (_sys_suspend())
faster than UART can shift all the bits out. If we spin wait
for UART FIFO to clear, this is no longer an issue. This is
circumstantial evidence to the theory. So for now, put in
a workaround to spin wait for UART FIFO to clear before
going into deep sleep.

Relates to #22885

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-02-28 20:18:13 +02:00
Alexander Wachter b96477dd69 SoC: SAM3x and SAM4: Add the Flash Controller to the DT
This commit adds Device-Tree instances of the Flash controller
to the SAM3X, SAM4E and SAM4S series. The Flash-Controller
is used to get the unique device identifier.

Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
2020-02-27 21:14:54 +01:00
Alexander Wachter 4cfd4a707d SoC: stm32: Include LL utilities if HWINFO is selected
Include stm32XXxx_ll_utils.h in soc.h for every stm32 SoC,
if CONFIG_HWINFO_STM32 is selected.

Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
2020-02-27 21:14:54 +01:00
Ioannis Glaropoulos a062edd805 boards: arm: silabs_exx32: correct Kconfig option prompt
Fix a typo in the option prompt for Kconfig symbol
SOC_SERIES_EFM32GG11B.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-02-25 14:07:45 +02:00
Abhishek Shah f64cd1a5db soc: arm64: qemu-cortex-a53: Add MMU support
Add qemu-cortex-a53 memory regions with proper attributes
to translation tables. Minimal regions to execute "hello_world"
are added as of now, More granular memory regions should be
added later as per the requirement.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-02-20 17:24:59 +02:00
Gerson Fernando Budke 6ea8ae7a9a soc: arm: atmel: sam4e: Fix USART1 soc_pinmap
The USART1 soc_pinmap have wrong TXD1 pin definition. This fix port and
function definition.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-15 16:35:01 -06:00
Gerson Fernando Budke 09eab93889 soc: arm: atmel: sam4e: Add missing usart dts_fixup
Add mising dts_fixups symbols to allow enable usart driver. This fix
align code on dts_fixups too.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-15 16:35:01 -06:00
Ulf Magnusson 378d6b137a kconfig: Replace non-defconfig single-symbol 'if's with 'depends on'
Same deal as in commit eddd98f811 ("kconfig: Replace some single-symbol
'if's with 'depends on'"), for the remaining cases outside defconfig
files. See that commit for an explanation.

Will do the defconfigs separately in case there are any complaints
there.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-12 10:32:34 -06:00
Ulf Magnusson a42a42cd5a kconfig: Replace defconfig singe-symbol 'if's with 'depends on'
Same deal as in commit eddd98f ("kconfig: Replace some single-symbol
'if's with 'depends on'"), for all symbols defined within defconfig
files. See that commit for an explanation.

Maybe 'if's were used originally to mirror the 'if's in the main Kconfig
files, and then it got copied around by people assuming 'if' must work
differently from 'depends on'. It doesn't match in every spot at least.
Better to keep it simple and just consistently use 'depends on' when
it's a single symbol/choice I think. Helps reinforce that 'if' isn't
magic too.

Verified by printing all Kconfig menu nodes (symbols, choices, menus,
etc.) before and after the change and diffing (should show no
difference).

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-12 10:32:13 -06:00
Erwan Gouriou 9631709ca4 soc: stm32h7: Move PWR init code in soc init function
Move PWR init code out of clock control driver and
put SMPS related function under SMPS condition as it
is not supported by all soc variants of the series.

Fixes #22363

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-02-11 17:41:49 +02:00
Kumar Gala 28da5fdde7 sam0: flash: Fix build issue reported by flash_shell sample
The DT_FLASH_DEV_NAME define used by the sample was set to a define
symbol that was never generated.  Change it to use
DT_INST_0_ATMEL_SAM0_NVMCTRL_LABEL on the sam0 family of SoCs that
had this issue.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-08 10:29:28 -06:00
Ulf Magnusson c5839f834b kconfig: Remove assignments to CONFIG_<arch> syms and hide them
All board defconfig files currently set the architecture in addition to
the board and the SoC, by setting e.g. CONFIG_ARM=y. This spams up
defconfig files.

CONFIG_<arch> symbols currently being set in configuration files also
means that they are configurable (can be changed in menuconfig and in
configuration files), even though changing the architecture won't work,
since other things get set from -DBOARD=<board>. Many boards also allow
changing the architecture symbols independently from the SoC symbols,
which doesn't make sense.

Get rid of all assignments to CONFIG_<arch> symbols and clean up the
relationships between symbols and the configuration interface, like
this:

1. Remove the choice with the CONFIG_<arch> symbols in arch/Kconfig and
   turn the CONFIG_<arch> symbols into invisible
   (promptless/nonconfigurable) symbols instead.

   Getting rid of the choice allows the symbols to be 'select'ed (choice
   symbols don't support 'select').

2. Select the right CONFIG_<arch> symbol from the SOC_SERIES_* symbols.
   This makes sense since you know the architecture if you know the SoC.

   Put the select on the SOC_* symbol instead for boards that don't have
   a SOC_SERIES_*.

3. Remove all assignments to CONFIG_<arch> symbols. The assignments
   would generate errors now, since the symbols are promptless.

The change was done by grepping for assignments to CONFIG_<arch>
symbols, finding the SOC_SERIES_* (or SOC_*) symbol being set in the
same defconfig file, and putting a 'select' on it instead.

See
https://github.com/ulfalizer/zephyr/commits/hide-arch-syms-unsquashed
for a split-up version of this commit, which will make it easier to see
how stuff was done. This needs to go in as one commit though.

This change is safer than it might seem re. outstanding PRs, because any
assignment to CONFIG_<arch> symbols generates an error now, making
outdated stuff easy to catch.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-08 00:50:08 -06:00
Anas Nashif 73008b427c tracing: move headers under include/tracing
Move tracing.h to include/tracing/ to align with subsystem reorg.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-02-07 15:58:05 -05:00
Markus Fuchs 53e3c310b5 dts: arm: stm32f4: Add CRYP support for STM32F4xx SoC series
Add Cryptographic Accelerator support for STM32F415/417 and STM32F43x
devices.

Signed-off-by: Markus Fuchs <markus.fuchs@de.sauter-bc.com>
2020-02-07 10:45:51 -06:00
Andrei Emeltchenko a14cba891e soc: intel_apl_adsp: Remove LOG_IMMEDIATE default
Use standard log settings. Since default LOG_IMMEDIATE has changed to
output one character we have one character ring buffer slots which
limit amount of logs stored.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-02-06 15:39:23 +02:00
Andrei Emeltchenko 2eb257913a soc: intel_apl_adsp: Fix memory corruption
sizeof(sram) is the size of the whole structure.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-02-06 15:39:23 +02:00
Kumar Gala 6f51ef8a4c boards: em_starterkit: cleanup dts warnings
Fix the following device tree warnings:

unit-address and first reg (0x20000) don't match for iccm@0
unit-address and first reg (0x80010000) don't match for dccm@80000000

Since the em_starterkit_em7d_normal has a different base address for
iccm & dccm, and most of the em_starterkit variants have different sizes
for iccm & dccm.  Just define the nodes in the specific
em_starterkit*.dts file and remove them from emsk.dtsi.  This removes
the issue reported in the warning.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 17:10:54 -05:00
Kumar Gala b921955e44 boards: arc: nsim: cleanup dts warnings
Fix the following device tree warnings:

unit-address and first reg (0x40000) don't match for iccm@0
unit-address and first reg (0x80040000) don't match for dccm@80000000

Re-work iccm and dccm reg address and size to be based on #defines.
This allows the nsim_sem_normal.dts to override defaults that are set in
nsim.dtsi.  Utilize DT_ADDR macro to take a 'unit-address' still value
and convert it into a hex value (just prepending 0x).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 17:10:54 -05:00
Gerson Fernando Budke f3663292bc soc: arm: sam4s: Add spi driver support
Add device tree fixups and pinmap to enable spi driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-05 14:25:23 -06:00
Francois Ramu 612f29ee27 soc: arm: stm32g4 disable sleep mode
This patch allows successive reflashing operation
on nucleo_g431rb boards

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-02-05 13:48:15 -06:00
Johan Hedberg 31706c874e soc: xtensa: Add SoC definition for Audio DSP on Intel Apollolake
Create an SoC definition for the Audio DSP on Intel Apollolake

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2020-02-05 10:43:25 -05:00
Gerson Fernando Budke 49ccf28242 drivers: spi: sam: Add SPI CS soc_pinmap for sam4e soc
Add SPI CS soc_pinmap definitions to enable SPI driver on sam4e series.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-05 10:14:51 -05:00
Peter Bigot d869a6c766 drivers: gpio_imx: add support for pin validation
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.  Not all aliases appear to be present, but using instances breaks
because the ports used by different boards do not always start with
the first.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Daniel Leung 07cb01b079 x86: apollo_lake: changes GPIO definition in DTS
This breaks down the GPIO controller definition in DTS into
multiple entries. This allows these controllers to be
referenced by other DTS, and test board overlay files.
And also we can remove the entries in the dts fixup file.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-02-05 12:00:36 +01:00
Robert Winkler e8d0eb1db1 drivers: gpio: Add LiteX GPIO driver
This commits adds GPIO driver for LiteX SoC builder.

Due to the fact that GPIO in LiteX is unidirectional and can be
configured with different pins amount per port, additional entries
were added to the dts file.

Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
2020-02-05 12:00:36 +01:00
Gerson Fernando Budke 4a5de7bb87 soc: arm: atmel: Add sam4e mcu
Add sam4e related soc files.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 17:51:41 -05:00
Gerson Fernando Budke f21aaeffaa soc: atmel: sam: Add spi pinmap
This add SPI pinmap definitions to spi0/1 for SAMV71 series.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 14:55:45 -05:00
Gerson Fernando Budke 7422cff736 drivers: spi: sam: Enable generic config
The current sam spi driver uses soc dependent name which duplicate
configuration to enable other platforms. This refactor current
definitions to a generic way to reuse symbols by multi soc definitions.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 14:55:45 -05:00
Gerson Fernando Budke 9e52789054 soc: arm: atmel: Add samv71 mcu
Add samv71 related soc files.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 08:56:19 -06:00
Henrik Brix Andersen a28f8fbef5 soc: arm: nxp: ke1xf: add option for keeping watchdog enabled at boot
Add option for keeping the watchdog timer of the NXP Kinetis KE1xF SoC
series enabled at boot with a configurable, initial timeout.

This removes the risk of failure from when z_arm_watchdog_init()
disables the watchdog timer until the application code configures a
timeout and re-enables the watchdog timer.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-02-03 14:58:01 -08:00
Kumar Gala 9897c3b0dd libc: Move xtensa reentrant syscall impl to common libc-hooks
The xcc specific reentrant syscall implementations are actually useful
for xtensa in general.  So move that code from being specific to
intel_s1000 / xcc into generic newlib/libc-hooks.c.  This is in prep
for the Zephyr SDK dropping -DMISSING_SYSCALL_NAMES which will make
its version of newlib on xtensa match behavior with xcc.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-03 14:57:10 -06:00
Oane Kingma fff0a2b5e7 dts / boards / soc: Add support for SiLabs Gecko watchdog
This commit adds the following:
- device tree bindings for Gecko watchdog driver
- EFM32PG SOC support for the watchdog driver
- EFM32PG board support for the watchdog driver
- DTS aliases for testing with default watchdog driver test

Signed-off-by: Oane Kingma <o.kingma@interay.com>
2020-02-03 11:25:40 -08:00
Carlo Caione 0958673ee1 arch: arm64: Enable shared IRQ line for UART
Enable the shared IRQ for the UART line and enable the remaining tasks
that depends on a separated declaration of the TX/RX/Err/... IRQs.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Carlo Caione a61290e1a3 arch: arm64: Add support for qemu_cortex_a53 board
This patch introduces support for the qemu_cortex_a53 board emulated
using QEMU (virt platform) adding SoC, board and DTS files.

| ./scripts/sanitycheck -p qemu_cortex_a53
|
| Total complete:  190/ 190  100%  skipped:   40, failed:    0
| 150 of 150 tests passed (100.00%), 0 failed,
|     40 skipped with 0 warnings in 580.93 seconds

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Anas Nashif aa14022c8a intel_s1000: various fixes for build errors
Lot of misdefined variables that went in undetected due to lack of CI on
this board. Fix them and test build with new SDK.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-31 14:51:37 -05:00
Ivo Clarysse 0c8a99582e dts: arm: stm32f4: add CAN_2 controller
Add the CAN controller device tree node for CAN_2 of the STM32F4 SoC
series.

Signed-off-by: Ivo Clarysse <ivo@bcdevices.com>
2020-01-30 14:27:28 -05:00
Christian Taedcke fbbf68d63c soc: silabs_exx32: Support all gpio ports on efm32jg and efm32pg
This commit adds the remaining gpio ports I, J and K to the device
tree and dts_fixup headers of the EFM32JG12B and EFM32PG12B SoCs.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2020-01-30 09:15:53 -06:00
Benjamin Valentin 6fd08da96a soc: atmel_sam0: remove CONFIG_ENTROPY_NAME from dts_fixup.h
It's not needed anymore and causes build failures.

Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2020-01-30 08:44:30 -06:00
Benjamin Valentin 9f548b94cd soc: atmel_sam0: remove obsolete include
`cortex_m/exc.h` is not needed anymore and ceased to exist.

Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2020-01-30 08:44:30 -06:00
Francois Ramu 4ef62a2db7 soc: arm: st_stm32: configure stm32g431 series
This patch cleans the defconfig of the STM32G431
     device from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-01-30 08:30:15 -06:00
Francois Ramu fafd20ca93 soc: arm: st_stm32: add stm32g474 series
This patch introduces the support of the STM32G474
     device from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-01-30 08:30:15 -06:00
Christian Taedcke 4ead400d79 arm: exx32: Add Silabs EFM32JG12B soc files
The Silicon Labs EFM32 Jade Gecko MCU includes:

    * Cortex-M3 core at 40MHz
    * up to 1024KB of flash and 256KB of RAM
    * multiple low power peripherals

This is basically the same as the EFM32 Pearl Gecko, but with an ARM
Cortex-M3 core instead of a Cortex-M4F.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2020-01-30 07:06:54 -06:00
Scott Branden 54ce0b2d34 arm: Add Broadcom Valkyrie SoC support
Add initial support for Broadcom Valkyrie SoC as part of Zephyr.

Signed-off-by: Scott Branden <scott.branden@broadcom.com>
2020-01-30 03:54:01 -06:00
Henrik Brix Andersen be3cb485eb soc: arm: nxp: kinetis: disable watchdog init if bootloader is enabled
Disable the early watchdog initialization for the NXP Kinetis series
if the application is to be chain-loaded by mcuboot.

The early watchdog initialization must only take place once and needs
to happen within a SoC specific number of CPU clock cycles after
reset.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-29 15:12:24 -06:00
Henrik Brix Andersen 282d85c3f4 soc: arm: nxp: kinetis: unify CONFIG_WDOG_INIT Kconfig option
Move CONFIG_WDOG_INIT for the NXP Kinetis series to the top-level
Kinetis Kconfig file and enable it where needed.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-29 15:12:24 -06:00
Henrik Brix Andersen 9523f792da soc: nxp: kinetis: kw4xz: move watchdog init to z_arm_watchdog_init
Move the NXP Kinetis KW4xZ watchdog initialization code to
z_arm_watchdog_init() and make it optional based on CONFIG_WDOG_INIT.

This brings the KW4xZ in line with the other NXP Kinetis series SoC
implementations.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-29 15:12:24 -06:00
Henrik Brix Andersen f9f7379549 soc: nxp: kinetis: kl2x: move watchdog init to z_arm_watchdog_init
Move the NXP Kinetis KL2x watchdog initialization code to
z_arm_watchdog_init() and make it optional based on
CONFIG_WDOG_INIT.

This brings the KL2x in line with the other NXP Kinetis series SoC
implementations.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-29 15:12:24 -06:00
Kwon Tae-young 271bd8bcea soc: stm32l1: Add support for STM32 IWDG
The driver for STM32's independent watchdog already exists and is
compatible with the stm32l1 SoC. Enable the independent watchdog
for the stm32l1 series for use with this driver.

Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2020-01-29 11:20:57 -06:00
Ulf Magnusson 1b394ad153 soc: ti_simplelink: kconfig: Refactor CCFG flash block handling
Instead of having TI_CCFG_PRESENT as a symbol that's only defined in
soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.defconfig.series and y when
SOC_SERIES_CC13X2_CC26X2 is enabled, turn it into a helper symbol that's
selected by SOC_SERIES_CC13X2_CC26X2.

This avoids having a symbol that's only defined in a Kconfig.defconfig
file, which is confusing. It also makes things a bit more generic, in
case other boards with CCFGs are added.

Also rename it to HAS_TI_CCFG to be consistent with other helper
symbols, and add a help text.

Flagged by scripts/kconfig/lint.py.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-29 09:41:46 -06:00
Krzysztof Chruscinski 510102dd71 soc: arm: nordic_nrf: nrf52: Add workaround for anomaly 132
Added delay before starting low frequency clock for the first time to
ensure that anomaly conditions are not met. Delay is configurable and
might be disabled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-01-29 15:38:55 +01:00
Andrzej Głąbek 01648cc099 Revert "soc: nrf5340: Fix busy waiting on nRF5340 application core"
This reverts commit 49bd19f3f2,
as the patch it contains is no longer needed after nrfx is updated
to version 2.1.0.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-01-29 15:00:45 +01:00
Andrzej Głąbek 7899b1f5b6 modules: hal_nordic: Update nrfx to version 2.1.0
Update the hal_nordic module revision, to switch to nrfx 2.1.0.

Because the list of peripherals for nRF5340 has changed as follows:
- SPIM2 has been renamed to SPIM4
- SPIM2-3, SPIS2-3, TWIM2-3, TWIS2-3, and UARTE2-3 have been added
a couple of related corrections needed to be applied in dts and Kconfig
files, plus the spi_nrfx_spim driver has been extended with the support
for SPIM4.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-01-29 15:00:45 +01:00
Henrik Brix Andersen 5a82424767 dts: arm: stm32f3: add can controller
Add the CAN controller device tree node for CAN_1 of the STM32F3 SoC
series.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-29 09:47:27 +01:00
Tomasz Bursztyka fb76ddfda3 soc/xtensa: Removing useless USB definitions for Intel s1000
These information are now provided through DTS.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka 1925b501a8 soc/xtensa: Configuring the DW USB DT aliases in Intel s1000
These aliases will be used by the DW driver.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka c82e629fd3 soc/xtensa: Removing useless DMA definitions for intel s1000
These information are now provided through DTS.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka 8d10e66371 drivers/interrupt-controller: Make irqs DT configured in DW
DesignWare driver can manage different amount of irqs so let's make it
configurable via DTS.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka 4b94668f5b drivers/interrupt_controller: Normalize DT aliases consitently for DW
DT_<domain>_DW_<num>_<option> as for SPI, GPIO, DMA etc...

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka f5a9d5d1a5 driver/spi: Make DT aliases consistent for the DW drivers
And apply it on all existing fixups.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka 8151a4e253 soc/xtensa: Generate 2 other DW DMA DT aliases from DTS options
2 other DMA instances exist along with the first one.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka df7df5b89a soc/xtensa: Generate DW DMA DT aliases from DTS options
Such aliases are necessary since different instance could be configured
as well.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Sarvesh Patkar 4f2c107389 drivers: flash: stm32: Update flash driver implementation
Remove soc/arm/st_stm32/stm32YY/flash_registers.h files.
Change register accesses in stm32 flash drivers to use FLASH_TypeDef
from modules/hal/stm32/stm32cube/stm32YYxx/soc/stm32xxxxxx.h.

Fixes #16235

Signed-off-by: Sarvesh Patkar <psarvesh314@gmail.com>
2020-01-28 15:30:12 -06:00
Yasushi SHOJI db74b949b0 boards: posix: Fix a typo
It's a trivial fix for a typo in the comment.

Signed-off-by: Yasushi SHOJI <y-shoji@ispace-inc.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-28 15:44:21 -05:00
Yasushi SHOJI d5fcf366ee soc: posix: Fix function name typo
It's a trivial fix for a typo in the comment.

Signed-off-by: Yasushi SHOJI <y-shoji@ispace-inc.com>
2020-01-28 15:44:21 -05:00
Francois Ramu 25700ace0a soc: arm: stm32: define the heap size when enabling dma feature
when DMA IP is enabled on stm32 series,
the heap size must be configured to large value
because of dma channels configuration.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-01-28 12:58:44 -06:00
Jose Alberto Meza 592e0afdf3 soc: arm: microchip: Update fixup for priorities
Avoid exposing unnecessary details for eSPI IRQ priorities.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-01-28 20:13:36 +02:00
Jonas Eriksson 3e64e751b6 soc: stm32f1: Add support for stm32f1xx SoCs
Define stm32f100xx family, tested using stm32vl_disco
(stm32f100rb).

Signed-off-by: Jonas Eriksson <jonas@upto.se>
2020-01-28 08:30:52 -06:00
Ulf Magnusson cf89ba33ea global: Fix up leading/trailing blank lines in files
To make the updated test in
https://github.com/zephyrproject-rtos/ci-tools/pull/121 clean, though it
only checks modified files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-27 17:41:55 -06:00
Peter Bigot 02ae343100 treewide: use full path to uart.h header
The build infrastructure should not be adding the drivers subdirectory
to the include path.  Fix the legacy uses that depended on that
addition.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-01-26 17:52:12 +01:00
Peter Bigot 5e470ec3bf treewide: use full path to gpio/gpio_mmio32.h header
The build infrastructure should not be adding the drivers subdirectory
to the include path.  Fix the legacy uses that depended on that
addition.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-01-26 17:52:12 +01:00
Henrik Brix Andersen cd28b0b6d2 soc: arm: nxp: ke1xf: remove unused SPI dts fixups
Remove unused SPI device tree fixups from the NXP KE1xF SoC.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-24 21:31:25 -05:00
Ulf Magnusson d28e1f6bcb kconfig: Turn pointless 'menuconfig's into 'config's
Same deal as in commit 677f1e6 ("config: Turn pointless/confusing
'menuconfig's into 'config's"), for a newly-introduced stuff.

Also clean up headers to be consistent with recent cleanups.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-24 21:30:17 -05:00
Oane Kingma e91da4ae45 soc/arm/silabs_exx32: Add support for EFM32GG11B SoC
This commit adds support for the Silicon Labs EFM32GG11B
series of SoCs.

Signed-off-by: Oane Kingma <o.kingma@interay.com>
2020-01-24 10:28:33 -06:00
Benjamin Valentin 2539a1751d soc: atmel_sam0: update dts_fixup.h for TRNG
Update dts_fixup.h to re-use the SAM TRNG driver.

Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
2020-01-23 12:40:59 +01:00
Øyvind Rønningstad 05f0d85b6a extensions.cmake: Replace TEXT_START with ROM_START
In zephyr_linker_sources().
This is done since the point of the location is to place things at given
offsets. This can only be done consistenly if the linker code is placed
into the _first_ section.

All uses of TEXT_START are replaced with ROM_START.

ROM_START is only supported in some arches, as some arches have several
custom sections before text. These don't currently have ROM_START or
TEXT_START available, but that could be added with a bit of refactoring
in their linker script.

No SORT_KEYs are changed.

This also fixes an error introduced when TEXT_START was added, where
TEXT_SECTION_OFFSET was applied to riscv's common linker.ld instead of
to openisa_rv32m1's specific linker.ld.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-01-23 03:22:59 -08:00
Ulf Magnusson 77743741e6 soc: psoc6: kconfig: Do not select CPU_CORTEX_M_HAS_DWT on Cortex-M0
CPU_CORTEX_M_HAS_DWT depends on

    !CPU_CORTEX_M0 && !CPU_CORTEX_M0PLUS

, but SOC_SERIES_PSOC62 unconditionally selects it, even for
SOC_PSOC6_M0. This forces CPU_CORTEX_M_HAS_DWT on on Cortex-M0.

Fix it by moving the selects for CPU capabilities to the more specific
SOC_PSOC6_{M0,M4} symbols. This seems more readable than adding a
condition to the 'select CPU_CORTEX_M_HAS_DWT'.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-23 09:39:01 +01:00
Robert Lubos 65ec2d9701 boards: nrf52811_pca10056: Enable nRF 802.15.4 driver by default
nrf52811_pca10056 board should enable nRF 802.15.4 radio driver
automatically when 802.15.4 subsystem is enabled, as other Nordic
802.15.4-compliant boards do.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-01-22 14:58:40 +01:00
Henrik Brix Andersen 75549fc560 soc: arm: nxp: kinetis: k6x: enable RTC device
Enable the RTC counter present in the NXP K6x SoC if CONFIG_COUNTER is
enabled. Add the needed dts fixup for the RTC device.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-22 06:27:30 -06:00
Antony Pavlov fc1cdf233d soc: arm: stm32l1: Add STM32L152Xe stuff
The STM32L151 and STM32L152 differ in that
the STM32L152 features an LCD controller.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2020-01-20 18:08:43 -06:00
Ioannis Glaropoulos 7fee3efd99 soc: arm: remove explicit selection of already selected symbols
CPU_CORTEX_M_HAS_SYSTICK and CPU_CORTEX_M_HAS_VTOR do not need
to be explicitely selected in SoC/Boards definitions of
platforms implementing the Cortex-M mainline architecture; they
are already selected by ARMV7_M_ARM8_M_MAINLINE Kconfig symbol.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-01-20 17:23:42 -05:00
Ioannis Glaropoulos 1d60bca3fe soc: arm: arm: Select CPU DWT feature symbol for ARM Cortex-M SoCs
The Data Watchpoint and Trace (DWT) is an optional debug unit
for the Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+)
that provides watchpoints, data tracing and system profiling
capabilities. We select it for the ARM Cortex-M SoCs
- Beetle
- Musca A, Musca B
since it is present in these SoCs.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis 155c1f5ffe soc: arm: ti_simplelink: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis 4cef583dc7 soc: arm: ti_lm3s6965: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis 88d79a49d2 soc: arm: st_stm32: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis f9453832aa soc: arm: silabs_exx32: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis d658883a7c soc: arm: nxp_lpc: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis 09843584ec soc: arm: nxp_kinetis: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis 16bb973044 soc: arm: nxp_imx: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis 8095cafaa1 soc: arm: nordic_nrf: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis 3d7deff3fb soc: arm: microchip_mec: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis 02090592ab soc: arm: psoc6: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Stephanos Ioannidis d32546fb7e soc: arm: atmel_sam: Select CPU DWT feature symbol
The Data Watchpoint and Trace (DWT) is an optional debug unit for the
Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides
watchpoints, data tracing and system profiling capabilities.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-20 14:05:47 +01:00
Kumar Gala b1602c8e39 arm: Removed support for CC2650
The SoC, driver, and board support for the CC2650 and CC2650 Sensortag
aren't currently supported and we are removing them as such.  If anyone
is interesting in supporting this platform we can easily recovery it
from git.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-01-18 09:27:55 -06:00
Ulf Magnusson 4e85006ba4 dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf}
generated_dts_board.h is pretty redundant and confusing as a name. Call
it devicetree.h instead.

dts.h would be another option, but DTS stands for "devicetree source"
and is the source code format, so it's a bit confusing too.

The replacement was done by grepping for 'generated_dts_board' and
'GENERATED_DTS_BOARD'.

Two build diagram and input-output SVG files were updated as well, along
with misc. documentation.

hal_ti, mcuboot, and ci-tools updates are included too, in the west.yml
update.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-17 17:57:59 +01:00
Henrik Brix Andersen 774367b14a soc: nxp: k6x: enable bandgap buffer if temperature sensor is enabled
Enable the bandgap buffer on the NXP Kinetis K6x SoC series Power
Management Controller (PMC) if the internal temperature sensor is in
use.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-16 17:30:42 -06:00
Roland Ma b0bdf91e11 boards: arm: Add board definition for stm32 nucleo_f767zi
Added board definition additions for stm32 nucleo_f767zi
board.

Signed-off-by: Roland Ma <rolandma@yahoo.com>
2020-01-16 22:51:13 +01:00