drivers/entropy: stm32: Convert driver to dt based configuration
Convert stm32 entropy driver to configuration based on device tree. Select HAS_DTS_ENTROPY symbols and configure CONFIG_ENTROPY_NAME in fixup files. Since rng node is not enabled (or available) on all boards, it could happen that symbol ENTROPY_STM32_RNG is not enabled and hence ENTROPY_HAS_DRIVER not selected which ends up with a symbol ENTROPY_NAME defined throufg Kconfig selection. Thus, in fixup file, CONFIG_ENTROPY_NAME is defined only if not already defined. Additionally, update boards that used to configure entropy by default. On these boards, enable rng device in device tree and remove Kconfig related configuration (which should not be part of default configuration). Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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11 changed files with 35 additions and 21 deletions
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@ -60,6 +60,10 @@
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status = "okay";
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};
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&rng {
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status = "okay";
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};
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/* Only one interface should be enabled at a time: usbotg_fs or usbotg_hs */
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usb_otg1: &usbotg_fs {
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status = "disabled";
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@ -36,5 +36,3 @@ CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=7
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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CONFIG_CLOCK_STM32_APB1_PRESCALER=4
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CONFIG_CLOCK_STM32_APB2_PRESCALER=2
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CONFIG_ENTROPY_GENERATOR=y
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@ -59,3 +59,7 @@
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&rtc {
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status = "okay";
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};
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&rng {
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status = "okay";
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};
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@ -36,8 +36,3 @@ CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=7
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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CONFIG_CLOCK_STM32_APB1_PRESCALER=4
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CONFIG_CLOCK_STM32_APB2_PRESCALER=2
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CONFIG_ENTROPY_GENERATOR=y
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CONFIG_ENTROPY_NAME="ENTROPY_0"
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CONFIG_TEST_RANDOM_GENERATOR=y
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CONFIG_TIMER_RANDOM_GENERATOR=y
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@ -55,3 +55,7 @@
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bus-speed = <125000>;
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status = "okay";
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};
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&rng {
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status = "okay";
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};
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@ -8,6 +8,7 @@ config ENTROPY_STM32_RNG
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depends on SOC_FAMILY_STM32
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select ENTROPY_HAS_DRIVER
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select USE_STM32_LL_RNG
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select HAS_DTS_ENTROPY
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help
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This option enables the RNG processor, which is a entropy number
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generator, based on a continuous analog noise, that provides
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@ -4,6 +4,8 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT st_stm32_rng
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#include <kernel.h>
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#include <device.h>
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#include <drivers/entropy.h>
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@ -17,14 +19,6 @@
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#include <drivers/clock_control.h>
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#include <drivers/clock_control/stm32_clock_control.h>
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#if !defined(CONFIG_SOC_SERIES_STM32L4X) && !defined(CONFIG_SOC_SERIES_STM32F4X) && !defined(CONFIG_SOC_SERIES_STM32F7X) && !defined(CONFIG_SOC_SERIES_STM32G4X)
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#error RNG only available on STM32F4, STM32F7, STM32L4 and STM32G4 series
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#elif defined(CONFIG_SOC_STM32F401XE)
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#error RNG not available on STM32F401 based SoCs
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#elif defined(CONFIG_SOC_STM32F411XE)
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#error RNG not available on STM32F411 based SoCs
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#else
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struct entropy_stm32_rng_dev_cfg {
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struct stm32_pclken pclken;
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};
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@ -209,18 +203,16 @@ static const struct entropy_driver_api entropy_stm32_rng_api = {
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};
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static const struct entropy_stm32_rng_dev_cfg entropy_stm32_rng_config = {
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.pclken = { .bus = STM32_CLOCK_BUS_AHB2,
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.enr = LL_AHB2_GRP1_PERIPH_RNG },
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.pclken = { .bus = DT_INST_CLOCKS_CELL(0, bus),
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.enr = DT_INST_CLOCKS_CELL(0, bits) },
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};
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static struct entropy_stm32_rng_dev_data entropy_stm32_rng_data = {
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.rng = RNG,
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.rng = (RNG_TypeDef *)DT_INST_REG_ADDR(0),
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};
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DEVICE_AND_API_INIT(entropy_stm32_rng, CONFIG_ENTROPY_NAME,
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DEVICE_AND_API_INIT(entropy_stm32_rng, DT_INST_LABEL(0),
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entropy_stm32_rng_init,
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&entropy_stm32_rng_data, &entropy_stm32_rng_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&entropy_stm32_rng_api);
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#endif
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@ -210,4 +210,8 @@
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#define DT_FLASH_DEV_NAME DT_LABEL(DT_INST(0, st_stm32f4_flash_controller))
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#ifndef CONFIG_ENTROPY_NAME
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#define CONFIG_ENTROPY_NAME DT_LABEL(DT_INST(0, st_stm32_rng))
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#endif
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/* End of SoC Level DTS fixup file */
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@ -69,4 +69,8 @@
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#define DT_ADC_1_NAME DT_ST_STM32_ADC_40012000_LABEL
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#ifndef CONFIG_ENTROPY_NAME
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#define CONFIG_ENTROPY_NAME DT_LABEL(DT_INST(0, st_stm32_rng))
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#endif
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/* End of SoC Level DTS fixup file */
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@ -44,4 +44,8 @@
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#define DT_WDT_0_NAME DT_LABEL(DT_INST(0, st_stm32_watchdog))
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#ifndef CONFIG_ENTROPY_NAME
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#define CONFIG_ENTROPY_NAME DT_LABEL(DT_INST(0, st_stm32_rng))
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#endif
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/* End of SoC Level DTS fixup file */
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@ -74,4 +74,8 @@
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#define DT_LPTIM_1_CLOCK_BITS DT_ST_STM32_TIMERS_40007C00_CLOCK_BITS_0
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#define DT_LPTIM_1_CLOCK_BUS DT_ST_STM32_TIMERS_40007C00_CLOCK_BUS_0
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#ifndef CONFIG_ENTROPY_NAME
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#define CONFIG_ENTROPY_NAME DT_LABEL(DT_INST(0, st_stm32_rng))
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#endif
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/* End of SoC Level DTS fixup file */
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