dts: i2c: Remove DT_I2C_._NAME references
Now that there are no users of DT_I2C_._NAME we can remove all the defines in dts_fixup.h. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
parent
3c96c08839
commit
d280660792
26 changed files with 0 additions and 88 deletions
|
@ -1,12 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2019 Linaro Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* This file is a temporary workaround for mapping of the generated information
|
||||
* to the current driver definitions. This will be removed when the drivers
|
||||
* are modified to handle the generated information, or the mapping of
|
||||
* generated data matches the driver definitions.
|
||||
*/
|
||||
|
||||
#define DT_I2C_0_NAME DT_NIOS2_I2C_100200_LABEL
|
|
@ -37,13 +37,11 @@
|
|||
#define DT_GPIO_SAM_PORTE_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID
|
||||
|
||||
#define DT_I2C_0_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_4008C000_BASE_ADDRESS
|
||||
#define DT_I2C_0_NAME DT_ATMEL_SAM_I2C_TWI_4008C000_LABEL
|
||||
#define DT_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWI_4008C000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWI_4008C000_IRQ_0
|
||||
#define DT_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_4008C000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWI_4008C000_PERIPHERAL_ID
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_40090000_BASE_ADDRESS
|
||||
#define DT_I2C_1_NAME DT_ATMEL_SAM_I2C_TWI_40090000_LABEL
|
||||
#define DT_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWI_40090000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWI_40090000_IRQ_0
|
||||
#define DT_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_40090000_IRQ_0_PRIORITY
|
||||
|
|
|
@ -40,13 +40,11 @@
|
|||
#define DT_GPIO_SAM_PORTE_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID
|
||||
|
||||
#define DT_I2C_0_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_400A8000_BASE_ADDRESS
|
||||
#define DT_I2C_0_NAME DT_ATMEL_SAM_I2C_TWI_400A8000_LABEL
|
||||
#define DT_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWI_400A8000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWI_400A8000_IRQ_0
|
||||
#define DT_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_400A8000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWI_400A8000_PERIPHERAL_ID
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_400AC000_BASE_ADDRESS
|
||||
#define DT_I2C_1_NAME DT_ATMEL_SAM_I2C_TWI_400AC000_LABEL
|
||||
#define DT_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWI_400AC000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWI_400AC000_IRQ_0
|
||||
#define DT_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_400AC000_IRQ_0_PRIORITY
|
||||
|
|
|
@ -31,13 +31,11 @@
|
|||
#define DT_GPIO_SAM_PORTC_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1200_PERIPHERAL_ID
|
||||
|
||||
#define DT_I2C_0_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_40018000_BASE_ADDRESS
|
||||
#define DT_I2C_0_NAME DT_ATMEL_SAM_I2C_TWI_40018000_LABEL
|
||||
#define DT_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWI_40018000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWI_40018000_IRQ_0
|
||||
#define DT_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_40018000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWI_40018000_PERIPHERAL_ID
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_4001C000_BASE_ADDRESS
|
||||
#define DT_I2C_1_NAME DT_ATMEL_SAM_I2C_TWI_4001C000_LABEL
|
||||
#define DT_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWI_4001C000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWI_4001C000_IRQ_0
|
||||
#define DT_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_4001C000_IRQ_0_PRIORITY
|
||||
|
|
|
@ -40,21 +40,18 @@
|
|||
#define DT_GPIO_SAM_PORTE_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID
|
||||
|
||||
#define DT_I2C_0_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_40018000_BASE_ADDRESS
|
||||
#define DT_I2C_0_NAME DT_ATMEL_SAM_I2C_TWIHS_40018000_LABEL
|
||||
#define DT_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWIHS_40018000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0
|
||||
#define DT_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWIHS_40018000_PERIPHERAL_ID
|
||||
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_4001C000_BASE_ADDRESS
|
||||
#define DT_I2C_1_NAME DT_ATMEL_SAM_I2C_TWIHS_4001C000_LABEL
|
||||
#define DT_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWIHS_4001C000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0
|
||||
#define DT_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWIHS_4001C000_PERIPHERAL_ID
|
||||
|
||||
#define DT_I2C_2_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_40060000_BASE_ADDRESS
|
||||
#define DT_I2C_2_NAME DT_ATMEL_SAM_I2C_TWIHS_40060000_LABEL
|
||||
#define DT_I2C_2_BITRATE DT_ATMEL_SAM_I2C_TWIHS_40060000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_2_IRQ DT_ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0
|
||||
#define DT_I2C_2_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0_PRIORITY
|
||||
|
|
|
@ -44,21 +44,18 @@
|
|||
#define DT_GPIO_SAM_PORTE_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID
|
||||
|
||||
#define DT_I2C_0_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_40018000_BASE_ADDRESS
|
||||
#define DT_I2C_0_NAME DT_ATMEL_SAM_I2C_TWIHS_40018000_LABEL
|
||||
#define DT_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWIHS_40018000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0
|
||||
#define DT_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWIHS_40018000_PERIPHERAL_ID
|
||||
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_4001C000_BASE_ADDRESS
|
||||
#define DT_I2C_1_NAME DT_ATMEL_SAM_I2C_TWIHS_4001C000_LABEL
|
||||
#define DT_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWIHS_4001C000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0
|
||||
#define DT_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWIHS_4001C000_PERIPHERAL_ID
|
||||
|
||||
#define DT_I2C_2_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_40060000_BASE_ADDRESS
|
||||
#define DT_I2C_2_NAME DT_ATMEL_SAM_I2C_TWIHS_40060000_LABEL
|
||||
#define DT_I2C_2_BITRATE DT_ATMEL_SAM_I2C_TWIHS_40060000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_2_IRQ DT_ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0
|
||||
#define DT_I2C_2_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0_PRIORITY
|
||||
|
|
|
@ -4,8 +4,6 @@
|
|||
|
||||
#define DT_FLASH_DEV_NAME DT_ATMEL_SAM0_NVMCTRL_41004000_LABEL
|
||||
|
||||
#define DT_I2C_0_NAME DT_LABEL(DT_INST(0, atmel_sam0_i2c))
|
||||
|
||||
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
|
||||
|
||||
/* End of SoC Level DTS fixup file */
|
||||
|
|
|
@ -4,8 +4,6 @@
|
|||
|
||||
#define DT_FLASH_DEV_NAME DT_LABEL(DT_INST(0, atmel_sam0_nvmctrl))
|
||||
|
||||
#define DT_I2C_0_NAME DT_LABEL(DT_INST(0, atmel_sam0_i2c))
|
||||
|
||||
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
|
||||
|
||||
/* End of SoC Level DTS fixup file */
|
||||
|
|
|
@ -8,8 +8,6 @@
|
|||
|
||||
#define DT_FLASH_DEV_NAME DT_LABEL(DT_INST(0, atmel_sam0_nvmctrl))
|
||||
|
||||
#define DT_I2C_0_NAME DT_LABEL(DT_INST(0, atmel_sam0_i2c))
|
||||
|
||||
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
|
||||
|
||||
/* End of SoC Level DTS fixup file */
|
||||
|
|
|
@ -16,9 +16,6 @@
|
|||
|
||||
#define DT_GPIO_P0_DEV_NAME DT_NORDIC_NRF_GPIO_GPIO_0_LABEL
|
||||
|
||||
#define DT_I2C_0_NAME DT_NORDIC_NRF_TWI_I2C_0_LABEL
|
||||
#define DT_I2C_1_NAME DT_NORDIC_NRF_TWI_I2C_1_LABEL
|
||||
|
||||
#define DT_SPI_0_NAME DT_NORDIC_NRF_SPI_SPI_0_LABEL
|
||||
#define DT_SPI_1_NAME DT_NORDIC_NRF_SPI_SPI_1_LABEL
|
||||
|
||||
|
|
|
@ -23,18 +23,6 @@
|
|||
#define DT_GPIO_P0_DEV_NAME DT_NORDIC_NRF_GPIO_GPIO_0_LABEL
|
||||
#define DT_GPIO_P1_DEV_NAME DT_NORDIC_NRF_GPIO_GPIO_1_LABEL
|
||||
|
||||
#if defined(DT_NORDIC_NRF_TWIM_I2C_0_LABEL)
|
||||
#define DT_I2C_0_NAME DT_NORDIC_NRF_TWIM_I2C_0_LABEL
|
||||
#else
|
||||
#define DT_I2C_0_NAME DT_NORDIC_NRF_TWI_I2C_0_LABEL
|
||||
#endif
|
||||
|
||||
#if defined(DT_NORDIC_NRF_TWIM_I2C_1_LABEL)
|
||||
#define DT_I2C_1_NAME DT_NORDIC_NRF_TWIM_I2C_1_LABEL
|
||||
#else
|
||||
#define DT_I2C_1_NAME DT_NORDIC_NRF_TWI_I2C_1_LABEL
|
||||
#endif
|
||||
|
||||
#if defined(DT_NORDIC_NRF_SPIM_SPI_0_LABEL)
|
||||
#define DT_SPI_0_NAME DT_NORDIC_NRF_SPIM_SPI_0_LABEL
|
||||
#else
|
||||
|
|
|
@ -27,9 +27,6 @@
|
|||
#define DT_GPIO_P0_DEV_NAME DT_NORDIC_NRF_GPIO_GPIO_0_LABEL
|
||||
#define DT_GPIO_P1_DEV_NAME DT_NORDIC_NRF_GPIO_GPIO_1_LABEL
|
||||
|
||||
#define DT_I2C_0_NAME DT_NORDIC_NRF_TWIM_I2C_0_LABEL
|
||||
#define DT_I2C_1_NAME DT_NORDIC_NRF_TWIM_I2C_1_LABEL
|
||||
|
||||
#define DT_SPI_0_NAME DT_NORDIC_NRF_SPIM_SPI_0_LABEL
|
||||
#define DT_SPI_1_NAME DT_NORDIC_NRF_SPIM_SPI_1_LABEL
|
||||
#define DT_SPI_2_NAME DT_NORDIC_NRF_SPIM_SPI_2_LABEL
|
||||
|
|
|
@ -22,11 +22,6 @@
|
|||
|
||||
#define DT_GPIO_P0_DEV_NAME DT_NORDIC_NRF_GPIO_GPIO_0_LABEL
|
||||
|
||||
#define DT_I2C_0_NAME DT_NORDIC_NRF_TWIM_I2C_0_LABEL
|
||||
#define DT_I2C_1_NAME DT_NORDIC_NRF_TWIM_I2C_1_LABEL
|
||||
#define DT_I2C_2_NAME DT_NORDIC_NRF_TWIM_I2C_2_LABEL
|
||||
#define DT_I2C_3_NAME DT_NORDIC_NRF_TWIM_I2C_3_LABEL
|
||||
|
||||
#define DT_SPI_0_NAME DT_NORDIC_NRF_SPIM_SPI_0_LABEL
|
||||
#define DT_SPI_1_NAME DT_NORDIC_NRF_SPIM_SPI_1_LABEL
|
||||
#define DT_SPI_2_NAME DT_NORDIC_NRF_SPIM_SPI_2_LABEL
|
||||
|
|
|
@ -6,7 +6,6 @@
|
|||
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V2_40005400_CLOCK_BITS
|
||||
|
@ -14,7 +13,6 @@
|
|||
|
||||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
#define DT_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V2_40005800_CLOCK_BITS
|
||||
|
|
|
@ -7,7 +7,6 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V1_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY
|
||||
|
@ -17,7 +16,6 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V1_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY
|
||||
|
|
|
@ -7,7 +7,6 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
|
@ -17,7 +16,6 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
|
@ -27,7 +25,6 @@
|
|||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40007800_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40007800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40007800_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40007800_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40007800_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40007800_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40007800_CLOCK_FREQUENCY
|
||||
|
|
|
@ -7,7 +7,6 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V1_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY
|
||||
|
@ -17,7 +16,6 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V1_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY
|
||||
|
@ -27,7 +25,6 @@
|
|||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005C00_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005C00_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005C00_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V1_40005C00_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V1_40005C00_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V1_40005C00_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V1_40005C00_CLOCK_FREQUENCY
|
||||
|
|
|
@ -9,7 +9,6 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
|
@ -19,7 +18,6 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
|
@ -29,7 +27,6 @@
|
|||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
|
||||
|
@ -39,7 +36,6 @@
|
|||
#define DT_I2C_4_BASE_ADDRESS DT_ST_STM32_I2C_V2_40006000_BASE_ADDRESS
|
||||
#define DT_I2C_4_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40006000_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_4_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40006000_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_4_NAME DT_ST_STM32_I2C_V2_40006000_LABEL
|
||||
#define DT_I2C_4_EVENT_IRQ DT_ST_STM32_I2C_V2_40006000_IRQ_EVENT
|
||||
#define DT_I2C_4_ERROR_IRQ DT_ST_STM32_I2C_V2_40006000_IRQ_ERROR
|
||||
#define DT_I2C_4_BITRATE DT_ST_STM32_I2C_V2_40006000_CLOCK_FREQUENCY
|
||||
|
|
|
@ -15,7 +15,6 @@
|
|||
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V2_40005400_CLOCK_BITS
|
||||
|
@ -23,7 +22,6 @@
|
|||
|
||||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
#define DT_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V2_40005800_CLOCK_BITS
|
||||
|
|
|
@ -13,7 +13,6 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
|
@ -23,7 +22,6 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
|
@ -33,7 +31,6 @@
|
|||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40007800_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40007800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40007800_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40007800_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40007800_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40007800_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40007800_CLOCK_FREQUENCY
|
||||
|
|
|
@ -15,7 +15,6 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
|
@ -25,7 +24,6 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
|
@ -35,7 +33,6 @@
|
|||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
|
||||
|
@ -45,7 +42,6 @@
|
|||
#define DT_I2C_4_BASE_ADDRESS DT_ST_STM32_I2C_V2_58001C00_BASE_ADDRESS
|
||||
#define DT_I2C_4_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_58001C00_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_4_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_58001C00_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_4_NAME DT_ST_STM32_I2C_V2_58001C00_LABEL
|
||||
#define DT_I2C_4_EVENT_IRQ DT_ST_STM32_I2C_V2_58001C00_IRQ_EVENT
|
||||
#define DT_I2C_4_ERROR_IRQ DT_ST_STM32_I2C_V2_58001C00_IRQ_ERROR
|
||||
#define DT_I2C_4_BITRATE DT_ST_STM32_I2C_V2_58001C00_CLOCK_FREQUENCY
|
||||
|
|
|
@ -6,7 +6,6 @@
|
|||
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V2_40005400_CLOCK_BITS
|
||||
|
@ -14,7 +13,6 @@
|
|||
|
||||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
#define DT_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V2_40005800_CLOCK_BITS
|
||||
|
@ -22,7 +20,6 @@
|
|||
|
||||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40007800_BASE_ADDRESS
|
||||
#define DT_I2C_3_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40007800_IRQ_COMBINED_PRIORITY
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40007800_LABEL
|
||||
#define DT_I2C_3_COMBINED_IRQ DT_ST_STM32_I2C_V2_40007800_IRQ_COMBINED
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40007800_CLOCK_FREQUENCY
|
||||
#define DT_I2C_3_CLOCK_BITS DT_ST_STM32_I2C_V2_40007800_CLOCK_BITS
|
||||
|
|
|
@ -11,7 +11,6 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V1_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY
|
||||
|
@ -21,7 +20,6 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V1_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY
|
||||
|
|
|
@ -7,7 +7,6 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
|
@ -17,7 +16,6 @@
|
|||
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
|
||||
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
|
||||
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT
|
||||
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR
|
||||
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
|
||||
|
@ -27,7 +25,6 @@
|
|||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
|
||||
|
@ -37,7 +34,6 @@
|
|||
#define DT_I2C_4_BASE_ADDRESS DT_ST_STM32_I2C_V2_40008400_BASE_ADDRESS
|
||||
#define DT_I2C_4_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40008400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_4_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40008400_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_4_NAME DT_ST_STM32_I2C_V2_40008400_LABEL
|
||||
#define DT_I2C_4_EVENT_IRQ DT_ST_STM32_I2C_V2_40008400_IRQ_EVENT
|
||||
#define DT_I2C_4_ERROR_IRQ DT_ST_STM32_I2C_V2_40008400_IRQ_ERROR
|
||||
#define DT_I2C_4_BITRATE DT_ST_STM32_I2C_V2_40008400_CLOCK_FREQUENCY
|
||||
|
|
|
@ -11,7 +11,6 @@
|
|||
#define DT_I2C_5_BASE_ADDRESS DT_ST_STM32_I2C_V2_40015000_BASE_ADDRESS
|
||||
#define DT_I2C_5_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40015000_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_5_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40015000_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_5_NAME DT_ST_STM32_I2C_V2_40015000_LABEL
|
||||
#define DT_I2C_5_EVENT_IRQ DT_ST_STM32_I2C_V2_40015000_IRQ_EVENT
|
||||
#define DT_I2C_5_ERROR_IRQ DT_ST_STM32_I2C_V2_40015000_IRQ_ERROR
|
||||
#define DT_I2C_5_BITRATE DT_ST_STM32_I2C_V2_40015000_CLOCK_FREQUENCY
|
||||
|
|
|
@ -15,7 +15,6 @@
|
|||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
|
@ -25,7 +24,6 @@
|
|||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
|
||||
#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue