Commit graph

1403 commits

Author SHA1 Message Date
Daniel Leung
b7eb04b300 x86: consolidate x86_64 architecture, SoC and boards
There are two set of code supporting x86_64: x86_64 using x32 ABI,
and x86 long mode, and this consolidates both into one x86_64
architecture and SoC supporting truly 64-bit mode.

() Removes the x86_64:x32 architecture and SoC, and replaces
   them with the existing x86 long mode arch and SoC.
() Replace qemu_x86_64 with qemu_x86_long as qemu_x86_64.
() Updates samples and tests to remove reference to
   qemu_x86_long.
() Renames CONFIG_X86_LONGMODE to CONFIG_X86_64.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-10-25 17:57:55 -04:00
Ulf Magnusson
e073c4f54c arch: arc: kconfig: Define FP_FPU_DA outside Kconfig.defconfig files
Define FP_FPU_DA in arch/arc/Kconfig to make it always available. That
way, the Kconfig.defconfig definitions can skip the type, making them
incomplete if the base definition of the symbol disappears. That makes
the organization easier to understand and errors easier to spot.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-10-25 16:38:54 -05:00
Ulf Magnusson
9343e25baa arch: arc: kconfig: Define CPU_EM* syms outside Kconfig.defconfig files
Define CPU_EM4* and CPU_EM6 in arch/arc/Kconfig to make them always
available. That way, the Kconfig.defconfig definitions can skip the
type, making them incomplete if the base definition of the symbol
disappears. That makes the organization easier to understand and errors
easier to spot.

The help texts were taken from
https://gcc.gnu.org/onlinedocs/gcc/ARC-Options.html. Help texts for
invisible symbols can be checked in the menuconfig too if you go into
show-all mode, so they're better than adding a comment.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-10-25 16:38:54 -05:00
Loic Poulain
a019e92d23 soc: nxp: rt: Add CSI video support
Add CSI node to generic nxp rt dtsi.
Add corresponding dts binding.
Add CSI capability for rt MCUs.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-10-25 15:13:53 -05:00
Ulf Magnusson
2b61031c8f kconfig: Remove symbol types from Kconfig.defconfig files
Same deal as in commit 7fdb525754 ("kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), but I hacked Kconfiglib to also
find cases where the type is given separately as e.g.

    config FOO
            int
            default 3

Motivation (from a note in
https://docs.zephyrproject.org/latest/guides/kconfig/index.html):

    For a symbol defined in multiple locations (e.g., in a
    Kconfig.defconfig file in Zephyr), it is best to only give the
    symbol type for the "base" definition of the symbol, and to use
    'default' (instead of 'def_<type>' value) for the remaining
    definitions. That way, if the base definition of the symbol is
    removed, the symbol ends up without a type, which generates a
    warning that points to the other definitions. That makes the extra
    definitions easier to discover and remove.

It's also nice if 'def_bool' and the like turn into a semi-reliable flag
that the symbol is only defined in Kconfig.defconfig files. That might
be a sign that things could be cleaned up.

Will do a separate pass later to remove some symbols only defined in
Kconfig.defconfig files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-10-24 12:40:22 -05:00
Mohamed ElShahawi
55471982f6 esp32: drivers: Add Entropy Device tree support
- Add TRNG module to esp32.dtsi
- Updated the note about TRNG register address

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-10-24 09:09:41 -05:00
Kumar Gala
22e7449b73 kconfig: Introduce typed dt kconfig functions
Replace:
  dt_chosen_reg_addr
  dt_chosen_reg_size
  dt_node_reg_addr
  dt_node_reg_size

with:
  dt_chosen_reg_addr_int
  dt_chosen_reg_size_int
  dt_chosen_reg_addr_hex
  dt_chosen_reg_size_hex
  dt_node_reg_addr_int
  dt_node_reg_size_int
  dt_node_reg_addr_hex
  dt_node_reg_size_hex

So that we get the proper formatted string for the type of symbol.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-10-24 08:51:06 -05:00
Scott Worley
c8b1eb79a1 drivers : spi : mec1501 : XEC SPI driver
SPI driver for MEC1501 QMSPI supporting synchronous only.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-10-23 19:18:32 -07:00
Kumar Gala
9784f800a6 i2c: Rename CONFIG_I2C_[0..5]_NAME -> DT_I2C_[0..5]_NAME
Now that everything is DT based for I2C drivers we can rename the
CONFIG_I2C_[0..5]_NAME define to DT_I2C_[0..5]_NAME.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-10-23 11:31:32 -05:00
Kumar Gala
28d060513c arm: mps2: Convert gpio to use device tree
Add binding for arm,mps2-fpgaio-gpio and update device tree and change
FPGA GPIO init code to utilize device tree defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-10-23 10:26:56 -05:00
Maureen Helm
f8cfe453fd soc: nxp_imx: Configure default sdhc driver at the soc series level
Configures the default sdhc driver for the imx rt soc series so
applications don't have to configure it explicitly.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-10-23 09:49:05 -05:00
Ulf Magnusson
6cc9800105 soc: nxp_kinetis: kconfig: Remove unused PRESERVE_JTAG_IO_PINS symbol
Unused after commit 4973787c10 ("pinmux: Remove the k64 pinmux driver").

Found with a script.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-10-21 15:52:36 -05:00
Henrik Brix Andersen
e4f191aaf6 soc: nxp: ke1xf: set ip clock in dts
Move the selection of the IP clock source for the modules in the NXP
Kinetis KE1xF SoCs from being hardcoded in soc.c to being specified in
the device tree.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-10-21 15:40:04 -05:00
Henrik Brix Andersen
9ac5de58b6 soc: nxp: kwx: add missing LPUART base address definition
Add missing definition for the base addresses of the NXP LPUART to
the NXP KWx SoC DTS fixup.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-10-21 12:25:26 -05:00
Henrik Brix Andersen
7ac8c2d933 soc: nxp: ke1xf: add missing LPUART base address definitions
Add missing definitions for the base addresses of the NXP LPUARTs to
the NXP KE1xF SoC DTS fixup.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-10-21 12:25:26 -05:00
Wayne Ren
56c40048ae soc: nsim_hs: fix the interrupt numbers
it's bug found after implementing direct irq support,
nsim_hs has the same number of interrupts available
as nsim_em

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-10-21 09:06:17 -07:00
Mateusz Holenko
0f4e21cae8 soc: riscv: litex: Add helpers for accessing CSRs
Depending on LiteX configuration, CSRs
(control&status registers) might be split
into several consecutive registers.

This introduces common helper functions
for all LiteX drivers providing access
to CSRs for a default LiteX configuration
(data_width = 8bit, bus_width = 32bit).

Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-10-21 08:40:09 -05:00
Stephanos Ioannidis
5eb71b45b4 soc: arm: Clean up HAS_CMSIS_CORE usage.
For nordic_nrf, this commit relocates HAS_CMSIS_CORE selection from
SoC Kconfig to the HAL module Kconfig, as done for other SoCs.

For nxp_kinetis, remove redundant HAS_CMSIS_CORE selection in SoC
Kconfig, as it is already selected by the HAL Kconfig.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2019-10-18 14:01:07 -05:00
Stephanos Ioannidis
bb14d8c5e5 ext: hal: cmsis: Update references to HAS_CMSIS to HAS_CMSIS_CORE.
This commit updates all references to HAS_CMSIS to use HAS_CMSIS_CORE
instead. With the changes introduced to allow multiple CMSIS variants
to be specified, the latter is semantically equivalent to the former.

For more details, see issue #19717.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2019-10-18 14:01:07 -05:00
Manivannan Sadhasivam
bf949409b8 soc: arm: stm32: Add support for STM32L151XB-A SoC
STM32L151XB-A SoC is almost similar to the STM32L151XB SoC except that
it has more RAM (32KiB). Hence add devicetree and Kconfig support.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-10-18 10:40:45 -05:00
Manivannan Sadhasivam
4f79e31566 soc: arm: st_stm32: stm32l1: Add RTC/Counter support
Add RTC/Counter support for STM32L1 SoCs.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-10-18 10:40:45 -05:00
Ioannis Glaropoulos
761bb8b1f3 soc: arm: stm32g071: remove kernel header inclusions in soc.h
Remove the inclusion of kernel_includes.h from soc.h and replace
it with including the board-specific auto-generated headers. This
aligns the soc.h header with the current policy not to include
kernel headers in soc.h.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-10-18 08:46:03 -05:00
Ioannis Glaropoulos
0f7fe2406c boards: arm: nucleo_g071rb: enable ARM MPU
We enable Memory Protection on stm32 nucleo_g071rb board,
since the respective SoC series implements the ARM MPU.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-10-18 08:46:03 -05:00
Pavlo Hamov
248bd50db5 soc: stm32wb55: allow non 812k flash size
stm32wb55 cold be: 1m, 512k, 256k

Signed-off-by: Pavlo Hamov <pavlo_hamov@jabil.com>
2019-10-17 14:02:08 -05:00
Ulf Magnusson
ac9fe11f2f Kconfig: Remove copy-pasted comments on some promptless symbols
Remove the

    # Omit prompt to signify a "hidden" option

comments that appear on some symbols. They seem to have been copy-pasted
at random, as there are lots of promptless symbols that don't have them
(that's confusing in itself, because it might give the idea that the
ones with comments are special in some way).

I suspect those comments wouldn't have helped me much if I didn't know
Kconfig either. There's a lot more Kconfig documentation now too, e.g.
https://docs.zephyrproject.org/latest/guides/kconfig/index.html.

Keep some comments that give more information than the symbol having no
prompt.

Also do some minor drive-by cleanup.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-10-17 13:05:24 -05:00
Francisco Munoz
2f60c35ff5 soc: microchip: mec1501: Add dts fixup for Keyboard Matrix
This is needed to instantiate Keyboard scan matrix driver

Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
2019-10-16 13:29:21 -07:00
Francisco Munoz
400f06008d soc: microchip: mec1501: Add keyboard scan support in Kconfig
Turn on keyboard scan matrix XEC Kconfig in terms of a generic Kconfig

Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
2019-10-16 13:29:21 -07:00
Karl Palsson
1a45eb67d1 dts: stm32/l1: add xx8-A parts
The -A parts have more flash and ram than the original part numbers.

Signed-off-by: Karl Palsson <karlp@etactica.com>
2019-10-16 14:42:54 -05:00
Karl Palsson
d46c1a0c98 stm32/l1: enable spi peripherals
STM32L1 uses the same spi controller as STM32F1 so we can just set the
right addresses and enable them. We also need to add the fixup names and
to correctly include the header for ST LL HAL.

Signed-off-by: Karl Palsson <karlp@etactica.com>
2019-10-16 14:42:54 -05:00
Andrew Boie
e3ab43580c x86: move mmustructs.h
This will be used for both 32-bit and 64-bit mode.
This header gets pulled in by x86's arch/cpu.h, so put
it in include/arch/x86/.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-14 11:49:39 -07:00
Erwan Gouriou
5881f118c0 soc: stm32: Enable cortex-m systick timer by default
Move systick activation in soc/ as a Kconfig.defconfig file and
remove activation in boards _defconfig files.
This will allow to deactivate it in a more flexible way
with upcoming LPTIMER as tick source when power management
features are enabled.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-10-11 14:55:48 -07:00
Erwan Gouriou
fe303c42cc soc: stm32: replace use of Kconfig I2C by I2C_STM32
For LL header inclusion, use _STM32 Kconfig symbol
(related to the driver), rather than generic symbol,
that could theoretically use an alternate solution.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-10-10 10:54:44 -05:00
Erwan Gouriou
88b71bdf6c soc: stm32: Move clock_control Kconfig selection to common
Factorize this setting rather than doing it in multiple
places.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-10-10 10:54:44 -05:00
Antony Pavlov
70a14435b0 arm: stm32f0: introduce STM32F030X4 stuff
The patch adds initial support for STM32F030X4 SoC.

STM32F0 Cube package advises to use 'stm32f030x6' code
for both STM32F030x4 and STM32F030x6 SoC variants.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2019-10-08 16:31:48 -05:00
Charles E. Youse
3eb1a8b59a arch/x86: (Intel64) implement SMP support
Add duplicate per-CPU data structures (x86_cpuboot, tss, stacks, etc.)
for up to 4 total CPUs, add code in locore and z_arch_start_cpu().

The test board, qemu_x86_long, now defaults to 2 CPUs.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-10-07 19:46:55 -04:00
NavinSankar Velliangiri
bcf6d52dd1 dtsi/Kconfig: arm: st: Add dtsi and Kconfig for SOC variant STM32F401XC
This PR adds the dtsi and Kconfig for the SOC variant STM32F401XC.

Signed-off-by: NavinSankar Velliangiri <navin@linumiz.com>
2019-10-07 08:57:36 -05:00
Erwan Gouriou
e3c1683e8b drivers: watchdog: Add STM32G4x Watchdog support
Add watchdog driver support for STM32G4X SoC series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh
37514ae660 drivers: usb: Add STM32G4X USB support
Add USB driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh
3e5187b458 drivers: entropy: Add STM32G4X RNG support
Add RNG driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh
c678d4508d drivers: counter: Add STM32G4X counter support
Add counter driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Erwan Gouriou
0ecef25d5e drivers: pwm: Add STM32G4X PWM Support
Add PWM driver support for STM32G4X SoC series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh
af4678f885 drivers: adc: Add STM32G4X ADC support
Add ADC driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh
794606f866 drivers: spi: Add STM32G4X SPI support
Add SPI driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh
4ce35300c8 drivers: i2c: Add STM32G4X I2C support
Add I2C driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh
c68e027c28 drivers: flash: Add STM32G4X flash support
Add flash driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh
1d2a030ee3 drivers: serial: Add STM32G4X serial support
Add UART driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh
6a499f46ab drivers: interrupt_controller: Add STM32G4X exti support
Add EXTI driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh
f7bad922f0 drivers: gpio: Add STM32G4X gpio support
Add GPIO driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh
ca7cbb5a08 drivers: clock_control: Add STM32G4X clock support
Add clock support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Richard Osterloh
b87878d09c soc: arm: st_stm32: Add STM32G4 SoC series
Add soc and dts files to support for most of the common peripherals
in the STM32G4 series. Add specific support for the STM32G431RB.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00