drivers: adc: Add STM32G4X ADC support
Add ADC driver support for STM32G4X SoC series. Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
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794606f866
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2 changed files with 30 additions and 16 deletions
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@ -148,7 +148,8 @@ static const u32_t table_samp_time[] = {
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SMP_TIME(160, S_5),
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};
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#elif defined(CONFIG_SOC_SERIES_STM32L4X) || \
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defined(CONFIG_SOC_SERIES_STM32WBX)
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defined(CONFIG_SOC_SERIES_STM32WBX) || \
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defined(CONFIG_SOC_SERIES_STM32G4X)
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static const u16_t acq_time_tbl[8] = {3, 7, 13, 25, 48, 93, 248, 641};
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static const u32_t table_samp_time[] = {
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SMP_TIME(2, S_5),
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@ -218,7 +219,8 @@ static void adc_stm32_start_conversion(struct device *dev)
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defined(CONFIG_SOC_SERIES_STM32F3X) || \
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defined(CONFIG_SOC_SERIES_STM32L0X) || \
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defined(CONFIG_SOC_SERIES_STM32L4X) || \
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defined(CONFIG_SOC_SERIES_STM32WBX)
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defined(CONFIG_SOC_SERIES_STM32WBX) || \
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defined(CONFIG_SOC_SERIES_STM32G4X)
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LL_ADC_REG_StartConversion(adc);
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#else
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LL_ADC_REG_StartConversionSWStart(adc);
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@ -282,7 +284,8 @@ static int start_read(struct device *dev, const struct adc_sequence *sequence)
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defined(CONFIG_SOC_SERIES_STM32F3X) || \
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defined(CONFIG_SOC_SERIES_STM32L0X) || \
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defined(CONFIG_SOC_SERIES_STM32L4X) || \
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defined(CONFIG_SOC_SERIES_STM32WBX)
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defined(CONFIG_SOC_SERIES_STM32WBX) || \
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defined(CONFIG_SOC_SERIES_STM32G4X)
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LL_ADC_EnableIT_EOC(adc);
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#elif defined(CONFIG_SOC_SERIES_STM32F1X)
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LL_ADC_EnableIT_EOS(adc);
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@ -458,7 +461,8 @@ static void adc_stm32_calib(struct device *dev)
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#if defined(CONFIG_SOC_SERIES_STM32F3X) || \
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defined(CONFIG_SOC_SERIES_STM32L4X) || \
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defined(CONFIG_SOC_SERIES_STM32WBX)
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defined(CONFIG_SOC_SERIES_STM32WBX) || \
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defined(CONFIG_SOC_SERIES_STM32G4X)
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LL_ADC_StartCalibration(adc, LL_ADC_SINGLE_ENDED);
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#elif defined(CONFIG_SOC_SERIES_STM32F0X) || \
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defined(CONFIG_SOC_SERIES_STM32L0X)
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@ -496,21 +500,23 @@ static int adc_stm32_init(struct device *dev)
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}
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#if defined(CONFIG_SOC_SERIES_STM32L4X) || \
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defined(CONFIG_SOC_SERIES_STM32WBX)
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defined(CONFIG_SOC_SERIES_STM32WBX) || \
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defined(CONFIG_SOC_SERIES_STM32G4X)
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/*
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* L4 and WB series STM32 needs to be awaken from deep sleep mode, and
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* restore its calibration parameters if there are some previously
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* L4, WB and G4 series STM32 needs to be awaken from deep sleep mode,
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* and restore its calibration parameters if there are some previously
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* stored calibration parameters.
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*/
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LL_ADC_DisableDeepPowerDown(adc);
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#endif
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/*
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* F3, L4, and WB ADC modules need some time to be stabilized before
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* F3, L4, WB and G4 ADC modules need some time to be stabilized before
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* performing any enable or calibration actions.
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*/
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#if defined(CONFIG_SOC_SERIES_STM32F3X) || \
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defined(CONFIG_SOC_SERIES_STM32L4X) || \
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defined(CONFIG_SOC_SERIES_STM32WBX)
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defined(CONFIG_SOC_SERIES_STM32WBX) || \
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defined(CONFIG_SOC_SERIES_STM32G4X)
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LL_ADC_EnableInternalRegulator(adc);
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k_busy_wait(LL_ADC_DELAY_INTERNAL_REGUL_STAB_US);
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#endif
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@ -520,7 +526,8 @@ static int adc_stm32_init(struct device *dev)
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LL_ADC_SetClock(adc, LL_ADC_CLOCK_SYNC_PCLK_DIV4);
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#elif defined(CONFIG_SOC_SERIES_STM32F3X) || \
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defined(CONFIG_SOC_SERIES_STM32L4X) || \
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defined(CONFIG_SOC_SERIES_STM32WBX)
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defined(CONFIG_SOC_SERIES_STM32WBX) || \
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defined(CONFIG_SOC_SERIES_STM32G4X)
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LL_ADC_SetCommonClock(__LL_ADC_COMMON_INSTANCE(),
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LL_ADC_CLOCK_SYNC_PCLK_DIV4);
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#endif
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@ -538,7 +545,8 @@ static int adc_stm32_init(struct device *dev)
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#if defined(CONFIG_SOC_SERIES_STM32F0X) || \
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defined(CONFIG_SOC_SERIES_STM32L0X) || \
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defined(CONFIG_SOC_SERIES_STM32WBX)
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defined(CONFIG_SOC_SERIES_STM32WBX) || \
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defined(CONFIG_SOC_SERIES_STM32G4X)
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if (LL_ADC_IsActiveFlag_ADRDY(adc)) {
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LL_ADC_ClearFlag_ADRDY(adc);
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}
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@ -555,7 +563,8 @@ static int adc_stm32_init(struct device *dev)
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defined(CONFIG_SOC_SERIES_STM32F3X) || \
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defined(CONFIG_SOC_SERIES_STM32L0X) || \
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defined(CONFIG_SOC_SERIES_STM32L4X) || \
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defined(CONFIG_SOC_SERIES_STM32WBX)
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defined(CONFIG_SOC_SERIES_STM32WBX) || \
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defined(CONFIG_SOC_SERIES_STM32G4X)
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/*
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* ADC modules on these series have to wait for some cycles to be
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* enabled.
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@ -577,11 +586,12 @@ static int adc_stm32_init(struct device *dev)
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LL_ADC_Enable(adc);
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#if defined(CONFIG_SOC_SERIES_STM32L4X) || \
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defined(CONFIG_SOC_SERIES_STM32WBX)
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defined(CONFIG_SOC_SERIES_STM32WBX) || \
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defined(CONFIG_SOC_SERIES_STM32G4X)
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/*
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* Enabling ADC modules in L4 and WB series may fail if they are still
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* not stabilized, this will wait for a short time to ensure ADC modules
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* are properly enabled.
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* Enabling ADC modules in L4, WB and G4 series may fail if they are
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* still not stabilized, this will wait for a short time to ensure ADC
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* modules are properly enabled.
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*/
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u32_t countTimeout = 0;
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@ -56,6 +56,10 @@
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#include <stm32g4xx_ll_i2c.h>
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#endif /* CONFIG_I2C */
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#ifdef CONFIG_ADC_STM32
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#include <stm32g4xx_ll_adc.h>
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#endif
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#endif /* !_ASMLANGUAGE */
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#endif /* _STM32G4_SOC_H_ */
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