Commit graph

6301 commits

Author SHA1 Message Date
Kai Vehmanen
8195ea7ea0 logging: Intel ADSP mtrace logging backend
Implements a logging backend implementing the mtrace protocol
to relay log messages over SRAM. This protocol is implemented
by the SOF Linux driver ("mtrace" debugfs interface).

This implementation follows example of the ADSP HDA logger implemented
in commit 6913da9ddd ("logging: cAVS HDA based logger").

Cc: Tom Burdick <thomas.burdick@intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-08-29 10:43:42 +02:00
Kai Vehmanen
45c82c9090 arch/xtensa: adsp: add SRAM window 2 initialization
Define SRAM window 2 details to the headers and open access to host to
the window in bootloader.

Also clarify Kconfig documentation that the semantics of the windows can
vary depending on which host<->DSP communication scheme is in use.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-08-29 10:43:42 +02:00
Gerard Marull-Paretas
014d831d80 soc: arm/riscv: gigadevice: enable reset controller by default
Similar to pinctrl, almost all device drivers will depend on the reset
controller being available, so default the driver class to y at SoC
level.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-29 10:30:49 +02:00
TOKITA Hiroshi
702d079007 soc: arm: gigadevice: Add support for GD32F407 soc
Add initial support for GD32F407 soc

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-08-29 10:27:15 +02:00
Tom Burdick
3a4864bdd2 logging: adsp hda backend improvements
* Adds a default hook and init function for cavstool.
* Adds an optional padding on flush feature to ensure all data is written.
* Fixes an error in cavstool.py for correctly wrapping the ring buffer.
* The test case now ensures wraps and flushes occur numerous times.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-08-26 21:33:10 -04:00
Anas Nashif
6c7bf09222 intel_adsp: fix leakage of Kconfigs in soc family defconfig
Add missing conditionals and move CAVS related configs into own series
defconfig.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-08-26 13:17:02 -04:00
Kumar Gala
8d9f9d50f4 dma: remove Kconfig.defconfig* setting of DMA drivers
Now that DMA drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-26 14:27:23 +00:00
Kumar Gala
04adb949d1 soc: xilinx: zynq7000: move to using DT_STRING_UPPER_TOKEN_BY_IDX macro
Replaced hand coded use with DT_STRING_UPPER_TOKEN_BY_IDX.  We should have
introduced the APIs when this was needed since the token values in
devicetree_generated.h should only be accessed via an API macro.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-25 15:00:24 -07:00
Kumar Gala
1314d73104 I2S: remove Kconfig.defconfig* setting of I2S drivers
Now that I2S drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-25 15:03:11 -05:00
Yves Vandervennet
6b66d7f266 flash: nxp: enabling lpc55s36's FMC
This commit enables the SoC's flash memory controller.

 - added lpc55s36 specific code in the NXP MCUX driver
   to take advantage of the SoC's check-before-read
   capability
 - enabled the FMC node in the SoC's dtsi (iap)
 - added the flash controller chosen node to the board's dts

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2022-08-25 10:24:41 -05:00
Gerard Marull-Paretas
056734bea8 soc: riscv: ite: remove pinmux/pinctrl dead code
Remove unused definitions coming from the pre-pinctrl era.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-25 13:55:47 +00:00
Kumar Gala
3f8ba07b90 usb_device: remove Kconfig.defconfig* setting of usb device drivers
Now that usb device drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-25 08:05:54 -05:00
Gerard Marull-Paretas
c50316ecde soc: gigadevice: gd32f403: use DT for SYS_CLOCK_HW_CYCLES_PER_SEC
Set the default value for SYS_CLOCK_HW_CYCLES_PER_SEC based on DT cpu0
clock-frequency property.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Gerard Marull-Paretas
b9f1a0cfe6 soc: gigadevice: gd32f4xx: use DT for SYS_CLOCK_HW_CYCLES_PER_SEC
Set the default value for SYS_CLOCK_HW_CYCLES_PER_SEC based on DT cpu0
clock-frequency property.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Mahesh Mahadevan
32e2e1cb79 dts: lpc55S6x: Add back the USB SRAM region
USB SRAM region was accidentally deleted by an earlier
commit. Rename the memory region used by USB to USB_SRAM instead
of SRAM4. SRAM4 was the wrong name for this region.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-08-24 10:08:40 +02:00
Francois Ramu
3fafe7fdee drivers: dma: new dma peripheral driver for stm32u5
It includes the definition for the DMA peripheral of this type,
present on stm32U5 devices.
A particular DMA_STM32U5 config is selected for that purpose.
The driver is derived from the existing dma_stm32.c
The GPDMA is counting channels (0-15) ; stream offset is 0.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-08-24 10:05:32 +02:00
Anas Nashif
a04d06514a Revert "intel_adsp: cavs: irq: simplify code"
This reverts commit 2241fb0592.

Fixes #49200

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-08-23 20:46:10 -04:00
Pieter De Gendt
afc784c2ea soc: mimxrt1064: Add HAL clock header include
The low power mode logic for i.MX RT1064 indirectly includes the HAL
definitions, but this is fragile and depends on specific Kconfig options.

This fixes build issues if for example CONFIG_ARM_MPU is not set.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-08-23 11:39:27 -05:00
Richard Osterloh
258737b2ef soc: arm: stm32f4: Add STM32F423 support
Add support for STM32F423xx devices in dts and soc

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2022-08-23 16:23:55 +02:00
Tim Lin
822c37745e soc: it8xxx2: pull more function into ram code section
Pull more function into ram code section to effectively improve
access speed and performance.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-08-23 10:16:36 +02:00
Tim Lin
cb041d062f ITE: drivers/i2c: Add I2C FIFO mode
Adding I2C FIFO mode can reduce the time between each byte to
improve the I2C bus clock stretching during I2C transaction.
The I2C master supports two 32-bytes FIFOs, channel A and C
are supported now.

I2C FIFO mode of it8xxx2 can support I2C APIs including:
i2c_write(), i2c_read(), i2c_burst_read.

Test:
1. tests\drivers\i2c\i2c_api --> pass
2. Reading 16 bytes of data through i2c_burst_read() can reduce
   0.52ms(2.4ms->1.88ms) compared to the original pio mode when the
   frequency is 100KHz.
3. It is normal to read sensor data through I2C on Nereid's platform.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-08-23 10:16:36 +02:00
Wei-Tai Lee
534d61b48c soc: riscv: andes_v5: use syscon driver instead of accessing dts directly
Access syscon area by driver instead of parsing dts node.

Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
2022-08-23 10:15:50 +02:00
Emilio Benavente
76e8909658 soc: arm: nxp: rt595: Attached clock freq to pmic
Attached the correct clock frequency for
FlexComm15 which connects to the PMIC_I2C peripheral

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2022-08-23 10:13:51 +02:00
Flavio Ceolin
96e988c53a intel_adsp: Do not use xtensa hal with xcc-clang
Do not usu XTENSA_HAL when building with xt-clang, instead uses
the HAL provided together with the toolchain. Just like it is
done with "xcc" toolchain variant.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-08-23 10:13:43 +02:00
Gerard Marull-Paretas
a202341958 devices: constify device pointers initialized at compile time
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).

Automated using:

```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-22 17:08:26 +02:00
Evgeniy Paltsev
ee5b158e3a ARC: boards: QEMU: hs6x: minor description polish
Non-functional polish of Kconfig symbol description and
QEMU_CPU_TYPE_${ARCH} variable (used only for verbose cmake comments)
for HS6x QEMU.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-08-22 10:23:14 +00:00
Evgeniy Paltsev
2adfe5ce65 ARC: boards: ARCv3: add qemu_arc_hs5x board
Add qemu_arc_hs5x - single core ARCv3 32bit HS5x CPU.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-08-22 10:23:14 +00:00
Immo Birnbaum
4a8e766526 soc: xilinx_zynq7000: remove static MMU entries for PS UARTs
Remove the static MMU entries for each available Xilinx PS UART
instance. Those are no longer required now that the PS UART
driver uses the DEVICE_MMIO API for register space mapping.

Signed-off-by: Immo Birnbaum <immo.birnbaum@weidmueller.com>
2022-08-19 20:41:26 +00:00
Evgeniy Paltsev
9b6bc41692 ARC: boards: nsim: don't set ARC_HAS_ACCL_REGS to it's default
Don't setup CONFIG_ARC_HAS_ACCL_REGS option for board explicitly
if we use it default value.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-08-19 12:09:37 +02:00
Adam Zelik
d0bb17ab37 drivers: timer: Increase default user-allocable channel count to 3
Increase the default user-allocable number of RTC channels to meet
the nrf_802154 driver requirements.

Signed-off-by: Adam Zelik <adam.zelik@nordicsemi.no>
2022-08-19 12:08:59 +02:00
Mahesh Mahadevan
2bef8051b2 soc: RT595: Add USB support
1. Update soc.c file to add USB clock setup
2. Add a linker file to move USB transfer
   buffer and controller buffers to USB RAM
3. Update Kconfig's to add USB support
4. Add zephyr_udc0 nodelabel

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-08-19 08:16:18 +00:00
Andy Ross
74cc534758 cmake: Update CONFIG_ASAN support
This had bitrotten a bit, and didn't build as shipped.  Current
libasan implementations want -fsanitize=address passed as a linker
argument too.  We have grown a "lld" linker variant that needs the
same cmake treatment as the "ld" binutils one, but never got it.  But
the various flags had been cut/pasted around to different places, with
slightly different forms.  That's really sort of a mess, as sanitizer
support was only ever support with host toolchains for native_posix
(and AFAICT no one anywhere has made this work on cross compilers in
an embedded environment).  And the separate "gcc" vs. "llvm" layers
were silly, as there has only ever been one API for this feature (from
LLVM, then picked up compatibly by gcc).

Pull this stuff out and just do it in one place in the posix arch for
simplicity.

Also recent sanitizers are trying to add instrumentation padding
around data that we use linker trickery to pack tightly
(c.f. SYS_INIT, STRUCT_SECTION_ITERABLE) and we need a way
("__noasan") to turn that off.  Actually for gcc, it was enough to
just make the records const (already true for most of them, except a
native_posix init struct), but clang apparently isn't smart enough.

Finally, add an ASAN_RECOVER kconfig that enables the use of
"halt_on_error=0" in $ASAN_OPTIONS, which continues execution past the
first error.

Signed-off-by: Andy Ross <andyross@google.com>
2022-08-19 08:30:01 +02:00
Tom Burdick
efc0928570 dma/hda: Use the correct register block size for each IP block
Previous versions were using, incorrectly, the host in/out regblock size
of 40 bytes for all peripherals when in fact the link in/out regblock size
is 20 bytes in size.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-08-18 14:54:57 -05:00
Carlo Caione
710e7f24fe arch: arm: Fix cache-related Kconfig symbols
Switch to the new cache-related Kconfig symbols.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-08-18 11:30:49 +00:00
Enjia Mai
5b5107090d soc: xtensa: tools: add specifying log and request port for cavs client
Besides in a form of {host}:{port} to specifying the port using, we
also support specifying --log-port and --req-port parameters for the
cavstool client.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-08-16 22:51:53 -07:00
Enjia Mai
a38f533278 soc: xtensa: tools: remove dependency of netifaces package
Because we use INADDR_ANY by default now, specifying a net interface
is no longer needed. Remove it and remove the dependency of the
netifaces python package.

Fixes. #48584

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-08-16 22:51:53 -07:00
Enjia Mai
6a6a8a9fde soc: xtensa: cavstool server support specifying the port and iface
Make the cavstool service can start with specifying the port
optionally by:

   cavstool.py -s {host}:{log port} --req-port {req port}
OR
   cavstool.py -s {host} --log-port {log port} --req-port {req port}

And we can also specify the network interface instead:

   cavstool.py -i {network iface}

If the server address or the network interface is not specified,
it will use INADDR_ANY by default.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-08-16 22:51:53 -07:00
Enjia Mai
e33fd73546 soc: xtensa: add support for specifying the service port
Add specifying the port for the remote cavstool remote service.
Ex.

    west flash --remote-host {host}:{port} \
               --pty {host}:{port}

Specify the port is optional when running west.

And another major change is now we have to specify the remote log
service by --pty to make it output the log message immediately.
Previously it will output directly. Why we make this change is
because this is more close to the behavior we use west flash.

Fixes. #46865

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-08-16 22:51:53 -07:00
Declan Snyder
85359df09b dts: Renamed NXP usdhc in imxrt6xx
The names of these peripherals in the device tree
did not match the Reference Manual for the RT600.

Added alias for usdhc0 to be able to use SDHC test.

Also fixed a typo in a comment referring to USDHC which should have been
about USB.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2022-08-16 13:43:16 -05:00
Felipe Neves
f01f8f37c0 soc: xtensa: esp32_net: update linker
and adds newlibc fix for esp32_net SoC

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Felipe Neves
d94dc98fd6 soc: xtensa: esp32_net: fixes include paths
that were changed with zephyr prefix  after rebasing.
Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Felipe Neves
d808fa2c6d samples: drivers: ipm_esp32: add return
when ipm driver initialization fails.

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Felipe Neves
6ba5b21337 soc: xtensa: esp32_net: update kconfig
specific of soc to make it compatible to the new toolchain.

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Felipe Neves
382b4144e3 soc: xtensa: esp32: fix app cpu boot
procedure by setting its PC to 0 before reset.

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Felipe Neves
bb6e656ec0 soc: esp32_net: added esp32_net as an option
to use esp32 core 1 as a separate CPU, also
provide infrastructure to load firmware to
that CPU

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Pieter De Gendt
7ef643385b soc: arm: atmel_sam: sam4s: add support for sam4sa16c
Add soc support for sam4sa16c variant

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-08-16 12:53:50 +02:00
Kumar Gala
9f1f9a4843 peci: remove Kconfig.defconfig* setting of peci drivers
Now that peci drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-16 08:26:11 +00:00
Peter Marheine
4bb16a0247 ITE: enable CPU_HAS_FPU for IT8xxx2
This option was previously enabled only if the M extension was
available, because typical compilers do not provide internal libraries
for RV32IAFC so builds fail at link-time. An appropriately-configured
compiler (such as GCC configured with
`--with-multilib-generator=rv32iac-ilp32--f`) can support such a build
however, so don't lie about the presence of an FPU.

This doesn't affect existing builds because CONFIG_FPU gates use of the
FPU, and is off by default. Enabling CONFIG_FPU will require an
appropriately-configured compiler, possibly also requiring careful
choice of CONFIG_FLOAT_HARD.

Signed-off-by: Peter Marheine <pmarheine@chromium.org>
2022-08-16 08:24:54 +00:00
Yves Vandervennet
7a4bb3b27c can: nxp: enabling MCAN on NXP's lpcxpresso55s36
This commit introduces

 - changes on SoC Kconfig and dts files
 - board specific changes (CAN node status, pinctrl and Zephyr alias)

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2022-08-15 13:37:38 -05:00
Kumar Gala
c54086da54 ethernet: remove Kconfig.defconfig* setting of ethernet drivers
Now that ethernet drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-15 14:32:45 +02:00