pinctrl: npcx: config pwm open-drain without enabling STORE_REG
Config pwm open-drain mode without enabling STORE_REG. This CL collects all active PWM's base address and related index in an array. Then, pinctrl driver configs its open-drain mode by finding the corresponding 'channel' index. Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This commit is contained in:
parent
4e443dac34
commit
0f18c4c4ab
8 changed files with 54 additions and 35 deletions
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@ -8,7 +8,6 @@ DT_COMPAT_ST_PINCTRL_NPCX := nuvoton,npcx-pinctrl
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config PINCTRL_NPCX
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bool "Nuvoton NPCX embedded controller (EC) pin controller driver"
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depends on SOC_FAMILY_NPCX
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select PINCTRL_STORE_REG
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default $(dt_compat_enabled,$(DT_COMPAT_ST_PINCTRL_NPCX))
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help
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This option enables the pin controller driver for NPCX family of
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@ -17,6 +17,22 @@ static const struct npcx_pinctrl_config npcx_pinctrl_cfg = {
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.base_scfg = DT_REG_ADDR_BY_NAME(DT_NODELABEL(scfg), scfg),
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};
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/* PWM pinctrl config */
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struct npcx_pwm_pinctrl_config {
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uintptr_t base;
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int channel;
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};
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#define NPCX_PWM_PINCTRL_CFG_INIT(node_id) \
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{ \
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.base = DT_REG_ADDR(node_id), \
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.channel = DT_PROP(node_id, pwm_channel), \
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},
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static const struct npcx_pwm_pinctrl_config pwm_pinctrl_cfg[] = {
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DT_FOREACH_STATUS_OKAY(nuvoton_npcx_pwm, NPCX_PWM_PINCTRL_CFG_INIT)
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};
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/* Pin-control local functions for peripheral devices */
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static bool npcx_periph_pinmux_has_lock(int group)
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{
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@ -70,8 +86,23 @@ static void npcx_periph_pupd_configure(const struct npcx_periph *pupd,
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}
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}
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static void npcx_periph_pwm_drive_mode_configure(uintptr_t reg, bool is_od)
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static void npcx_periph_pwm_drive_mode_configure(const struct npcx_periph *periph,
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bool is_od)
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{
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uintptr_t reg = 0;
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/* Find selected pwm module which enables open-drain prop. */
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for (int i = 0; i < ARRAY_SIZE(pwm_pinctrl_cfg); i++) {
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if (periph->group == pwm_pinctrl_cfg[i].channel) {
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reg = pwm_pinctrl_cfg[i].base;
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break;
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}
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}
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if (reg == 0) {
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return;
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}
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struct pwm_reg *const inst = (struct pwm_reg *)(reg);
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if (is_od) {
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@ -94,7 +125,7 @@ static void npcx_periph_configure(const pinctrl_soc_pin_t *pin, uintptr_t reg)
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pin->flags.io_bias_type);
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} else if (pin->cfg.periph.type == NPCX_PINCTRL_TYPE_PERIPH_DRIVE) {
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/* Configure peripheral device's drive mode. (Only PWM pads support it) */
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npcx_periph_pwm_drive_mode_configure(reg,
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npcx_periph_pwm_drive_mode_configure(&pin->cfg.periph,
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pin->flags.io_drive_type == NPCX_DRIVE_TYPE_OPEN_DRAIN);
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}
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}
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@ -293,6 +293,7 @@
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pwm0: pwm@40080000 {
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compatible = "nuvoton,npcx-pwm";
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reg = <0x40080000 0x2000>;
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pwm-channel = <0>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 0>;
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#pwm-cells = <3>;
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status = "disabled";
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@ -302,6 +303,7 @@
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pwm1: pwm@40082000 {
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compatible = "nuvoton,npcx-pwm";
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reg = <0x40082000 0x2000>;
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pwm-channel = <1>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 1>;
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#pwm-cells = <3>;
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status = "disabled";
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@ -311,6 +313,7 @@
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pwm2: pwm@40084000 {
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compatible = "nuvoton,npcx-pwm";
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reg = <0x40084000 0x2000>;
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pwm-channel = <2>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 2>;
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#pwm-cells = <3>;
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status = "disabled";
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@ -320,6 +323,7 @@
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pwm3: pwm@40086000 {
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compatible = "nuvoton,npcx-pwm";
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reg = <0x40086000 0x2000>;
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pwm-channel = <3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 3>;
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#pwm-cells = <3>;
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status = "disabled";
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@ -329,6 +333,7 @@
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pwm4: pwm@40088000 {
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compatible = "nuvoton,npcx-pwm";
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reg = <0x40088000 0x2000>;
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pwm-channel = <4>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 4>;
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#pwm-cells = <3>;
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status = "disabled";
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@ -338,6 +343,7 @@
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pwm5: pwm@4008a000 {
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compatible = "nuvoton,npcx-pwm";
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reg = <0x4008a000 0x2000>;
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pwm-channel = <5>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 5>;
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#pwm-cells = <3>;
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status = "disabled";
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@ -347,6 +353,7 @@
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pwm6: pwm@4008c000 {
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compatible = "nuvoton,npcx-pwm";
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reg = <0x4008c000 0x2000>;
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pwm-channel = <6>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 6>;
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#pwm-cells = <3>;
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status = "disabled";
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@ -356,6 +363,7 @@
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pwm7: pwm@4008e000 {
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compatible = "nuvoton,npcx-pwm";
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reg = <0x4008e000 0x2000>;
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pwm-channel = <7>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 7>;
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#pwm-cells = <3>;
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status = "disabled";
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@ -111,42 +111,34 @@
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/* PWM peripheral interfaces */
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/omit-if-no-ref/ pwm0_gpc3: periph-pwm0 {
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pinmux = <&alt4_pwm0_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm1_gpc2: periph-pwm1 {
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pinmux = <&alt4_pwm1_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm2_gpc4: periph-pwm2 {
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pinmux = <&alt4_pwm2_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm3_gp80: periph-pwm3 {
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pinmux = <&alt4_pwm3_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm4_gpb6: periph-pwm4 {
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pinmux = <&alt4_pwm4_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm5_gpb7: periph-pwm5 {
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pinmux = <&alt4_pwm5_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm6_gpc0: periph-pwm6 {
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pinmux = <&alt4_pwm6_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm7_gp60: periph-pwm7 {
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pinmux = <&alt4_pwm7_sl>;
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drive-supported;
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};
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/* Keyboard peripheral interfaces. */
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@ -111,42 +111,34 @@
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/* PWM peripheral interfaces */
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/omit-if-no-ref/ pwm0_gpc3: periph-pwm0 {
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pinmux = <&alt4_pwm0_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm1_gpc2: periph-pwm1 {
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pinmux = <&alt4_pwm1_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm2_gpc4: periph-pwm2 {
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pinmux = <&alt4_pwm2_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm3_gp80: periph-pwm3 {
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pinmux = <&alt4_pwm3_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm4_gpb6: periph-pwm4 {
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pinmux = <&alt4_pwm4_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm5_gpb7: periph-pwm5 {
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pinmux = <&alt4_pwm5_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm6_gpc0: periph-pwm6 {
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pinmux = <&alt4_pwm6_sl>;
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drive-supported;
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};
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/omit-if-no-ref/ pwm7_gp60: periph-pwm7 {
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pinmux = <&alt4_pwm7_sl>;
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drive-supported;
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};
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/* Keyboard peripheral interfaces. */
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@ -61,12 +61,6 @@ child-binding:
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description: |
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A map to PUPD_ENn register/bit that enable pull-up/down of NPCX peripheral devices.
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Please don't overwrite this property in the board-level DT driver.
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drive-supported:
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required: false
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type: boolean
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description: |
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It indicates the pad's drive mode is selectable. So far, only PWM's pad has this
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property in npcx series. Please don't overwrite it in the board-level DT driver.
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pinmux-locked:
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required: false
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type: boolean
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@ -18,11 +18,11 @@ properties:
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required: true
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pinctrl-names:
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required: true
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drive-open-drain:
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type: boolean
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pwm-channel:
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type: int
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description: |
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The PWM output will be configured as open-drain. If not set,
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defaults to push-pull.
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A index to indicate PWM module that generates a single PWM signal.
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Please don't overwrite it in the board-level DT driver.
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clock-bus:
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required: false
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type: string
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@ -102,9 +102,9 @@ typedef struct npcx_pinctrl pinctrl_soc_pin_t;
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UTIL_OR(DT_PROP(node_id, bias_pull_down), \
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DT_PROP(node_id, bias_pull_up))
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#define Z_PINCTRL_NPCX_HAS_DRIVE_PROP(node_id) \
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UTIL_AND(DT_PROP(node_id, drive_open_drain), \
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DT_PROP(node_id, drive_supported))
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#define Z_PINCTRL_NPCX_HAS_DRIVE_PROP(node_id, node_periph) \
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UTIL_AND(DT_PROP(node_id, drive_open_drain), \
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DT_NODE_HAS_PROP(node_periph, pwm_channel))
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/**
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* @brief Utility macro to initialize a periphral pinmux configuration.
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@ -142,12 +142,14 @@ typedef struct npcx_pinctrl pinctrl_soc_pin_t;
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* @brief Utility macro to initialize a periphral drive mode configuration.
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*
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* @param node_id Node identifier.
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* @param node_periph Peripheral node identifier.
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*/
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#define Z_PINCTRL_NPCX_PERIPH_DRIVE_INIT(node_id) \
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#define Z_PINCTRL_NPCX_PERIPH_DRIVE_INIT(node_id, node_periph) \
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{ \
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.flags.type = NPCX_PINCTRL_TYPE_PERIPH, \
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.flags.io_drive_type = Z_PINCTRL_NPCX_DRIVE_TYPE(node_id), \
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.cfg.periph.type = NPCX_PINCTRL_TYPE_PERIPH_DRIVE, \
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.cfg.periph.group = DT_PROP(node_periph, pwm_channel), \
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},
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/**
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@ -158,9 +160,10 @@ typedef struct npcx_pinctrl pinctrl_soc_pin_t;
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* @param idx Property entry index.
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*/
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx) \
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COND_CODE_1(Z_PINCTRL_NPCX_HAS_DRIVE_PROP(DT_PROP_BY_IDX(node_id, prop, idx)), \
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COND_CODE_1(Z_PINCTRL_NPCX_HAS_DRIVE_PROP( \
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DT_PROP_BY_IDX(node_id, prop, idx), node_id), \
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(Z_PINCTRL_NPCX_PERIPH_DRIVE_INIT( \
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DT_PROP_BY_IDX(node_id, prop, idx))), ()) \
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DT_PROP_BY_IDX(node_id, prop, idx), node_id)), ()) \
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COND_CODE_1(Z_PINCTRL_NPCX_HAS_PUPD_PROP(DT_PROP_BY_IDX(node_id, prop, idx)), \
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(Z_PINCTRL_NPCX_PERIPH_PUPD_INIT( \
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DT_PROP_BY_IDX(node_id, prop, idx), periph_pupd)), ()) \
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