This API will be deprecated in favor of the new API that clearly
specifies whether it works on logical or physical levels.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update to use new API for GPIO pin configuration and operation. Fix
invalid arithmetic on void pointer. Convert to support devicetree.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update to use new API for GPIO pin configuration and operation. Fix
invalid arithmetic on void pointer. Mark all CC2520 GPIOs as required
in binding.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use new API to configure and interact with GPIOs. Move GPIO
initialization from sample into driver. The existing physical/line
level control has been kept rather than converting to logical level
signals.
Also improve error messages.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
After startup ublox-sara-r4 code sets the MDM_POWER signal to input
using a deprecated configuration macro. This was the only use of the
modem context API to configure a pin.
Refactor the API to not take the flags as an input but instead select
between the flags to be used when the pin is active and a disconnected
state. Use this API instead of a separate direct configure call when
initializing the modem pins.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the new pin and interrupt configuration API.
NOTE: Because hardware is not available this has been build-tested
only.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update the DRDYB pin interrupt handling code of the TI LMP90xxx ADC
driver to use the new GPIO API.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Update the lora/sx1276 driver to the new GPIO API, using configured
active level and the replacement interrupt and active-sensitive set
APIs.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Document and assign write-protect signal as active low, and use the
active-sensitive API to control it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Convert to the new GPIO API using logical access, including setting the
GPIO line as active low in the Device Tree source.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Use new configuration API, replace callback enable/disable with
interrupt enable/disable, and set active level in devicetree source.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Conver to the new GPIO API using raw access, since the driver
has its own macros to define signal levels.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Convert to the new API using raw access, since it's a common access
layer shared by multiple (right now only ublox-sara-r4) modems.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Use the new pin and interrupt configuration API.
NOTE: Because hardware is not available this has been build-tested
only.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the new pin and interrupt configuration API.
NOTE: Because hardware is not available this has been build-tested only.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the new pin and interrupt configuration API.
NOTE: Because hardware is not available this has been build-tested
only.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the new pin and interrupt configuration API.
NOTE: Because hardware is not available this has been build-tested
only.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update devicetree sources and bindings, switch to new GPIO API. Use
devicetree property name to identify interrupt signal.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the new pin and interrupt configuration API. Update all
devicetree bindings to add INT signal active level. Document active
level.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update sample overlays. Add GPIO flags to configuration state.
Refactor to split out setup/handle/process phases. Switch to new API
replacing callback dis/enable with interrupt dis/enable.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure. This driver uses fixups to define a common name
based on the SOC series; until aliases for the new properties are
added the code assumes all pins are supported.
Since pin ordinal validation is now done directly in gpio API,
remove checks inside the driver itself.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
