dts: i2c: cleanup CONFIG_I2C_x_IRQ_PRI
The majority of cases of CONFIG_I2C_x_IRQ_PRI should be DT_I2C_x_IRQ_PRI. So go ahead and fix them up. Only the i2c_nios driver still uses Kconfig for getting priority. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
parent
8ba60342cf
commit
fd6e9c6f58
18 changed files with 63 additions and 53 deletions
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@ -25,56 +25,56 @@
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#define CONFIG_I2C_0_NAME DT_SNPS_DESIGNWARE_I2C_91534000_LABEL
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#define DT_I2C_0_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_91534000_BASE_ADDRESS
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#define DT_I2C_0_IRQ DT_SNPS_DESIGNWARE_I2C_91534000_IRQ_0
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#define CONFIG_I2C_0_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91534000_IRQ_0_PRIORITY
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#define DT_I2C_0_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91534000_IRQ_0_PRIORITY
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#define DT_I2C_0_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_91534000_IRQ_0_SENSE
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#define DT_I2C_0_BITRATE DT_SNPS_DESIGNWARE_I2C_91534000_CLOCK_FREQUENCY
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#define CONFIG_I2C_1_NAME DT_SNPS_DESIGNWARE_I2C_91532000_LABEL
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#define DT_I2C_1_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_91532000_BASE_ADDRESS
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#define DT_I2C_1_IRQ DT_SNPS_DESIGNWARE_I2C_91532000_IRQ_0
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#define CONFIG_I2C_1_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91532000_IRQ_0_PRIORITY
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#define DT_I2C_1_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91532000_IRQ_0_PRIORITY
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#define DT_I2C_1_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_91532000_IRQ_0_SENSE
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#define DT_I2C_1_BITRATE DT_SNPS_DESIGNWARE_I2C_91532000_CLOCK_FREQUENCY
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#define CONFIG_I2C_2_NAME DT_SNPS_DESIGNWARE_I2C_91530000_LABEL
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#define DT_I2C_2_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_91530000_BASE_ADDRESS
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#define DT_I2C_2_IRQ DT_SNPS_DESIGNWARE_I2C_91530000_IRQ_0
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#define CONFIG_I2C_2_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91530000_IRQ_0_PRIORITY
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#define DT_I2C_2_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91530000_IRQ_0_PRIORITY
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#define DT_I2C_2_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_91530000_IRQ_0_SENSE
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#define DT_I2C_2_BITRATE DT_SNPS_DESIGNWARE_I2C_91530000_CLOCK_FREQUENCY
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#define CONFIG_I2C_3_NAME DT_SNPS_DESIGNWARE_I2C_9152E000_LABEL
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#define DT_I2C_3_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_9152E000_BASE_ADDRESS
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#define DT_I2C_3_IRQ DT_SNPS_DESIGNWARE_I2C_9152E000_IRQ_0
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#define CONFIG_I2C_3_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_9152E000_IRQ_0_PRIORITY
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#define DT_I2C_3_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_9152E000_IRQ_0_PRIORITY
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#define DT_I2C_3_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_9152E000_IRQ_0_SENSE
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#define DT_I2C_3_BITRATE DT_SNPS_DESIGNWARE_I2C_9152E000_CLOCK_FREQUENCY
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#define CONFIG_I2C_4_NAME DT_SNPS_DESIGNWARE_I2C_9152C000_LABEL
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#define DT_I2C_4_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_9152C000_BASE_ADDRESS
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#define DT_I2C_4_IRQ DT_SNPS_DESIGNWARE_I2C_9152C000_IRQ_0
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#define CONFIG_I2C_4_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_9152C000_IRQ_0_PRIORITY
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#define DT_I2C_4_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_9152C000_IRQ_0_PRIORITY
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#define DT_I2C_4_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_9152C000_IRQ_0_SENSE
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#define DT_I2C_4_BITRATE DT_SNPS_DESIGNWARE_I2C_9152C000_CLOCK_FREQUENCY
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#define CONFIG_I2C_5_NAME DT_SNPS_DESIGNWARE_I2C_9152A000_LABEL
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#define DT_I2C_5_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_9152A000_BASE_ADDRESS
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#define DT_I2C_5_IRQ DT_SNPS_DESIGNWARE_I2C_9152A000_IRQ_0
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#define CONFIG_I2C_5_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_9152A000_IRQ_0_PRIORITY
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#define DT_I2C_5_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_9152A000_IRQ_0_PRIORITY
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#define DT_I2C_5_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_9152A000_IRQ_0_SENSE
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#define DT_I2C_5_BITRATE DT_SNPS_DESIGNWARE_I2C_9152A000_CLOCK_FREQUENCY
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#define CONFIG_I2C_6_NAME DT_SNPS_DESIGNWARE_I2C_91528000_LABEL
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#define DT_I2C_6_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_91528000_BASE_ADDRESS
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#define DT_I2C_6_IRQ DT_SNPS_DESIGNWARE_I2C_91528000_IRQ_0
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#define CONFIG_I2C_6_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91528000_IRQ_0_PRIORITY
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#define DT_I2C_6_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91528000_IRQ_0_PRIORITY
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#define DT_I2C_6_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_91528000_IRQ_0_SENSE
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#define DT_I2C_6_BITRATE DT_SNPS_DESIGNWARE_I2C_91528000_CLOCK_FREQUENCY
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#define CONFIG_I2C_7_NAME DT_SNPS_DESIGNWARE_I2C_91526000_LABEL
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#define DT_I2C_7_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_91526000_BASE_ADDRESS
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#define DT_I2C_7_IRQ DT_SNPS_DESIGNWARE_I2C_91526000_IRQ_0
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#define CONFIG_I2C_7_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91526000_IRQ_0_PRIORITY
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#define DT_I2C_7_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91526000_IRQ_0_PRIORITY
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#define DT_I2C_7_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_91526000_IRQ_0_SENSE
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#define DT_I2C_7_BITRATE DT_SNPS_DESIGNWARE_I2C_91526000_CLOCK_FREQUENCY
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@ -25,56 +25,56 @@
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#define CONFIG_I2C_0_NAME DT_SNPS_DESIGNWARE_I2C_81444000_LABEL
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#define DT_I2C_0_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_81444000_BASE_ADDRESS
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#define DT_I2C_0_IRQ DT_SNPS_DESIGNWARE_I2C_81444000_IRQ_0
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#define CONFIG_I2C_0_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_81444000_IRQ_0_PRIORITY
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#define DT_I2C_0_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_81444000_IRQ_0_PRIORITY
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#define DT_I2C_0_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_81444000_IRQ_0_SENSE
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#define DT_I2C_0_BITRATE DT_SNPS_DESIGNWARE_I2C_81444000_CLOCK_FREQUENCY
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#define CONFIG_I2C_1_NAME DT_SNPS_DESIGNWARE_I2C_81442000_LABEL
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#define DT_I2C_1_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_81442000_BASE_ADDRESS
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#define DT_I2C_1_IRQ DT_SNPS_DESIGNWARE_I2C_81442000_IRQ_0
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#define CONFIG_I2C_1_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_81442000_IRQ_0_PRIORITY
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#define DT_I2C_1_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_81442000_IRQ_0_PRIORITY
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#define DT_I2C_1_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_81442000_IRQ_0_SENSE
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#define DT_I2C_1_BITRATE DT_SNPS_DESIGNWARE_I2C_81442000_CLOCK_FREQUENCY
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#define CONFIG_I2C_2_NAME DT_SNPS_DESIGNWARE_I2C_81440000_LABEL
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#define DT_I2C_2_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_81440000_BASE_ADDRESS
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#define DT_I2C_2_IRQ DT_SNPS_DESIGNWARE_I2C_81440000_IRQ_0
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#define CONFIG_I2C_2_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_81440000_IRQ_0_PRIORITY
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#define DT_I2C_2_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_81440000_IRQ_0_PRIORITY
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#define DT_I2C_2_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_81440000_IRQ_0_SENSE
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#define DT_I2C_2_BITRATE DT_SNPS_DESIGNWARE_I2C_81440000_CLOCK_FREQUENCY
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#define CONFIG_I2C_3_NAME DT_SNPS_DESIGNWARE_I2C_8143E000_LABEL
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#define DT_I2C_3_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_8143E000_BASE_ADDRESS
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#define DT_I2C_3_IRQ DT_SNPS_DESIGNWARE_I2C_8143E000_IRQ_0
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#define CONFIG_I2C_3_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_8143E000_IRQ_0_PRIORITY
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#define DT_I2C_3_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_8143E000_IRQ_0_PRIORITY
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#define DT_I2C_3_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_8143E000_IRQ_0_SENSE
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#define DT_I2C_3_BITRATE DT_SNPS_DESIGNWARE_I2C_8143E000_CLOCK_FREQUENCY
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#define CONFIG_I2C_4_NAME DT_SNPS_DESIGNWARE_I2C_8143C000_LABEL
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#define DT_I2C_4_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_8143C000_BASE_ADDRESS
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#define DT_I2C_4_IRQ DT_SNPS_DESIGNWARE_I2C_8143C000_IRQ_0
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#define CONFIG_I2C_4_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_8143C000_IRQ_0_PRIORITY
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#define DT_I2C_4_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_8143C000_IRQ_0_PRIORITY
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#define DT_I2C_4_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_8143C000_IRQ_0_SENSE
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#define DT_I2C_4_BITRATE DT_SNPS_DESIGNWARE_I2C_8143C000_CLOCK_FREQUENCY
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#define CONFIG_I2C_5_NAME DT_SNPS_DESIGNWARE_I2C_8143A000_LABEL
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#define DT_I2C_5_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_8143A000_BASE_ADDRESS
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#define DT_I2C_5_IRQ DT_SNPS_DESIGNWARE_I2C_8143A000_IRQ_0
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#define CONFIG_I2C_5_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_8143A000_IRQ_0_PRIORITY
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#define DT_I2C_5_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_8143A000_IRQ_0_PRIORITY
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#define DT_I2C_5_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_8143A000_IRQ_0_SENSE
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#define DT_I2C_5_BITRATE DT_SNPS_DESIGNWARE_I2C_8143A000_CLOCK_FREQUENCY
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#define CONFIG_I2C_6_NAME DT_SNPS_DESIGNWARE_I2C_81438000_LABEL
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#define DT_I2C_6_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_81438000_BASE_ADDRESS
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#define DT_I2C_6_IRQ DT_SNPS_DESIGNWARE_I2C_81438000_IRQ_0
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#define CONFIG_I2C_6_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_81438000_IRQ_0_PRIORITY
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#define DT_I2C_6_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_81438000_IRQ_0_PRIORITY
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#define DT_I2C_6_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_81438000_IRQ_0_SENSE
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#define DT_I2C_6_BITRATE DT_SNPS_DESIGNWARE_I2C_81438000_CLOCK_FREQUENCY
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#define CONFIG_I2C_7_NAME DT_SNPS_DESIGNWARE_I2C_81436000_LABEL
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#define DT_I2C_7_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_81436000_BASE_ADDRESS
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#define DT_I2C_7_IRQ DT_SNPS_DESIGNWARE_I2C_81436000_IRQ_0
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#define CONFIG_I2C_7_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_81436000_IRQ_0_PRIORITY
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#define DT_I2C_7_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_81436000_IRQ_0_PRIORITY
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#define DT_I2C_7_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_81436000_IRQ_0_SENSE
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#define DT_I2C_7_BITRATE DT_SNPS_DESIGNWARE_I2C_81436000_CLOCK_FREQUENCY
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@ -618,7 +618,7 @@ static void config_func_0(struct device *dev)
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/* Enable clock for TWI0 controller */
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PMC->PMC_PCER0 = (1 << ID_TWI0);
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IRQ_CONNECT(TWI0_IRQn, CONFIG_I2C_0_IRQ_PRI,
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IRQ_CONNECT(TWI0_IRQn, DT_I2C_0_IRQ_PRI,
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i2c_sam3_isr, DEVICE_GET(i2c_sam3_0), 0);
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irq_enable(TWI0_IRQn);
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}
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/* Enable clock for TWI0 controller */
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PMC->PMC_PCER0 = (1 << ID_TWI1);
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IRQ_CONNECT(TWI1_IRQn, CONFIG_I2C_1_IRQ_PRI,
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IRQ_CONNECT(TWI1_IRQn, DT_I2C_1_IRQ_PRI,
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i2c_sam3_isr, DEVICE_GET(i2c_sam3_1), 0);
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irq_enable(TWI1_IRQn);
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}
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static void i2c_config_0(struct device *port)
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{
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#if defined(CONFIG_I2C_DW_0_IRQ_DIRECT)
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IRQ_CONNECT(DT_I2C_0_IRQ, CONFIG_I2C_0_IRQ_PRI,
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IRQ_CONNECT(DT_I2C_0_IRQ, DT_I2C_0_IRQ_PRI,
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i2c_dw_isr, DEVICE_GET(i2c_0), DT_I2C_0_IRQ_FLAGS);
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irq_enable(DT_I2C_0_IRQ);
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#elif defined(CONFIG_I2C_DW_0_IRQ_SHARED)
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static void i2c_config_1(struct device *port)
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{
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IRQ_CONNECT(DT_I2C_1_IRQ, CONFIG_I2C_1_IRQ_PRI,
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IRQ_CONNECT(DT_I2C_1_IRQ, DT_I2C_1_IRQ_PRI,
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i2c_dw_isr, DEVICE_GET(i2c_1), DT_I2C_1_IRQ_FLAGS);
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irq_enable(DT_I2C_1_IRQ);
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}
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static void i2c_config_2(struct device *port)
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{
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IRQ_CONNECT(DT_I2C_2_IRQ, CONFIG_I2C_2_IRQ_PRI,
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IRQ_CONNECT(DT_I2C_2_IRQ, DT_I2C_2_IRQ_PRI,
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i2c_dw_isr, DEVICE_GET(I2C_2), DT_I2C_2_IRQ_FLAGS);
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irq_enable(DT_I2C_2_IRQ);
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}
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static void i2c_config_3(struct device *port)
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{
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IRQ_CONNECT(DT_I2C_3_IRQ, CONFIG_I2C_3_IRQ_PRI,
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IRQ_CONNECT(DT_I2C_3_IRQ, DT_I2C_3_IRQ_PRI,
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i2c_dw_isr, DEVICE_GET(I2C_3), DT_I2C_3_IRQ_FLAGS);
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irq_enable(DT_I2C_3_IRQ);
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}
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static void i2c_config_4(struct device *port)
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{
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IRQ_CONNECT(DT_I2C_4_IRQ, CONFIG_I2C_4_IRQ_PRI,
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IRQ_CONNECT(DT_I2C_4_IRQ, DT_I2C_4_IRQ_PRI,
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i2c_dw_isr, DEVICE_GET(I2C_4), DT_I2C_4_IRQ_FLAGS);
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irq_enable(DT_I2C_4_IRQ);
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}
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static void i2c_config_5(struct device *port)
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{
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IRQ_CONNECT(DT_I2C_5_IRQ, CONFIG_I2C_5_IRQ_PRI,
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IRQ_CONNECT(DT_I2C_5_IRQ, DT_I2C_5_IRQ_PRI,
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i2c_dw_isr, DEVICE_GET(I2C_5), DT_I2C_5_IRQ_FLAGS);
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irq_enable(DT_I2C_5_IRQ);
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}
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static void i2c_config_6(struct device *port)
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{
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IRQ_CONNECT(DT_I2C_6_IRQ, CONFIG_I2C_6_IRQ_PRI,
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IRQ_CONNECT(DT_I2C_6_IRQ, DT_I2C_6_IRQ_PRI,
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i2c_dw_isr, DEVICE_GET(I2C_6), DT_I2C_6_IRQ_FLAGS);
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irq_enable(DT_I2C_6_IRQ);
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}
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static void i2c_config_7(struct device *port)
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{
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IRQ_CONNECT(DT_I2C_7_IRQ, CONFIG_I2C_7_IRQ_PRI,
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IRQ_CONNECT(DT_I2C_7_IRQ, DT_I2C_7_IRQ_PRI,
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i2c_dw_isr, DEVICE_GET(I2C_7), DT_I2C_7_IRQ_FLAGS);
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irq_enable(DT_I2C_7_IRQ);
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}
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static int twi_##idx##_init(struct device *dev) \
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{ \
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IRQ_CONNECT(DT_I2C_##idx##_IRQ, \
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CONFIG_I2C_##idx##_IRQ_PRI, \
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DT_I2C_##idx##_IRQ_PRI, \
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nrfx_isr, nrfx_twi_##idx##_irq_handler, 0); \
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const nrfx_twi_config_t config = { \
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.scl = DT_I2C_##idx##_SCL_PIN, \
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@ -141,7 +141,7 @@ static int init_twim(struct device *dev, const nrfx_twim_config_t *config)
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static int twim_##idx##_init(struct device *dev) \
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{ \
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IRQ_CONNECT(DT_I2C_##idx##_IRQ, \
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CONFIG_I2C_##idx##_IRQ_PRI, \
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DT_I2C_##idx##_IRQ_PRI, \
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nrfx_isr, nrfx_twim_##idx##_irq_handler, 0);\
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const nrfx_twim_config_t config = { \
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.scl = DT_I2C_##idx##_SCL_PIN, \
|
||||
|
|
|
@ -257,6 +257,16 @@ static const struct i2c_driver_api api = {
|
|||
.transfer = i2c_qmsi_transfer,
|
||||
};
|
||||
|
||||
/* Some SoCs have interrupt controllers w/o priority, in that case set
|
||||
* it to 0 */
|
||||
#ifndef DT_I2C_0_IRQ_PRI
|
||||
#define DT_I2C_0_IRQ_PRI 0
|
||||
#endif
|
||||
|
||||
#ifndef DT_I2C_1_IRQ_PRI
|
||||
#define DT_I2C_1_IRQ_PRI 0
|
||||
#endif
|
||||
|
||||
static int i2c_qmsi_init(struct device *dev)
|
||||
{
|
||||
struct i2c_qmsi_driver_data *driver_data = GET_DRIVER_DATA(dev);
|
||||
|
@ -274,7 +284,7 @@ static int i2c_qmsi_init(struct device *dev)
|
|||
* to Lakemont core.
|
||||
*/
|
||||
IRQ_CONNECT(DT_I2C_0_IRQ,
|
||||
CONFIG_I2C_0_IRQ_PRI, qm_i2c_0_irq_isr, NULL,
|
||||
DT_I2C_0_IRQ_PRI, qm_i2c_0_irq_isr, NULL,
|
||||
DT_I2C_0_IRQ_FLAGS);
|
||||
irq_enable(DT_I2C_0_IRQ);
|
||||
QM_IR_UNMASK_INTERRUPTS(
|
||||
|
@ -284,7 +294,7 @@ static int i2c_qmsi_init(struct device *dev)
|
|||
#ifdef CONFIG_I2C_1
|
||||
case QM_I2C_1:
|
||||
IRQ_CONNECT(DT_I2C_1_IRQ,
|
||||
CONFIG_I2C_1_IRQ_PRI, qm_i2c_1_irq_isr, NULL,
|
||||
DT_I2C_1_IRQ_PRI, qm_i2c_1_irq_isr, NULL,
|
||||
DT_I2C_1_IRQ_FLAGS);
|
||||
irq_enable(DT_I2C_1_IRQ);
|
||||
QM_IR_UNMASK_INTERRUPTS(
|
||||
|
|
|
@ -343,7 +343,7 @@ static struct device DEVICE_NAME_GET(i2c0_sam);
|
|||
|
||||
static void i2c0_sam_irq_config(void)
|
||||
{
|
||||
IRQ_CONNECT(DT_I2C_0_IRQ, CONFIG_I2C_0_IRQ_PRI, i2c_sam_twi_isr,
|
||||
IRQ_CONNECT(DT_I2C_0_IRQ, DT_I2C_0_IRQ_PRI, i2c_sam_twi_isr,
|
||||
DEVICE_GET(i2c0_sam), 0);
|
||||
}
|
||||
|
||||
|
@ -373,7 +373,7 @@ static struct device DEVICE_NAME_GET(i2c1_sam);
|
|||
|
||||
static void i2c1_sam_irq_config(void)
|
||||
{
|
||||
IRQ_CONNECT(DT_I2C_1_IRQ, CONFIG_I2C_1_IRQ_PRI, i2c_sam_twi_isr,
|
||||
IRQ_CONNECT(DT_I2C_1_IRQ, DT_I2C_1_IRQ_PRI, i2c_sam_twi_isr,
|
||||
DEVICE_GET(i2c1_sam), 0);
|
||||
}
|
||||
|
||||
|
|
|
@ -330,7 +330,7 @@ static struct device DEVICE_NAME_GET(i2c0_sam);
|
|||
|
||||
static void i2c0_sam_irq_config(void)
|
||||
{
|
||||
IRQ_CONNECT(DT_I2C_0_IRQ, CONFIG_I2C_0_IRQ_PRI, i2c_sam_twihs_isr,
|
||||
IRQ_CONNECT(DT_I2C_0_IRQ, DT_I2C_0_IRQ_PRI, i2c_sam_twihs_isr,
|
||||
DEVICE_GET(i2c0_sam), 0);
|
||||
}
|
||||
|
||||
|
@ -360,7 +360,7 @@ static struct device DEVICE_NAME_GET(i2c1_sam);
|
|||
|
||||
static void i2c1_sam_irq_config(void)
|
||||
{
|
||||
IRQ_CONNECT(DT_I2C_1_IRQ, CONFIG_I2C_1_IRQ_PRI, i2c_sam_twihs_isr,
|
||||
IRQ_CONNECT(DT_I2C_1_IRQ, DT_I2C_1_IRQ_PRI, i2c_sam_twihs_isr,
|
||||
DEVICE_GET(i2c1_sam), 0);
|
||||
}
|
||||
|
||||
|
@ -390,7 +390,7 @@ static struct device DEVICE_NAME_GET(i2c2_sam);
|
|||
|
||||
static void i2c2_sam_irq_config(void)
|
||||
{
|
||||
IRQ_CONNECT(DT_I2C_2_IRQ, CONFIG_I2C_2_IRQ_PRI, i2c_sam_twihs_isr,
|
||||
IRQ_CONNECT(DT_I2C_2_IRQ, DT_I2C_2_IRQ_PRI, i2c_sam_twihs_isr,
|
||||
DEVICE_GET(i2c2_sam), 0);
|
||||
}
|
||||
|
||||
|
|
|
@ -43,11 +43,11 @@
|
|||
#define CONFIG_I2C_0_NAME DT_INTEL_QMSI_I2C_B0002800_LABEL
|
||||
#define DT_I2C_0_BITRATE DT_INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY
|
||||
#define DT_I2C_0_IRQ DT_INTEL_QMSI_I2C_B0002800_IRQ_0
|
||||
#define CONFIG_I2C_0_IRQ_PRI DT_INTEL_QMSI_I2C_B0002800_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_IRQ_PRI DT_INTEL_QMSI_I2C_B0002800_IRQ_0_PRIORITY
|
||||
#define CONFIG_I2C_1_NAME DT_INTEL_QMSI_I2C_B0002C00_LABEL
|
||||
#define DT_I2C_1_BITRATE DT_INTEL_QMSI_I2C_B0002C00_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_IRQ DT_INTEL_QMSI_I2C_B0002C00_IRQ_0
|
||||
#define CONFIG_I2C_1_IRQ_PRI DT_INTEL_QMSI_I2C_B0002C00_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_IRQ_PRI DT_INTEL_QMSI_I2C_B0002C00_IRQ_0_PRIORITY
|
||||
|
||||
#define CONFIG_RTC_0_NAME DT_INTEL_QMSI_RTC_B0000400_LABEL
|
||||
#define DT_RTC_0_IRQ DT_INTEL_QMSI_RTC_B0000400_IRQ_0
|
||||
|
|
|
@ -38,7 +38,7 @@
|
|||
#define DT_I2C_0_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_F0004000_BASE_ADDRESS
|
||||
#define DT_I2C_0_BITRATE DT_SNPS_DESIGNWARE_I2C_F0004000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_0_IRQ DT_SNPS_DESIGNWARE_I2C_F0004000_IRQ_0
|
||||
#define CONFIG_I2C_0_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_F0004000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_F0004000_IRQ_0_PRIORITY
|
||||
#define CONFIG_I2C_0_NAME DT_SNPS_DESIGNWARE_I2C_F0004000_LABEL
|
||||
#define DT_I2C_0_IRQ_FLAGS 0
|
||||
|
||||
|
@ -46,7 +46,7 @@
|
|||
#define DT_I2C_1_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_F0005000_BASE_ADDRESS
|
||||
#define DT_I2C_1_BITRATE DT_SNPS_DESIGNWARE_I2C_F0005000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_IRQ DT_SNPS_DESIGNWARE_I2C_F0005000_IRQ_0
|
||||
#define CONFIG_I2C_1_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_F0005000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_F0005000_IRQ_0_PRIORITY
|
||||
#define CONFIG_I2C_1_NAME DT_SNPS_DESIGNWARE_I2C_F0005000_LABEL
|
||||
#define DT_I2C_1_IRQ_FLAGS 0
|
||||
|
||||
|
|
|
@ -12,13 +12,13 @@
|
|||
#define CONFIG_I2C_0_NAME DT_ATMEL_SAM_I2C_TWI_4008C000_LABEL
|
||||
#define DT_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWI_4008C000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWI_4008C000_IRQ_0
|
||||
#define CONFIG_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_4008C000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_4008C000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWI_4008C000_PERIPHERAL_ID
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_40090000_BASE_ADDRESS
|
||||
#define CONFIG_I2C_1_NAME DT_ATMEL_SAM_I2C_TWI_40090000_LABEL
|
||||
#define DT_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWI_40090000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWI_40090000_IRQ_0
|
||||
#define CONFIG_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_40090000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_40090000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWI_40090000_PERIPHERAL_ID
|
||||
|
||||
#define DT_UART_SAM_PORT_0_NAME DT_ATMEL_SAM_UART_400E0800_LABEL
|
||||
|
|
|
@ -28,13 +28,13 @@
|
|||
#define CONFIG_I2C_0_NAME DT_ATMEL_SAM_I2C_TWI_40018000_LABEL
|
||||
#define DT_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWI_40018000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWI_40018000_IRQ_0
|
||||
#define CONFIG_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_40018000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_40018000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWI_40018000_PERIPHERAL_ID
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_4001C000_BASE_ADDRESS
|
||||
#define CONFIG_I2C_1_NAME DT_ATMEL_SAM_I2C_TWI_4001C000_LABEL
|
||||
#define DT_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWI_4001C000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWI_4001C000_IRQ_0
|
||||
#define CONFIG_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_4001C000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_4001C000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWI_4001C000_PERIPHERAL_ID
|
||||
|
||||
#define DT_UART_SAM_PORT_0_NAME DT_ATMEL_SAM_UART_400E0600_LABEL
|
||||
|
|
|
@ -38,21 +38,21 @@
|
|||
#define CONFIG_I2C_0_NAME DT_ATMEL_SAM_I2C_TWIHS_40018000_LABEL
|
||||
#define DT_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWIHS_40018000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0
|
||||
#define CONFIG_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWIHS_40018000_PERIPHERAL_ID
|
||||
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_4001C000_BASE_ADDRESS
|
||||
#define CONFIG_I2C_1_NAME DT_ATMEL_SAM_I2C_TWIHS_4001C000_LABEL
|
||||
#define DT_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWIHS_4001C000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0
|
||||
#define CONFIG_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWIHS_4001C000_PERIPHERAL_ID
|
||||
|
||||
#define DT_I2C_2_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_40060000_BASE_ADDRESS
|
||||
#define CONFIG_I2C_2_NAME DT_ATMEL_SAM_I2C_TWIHS_40060000_LABEL
|
||||
#define DT_I2C_2_BITRATE DT_ATMEL_SAM_I2C_TWIHS_40060000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_2_IRQ DT_ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0
|
||||
#define CONFIG_I2C_2_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_2_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_2_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWIHS_40060000_PERIPHERAL_ID
|
||||
|
||||
#define DT_SPI_0_BASE_ADDRESS DT_ATMEL_SAM_SPI_40008000_BASE_ADDRESS
|
||||
|
|
|
@ -29,7 +29,7 @@
|
|||
#define DT_I2C_0_BASE_ADDR DT_NORDIC_NRF_I2C_40003000_BASE_ADDRESS
|
||||
#define CONFIG_I2C_0_NAME DT_NORDIC_NRF_I2C_40003000_LABEL
|
||||
#define DT_I2C_0_BITRATE DT_NORDIC_NRF_I2C_40003000_CLOCK_FREQUENCY
|
||||
#define CONFIG_I2C_0_IRQ_PRI DT_NORDIC_NRF_I2C_40003000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_IRQ_PRI DT_NORDIC_NRF_I2C_40003000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_IRQ DT_NORDIC_NRF_I2C_40003000_IRQ_0
|
||||
#define DT_I2C_0_SDA_PIN DT_NORDIC_NRF_I2C_40003000_SDA_PIN
|
||||
#define DT_I2C_0_SCL_PIN DT_NORDIC_NRF_I2C_40003000_SCL_PIN
|
||||
|
@ -37,7 +37,7 @@
|
|||
#define DT_I2C_1_BASE_ADDR DT_NORDIC_NRF_I2C_40004000_BASE_ADDRESS
|
||||
#define CONFIG_I2C_1_NAME DT_NORDIC_NRF_I2C_40004000_LABEL
|
||||
#define DT_I2C_1_BITRATE DT_NORDIC_NRF_I2C_40004000_CLOCK_FREQUENCY
|
||||
#define CONFIG_I2C_1_IRQ_PRI DT_NORDIC_NRF_I2C_40004000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_IRQ_PRI DT_NORDIC_NRF_I2C_40004000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_IRQ DT_NORDIC_NRF_I2C_40004000_IRQ_0
|
||||
#define DT_I2C_1_SDA_PIN DT_NORDIC_NRF_I2C_40004000_SDA_PIN
|
||||
#define DT_I2C_1_SCL_PIN DT_NORDIC_NRF_I2C_40004000_SCL_PIN
|
||||
|
|
|
@ -62,7 +62,7 @@
|
|||
#define DT_I2C_0_BASE_ADDR DT_NORDIC_NRF_I2C_40003000_BASE_ADDRESS
|
||||
#define CONFIG_I2C_0_NAME DT_NORDIC_NRF_I2C_40003000_LABEL
|
||||
#define DT_I2C_0_BITRATE DT_NORDIC_NRF_I2C_40003000_CLOCK_FREQUENCY
|
||||
#define CONFIG_I2C_0_IRQ_PRI DT_NORDIC_NRF_I2C_40003000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_IRQ_PRI DT_NORDIC_NRF_I2C_40003000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_IRQ DT_NORDIC_NRF_I2C_40003000_IRQ_0
|
||||
#define DT_I2C_0_SDA_PIN DT_NORDIC_NRF_I2C_40003000_SDA_PIN
|
||||
#define DT_I2C_0_SCL_PIN DT_NORDIC_NRF_I2C_40003000_SCL_PIN
|
||||
|
@ -70,7 +70,7 @@
|
|||
#define DT_I2C_1_BASE_ADDR DT_NORDIC_NRF_I2C_40004000_BASE_ADDRESS
|
||||
#define CONFIG_I2C_1_NAME DT_NORDIC_NRF_I2C_40004000_LABEL
|
||||
#define DT_I2C_1_BITRATE DT_NORDIC_NRF_I2C_40004000_CLOCK_FREQUENCY
|
||||
#define CONFIG_I2C_1_IRQ_PRI DT_NORDIC_NRF_I2C_40004000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_IRQ_PRI DT_NORDIC_NRF_I2C_40004000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_IRQ DT_NORDIC_NRF_I2C_40004000_IRQ_0
|
||||
#define DT_I2C_1_SDA_PIN DT_NORDIC_NRF_I2C_40004000_SDA_PIN
|
||||
#define DT_I2C_1_SCL_PIN DT_NORDIC_NRF_I2C_40004000_SCL_PIN
|
||||
|
|
|
@ -25,12 +25,12 @@
|
|||
#define CONFIG_I2C_0_NAME DT_INTEL_QMSI_I2C_B0002800_LABEL
|
||||
#define DT_I2C_0_BITRATE DT_INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY
|
||||
#define DT_I2C_0_IRQ DT_INTEL_QMSI_I2C_B0002800_IRQ_0
|
||||
#define CONFIG_I2C_0_IRQ_PRI DT_INTEL_QMSI_I2C_B0002800_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_IRQ_PRI DT_INTEL_QMSI_I2C_B0002800_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_IRQ_FLAGS DT_INTEL_QMSI_I2C_B0002800_IRQ_0_SENSE
|
||||
#define CONFIG_I2C_1_NAME DT_INTEL_QMSI_I2C_B0002C00_LABEL
|
||||
#define DT_I2C_1_BITRATE DT_INTEL_QMSI_I2C_B0002C00_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_IRQ DT_INTEL_QMSI_I2C_B0002C00_IRQ_0
|
||||
#define CONFIG_I2C_1_IRQ_PRI DT_INTEL_QMSI_I2C_B0002C00_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_IRQ_PRI DT_INTEL_QMSI_I2C_B0002C00_IRQ_0_PRIORITY
|
||||
#define DT_I2C_1_IRQ_FLAGS DT_INTEL_QMSI_I2C_B0002C00_IRQ_0_SENSE
|
||||
|
||||
#define DT_GPIO_QMSI_0_NAME DT_INTEL_QMSI_GPIO_B0000C00_LABEL
|
||||
|
|
|
@ -45,7 +45,7 @@
|
|||
(DT_INTEL_CAVS_INTC_78800_IRQ_0 << 0))
|
||||
|
||||
#define DT_I2C_0_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_80400_IRQ_0_SENSE
|
||||
#define CONFIG_I2C_0_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_80400_IRQ_0_PRIORITY
|
||||
#define DT_I2C_0_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_80400_IRQ_0_PRIORITY
|
||||
|
||||
#define DT_SPI_0_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_E000_BASE_ADDRESS
|
||||
#define CONFIG_SPI_0_NAME DT_SNPS_DESIGNWARE_SPI_E000_LABEL
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue