Commit graph

28,390 commits

Author SHA1 Message Date
Guillaume Gautier
1455833a13 drivers: hwinfo: stm32: add support for stm32c5
Add HWINFO support for STM32C5 SoCs.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-19 11:39:33 +00:00
Guillaume Gautier
a1a6054e1a drivers: cache: stm32: adapt driver to stm32 hal2 syntax
On STM32 HAL2, LL_ICACHE functions expects the ICACHE instance as first
argument. Add a macro that will construct the correct list of arguments
depending on HAL version.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-19 11:39:33 +00:00
Francois Ramu
f7b1c8e2b9 drivers: serial: stm32: update driver for stm32 hal2
Add abstraction function to check the TX/RX fifo flags and enable/disable,
and redefine a few macros (like stop bits or data width) for STM32 HAL2.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2026-03-19 11:39:33 +00:00
Guillaume Gautier
1ab0cb53d9 drivers: flash: stm32c5: add flash support for stm32c5
Adds the support of Flash API for STM32C5.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-19 11:39:33 +00:00
Guillaume Gautier
8dc619ab35 drivers: intc: stm32: adapt driver for stm32 hal2
Adapt STM32 INTC driver for STM32 HAL2 and STM32C5.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-19 11:39:33 +00:00
Guillaume Gautier
95d66b3543 drivers: clock: add driver clock for stm32c5
Add driver clock for STM32C5.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-19 11:39:33 +00:00
Jane Gu
e720b99431 drivers: bt: hci: add realtek bee bt hci driver
Add Bluetooth HCI driver implementation for Realtek Bee family SoCs.

Signed-off-by: Jane Gu <jane_gu@realsil.com.cn>
2026-03-19 11:39:07 +00:00
Fin Maaß
6fef8582ce drivers: ethernet: lan865x: use phy-handle
use the dt prop `phy-handle' to get the phy.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2026-03-19 11:37:05 +00:00
sree sreerajatha
12136b4eda drivers: counter: silabs add counter driver support for Silabs xg24 boards
Added Silabs Kconfig support for counter driver and implemented the
counter APIs using protimer underneath.

Signed-off-by: sree sreerajatha <sree.sreerajatha@silabs.com>
2026-03-19 11:36:21 +00:00
Camille BAUD
a6d0b4658b drivers: display: Introduce ST7586S
Introduces ST7586S 16-levels grayscale display

Signed-off-by: Camille BAUD <mail@massdriver.space>
2026-03-19 11:35:53 +00:00
Pisit Sawangvonganan
04b3c3b319 drivers: pinctrl: stm32: fix typo
Fix a typo in `pinctrl_configure_pins` where the variable `pin_cgf`
was used instead of `pin_cfg`. Update all references accordingly.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2026-03-19 11:33:35 +00:00
Bert Abrath
fe0ad472cd drivers: gpio: sam: only call back when interrupt is actually enabled
ISR bits are set on input level or edge changes, regardless of whether an
interrupt is actually enabled on that line. Therefore, we check whether an
interrupt is actually enabled by masking with IMR. If we didn't do this,
some other enabled interrupt firing could also result in a callback for a
disabled interrupt.

Signed-off-by: Bert Abrath <bert.abrath@basalte.be>
2026-03-19 11:32:53 +00:00
Rex Chen
d2a8820dac drivers: wifi: nxp: Add CSI buffer configure item
Add CSI buffer entry and size configure item.

Signed-off-by: Rex Chen <rex.chen_1@nxp.com>
2026-03-19 15:28:53 +09:00
Duy Nguyen
29d7529518 drivers: gpio: Add missing port init for RX GPIO
The RX GPIO was originally develop for RX130 MCU which only have port
0 to 5 and A to J, this commit add missing port initialize for other RX
MCU family

Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
2026-03-19 15:27:18 +09:00
Duy Nguyen
025402e981 flash: renesas: rx: Add flash type config for RX26T MCU
Add new configuration to support flash type config on RX26T

Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
2026-03-19 15:27:18 +09:00
Gabriele Zampieri
96f6dc50ac drivers: adc: max2253x: initial driver support
The max2253x family is a Field-Side Self-Powered, 4-Channel,
12-bit, Isolated ADC.

Signed-off-by: Gabriele Zampieri <gabriele.zampieri@arsenaling.com>
2026-03-19 12:29:32 +09:00
Christopher Smith
b30a5a9f11 drivers: pwm: esp32: add pinctrl initialization for mcpwm capture
The ESP32 MCPWM driver does not initialize the pinctrl configuration if
only the capture units of MCPWM are used and no other MCPWM outputs are
used. This leads to pwm capture requests timing out. Fix this by applying
the pinctrl configuration during module initialization.

Signed-off-by: Christopher Smith <christophersmith107@gmail.com>
2026-03-18 17:46:32 -05:00
John Batch
71a2db325b drivers: clock: infineon: removing unused hw_resource from peri_clk
- Removes the unused items from the device structures for peri clock.
- Removes the now unused `resource-type`, `resource-instance`, and
  `resource-channel` binding properties.
- Updates the Migration Guide with removed binding properties.
- Remove the binding properties from board, samples, and test overlays.

Assisted-by: GitHub Copilot:claude-opus-4.6
Signed-off-by: John Batch <john.batch@infineon.com>
2026-03-18 17:44:09 -05:00
Camille BAUD
45db05a520 drivers: cache: bflb_l1c: Make disable not break device
With Bypass enabled, the MCU doesn't work.
Instead, set waydisable to 0xf (all ways disabled), and
disable bypass.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2026-03-18 17:40:26 -05:00
William Markezana
d547042bf9 drivers: bflb: extend shared drivers with BL70XL SoC support
Add CONFIG_SOC_SERIES_BL70XL to preprocessor conditionals across
existing Bouffalo Lab drivers that share register-compatible code
paths with BL60x/BL70x:

- cache: L1C flush-enable workaround applies to BL70XL
- flash: XIP address defines, L1C wrap, QPI JEDEC ID support
- gpio: BL70XL includes, fix BIT() usage for pin set/clear
- i2c: clock source calculation
- serial: UART clock divider, guard UART1 (BL70XL has only UART0)
- spi: GLB address and FIFO size, clock calculation
- syscon: efuse SAHB clock selection
- input: IR receiver pin mapping and clock divider

Signed-off-by: William Markezana <william.markezana@gmail.com>
2026-03-18 17:40:26 -05:00
William Markezana
c25890aa2b drivers: pinctrl: bflb: add BL70XL support to shared BL60x/BL70x driver
Extend the shared pinctrl driver for BL70XL:
- Use 4 UART signal routing slots (vs 8 on BL60x/BL70x)
- Add XTAL32K pin muxing disable for GPIO30/31
- Handle key scan drive function (disable IE)
- Replace magic numbers with register field defines
- Add BL70XL to pinctrl CMakeLists.txt (reuses bl60x_70x driver)

Signed-off-by: William Markezana <william.markezana@gmail.com>
2026-03-18 17:40:26 -05:00
William Markezana
a4a56726df drivers: clock_control: Update BL70x clock_control to BL70x/L
Handle BL70xL in BL70x driver

Signed-off-by: William Markezana <william.markezana@gmail.com>
2026-03-18 17:40:26 -05:00
Thomas Decker
59905cdbac driver: clock_control: stm32_ll_h7: Fix SYSCLK/HCLK mix and more
Fixes the mix-up of HCLK and SYSCLK in h7 clock driver and also makes sure
to calculate the correct startup frequency:
- Take care of bootloader might already have configured clocks instead of
  relying on #defines/dts).
- Use HAL HSI_VALUE instead of STM32_HSI_FREQ which can be 0 if hsi node
  is disabled in DT (but is default on after reset...)

Also move calculation of old_hclk_freq above set_up_plls() during
stm32_clock_control_init(), which can change the current clock setting and
make it impossible to get the previous clock.

Remove not needed special handling for h7rsx controllers.

Add a comment to the clk_hsi node in the h7x / h7rsx DT stating that the
clock is enabled by default after reset.

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2026-03-18 17:37:15 -05:00
Fin Maaß
a8a4201469 drivers: net: nsos: use net_if_socket_offload_set()
use net_if_socket_offload_set().

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2026-03-18 15:27:24 -05:00
Fin Maaß
6c9f402c0f drivers: net: wifi: ethernet: use net_if_get_device()
use the provided net_if_get_device() function
to get the device.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2026-03-18 15:27:24 -05:00
Missael Maciel
c092468dc1 drivers: flash: flash_mcux_flexspi_nor: Add support for memory W25Q256
Memory W25Q256 support added into flash driver. If someone
uses this memory, the driver will configured into 4-bytes
address mode which will cause issues with the bootROM for
some NXP's RTs/RW microcontrollers.

Signed-off-by: Missael Maciel <davidmissael.maciel@nxp.com>
2026-03-18 15:26:53 -05:00
Brenden Adamczak
b22634d1d2 drivers/sensor: lsm6dsvxxx: fix i2c transfer len
Fix I2C transaction len using the correct size of the data to be sent
and not the returned length of the allocated buffer.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Brenden Adamczak <cerebralasylum1@gmail.com>
Co-authored-by: Armando Visconti <armando.visconti@st.com>
2026-03-18 15:24:26 -05:00
Josuah Demangeon
1547179e0a drivers: video: fix ARGB32/XRGB32 formats and variants.
Fix the representation of pixel formats with an X (unused) or A (alpha)
channel to make the four character match the order in the channels in
memory byte per byte.

These formats are imported from Linux but contain a naming inconsistency.

The four character codes still match the Linux formats from V4L2
include/uapi/linux/videodev2.h based on the byte content rather than the
name: this means that communicating with Linux systems will work, but
sharing source code with Linux will need to modify the variable names.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2026-03-18 15:24:12 -05:00
Sergei Ovchinnikov
5aaa51286a drivers: mfd: mfd_npm10xx dts bindings and driver
Nordic's nPM10 Series PMIC Multi-function Device devicetree properties and
driver.

Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
2026-03-18 15:22:16 -05:00
Shankar Ramasamy
e521064e64 drivers: adc: microchip: Update ADC G1 driver for PIC32CM_JH01
Update ADC G1 driver implementation to support PIC32CM_JH01

Signed-off-by: Shankar Ramasamy <shankar.ramasamy@microchip.com>
2026-03-18 15:21:47 -05:00
Francois Ramu
ac98131ff0 drivers: memc: stm32_xspi_psram: add support for STM32H5E/F
Name the XSPI 1/2 depending on the stm32 series.
It could be mixed between XSPI or OCTOSPI depending
on the module HAL.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2026-03-18 15:21:14 -05:00
Francois Ramu
6e87d2e225 driver: flash: stm32 xspi driver with abstraction on port naming
Name the XSPI 1/2 depending on the stm32 series. It could be mixed between
XSPI or OCTOSPI depending on the module HAL.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2026-03-18 15:21:14 -05:00
Jacob Wienecke
8f24bebe64 i2s: mcux_flexcomm: add PM device support
Add pm_action callback with PINCTRL_STATE_SLEEP on suspend and
PINCTRL_STATE_DEFAULT on resume. Register the driver with
PM_DEVICE_DT_INST_DEFINE so the PM framework calls the callback
during system sleep transitions.

If no sleep pinctrl state is defined in DTS, the suspend call
is a no-op.

Signed-off-by: Jacob Wienecke <jacob.wienecke@nxp.com>
2026-03-18 15:20:21 -05:00
Jiafei Pan
ba8fce930f soc: imx93: add flexspi clock configuration
Add flexspi clock configuration for i.MX 93.

Signed-off-by: Joe Zhou <zhongcai.zhou@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2026-03-18 15:18:39 -05:00
Phuc Hoang
2c05145d6b driver: crc: Add Silabs gpcrc driver
Add Silabs General GPCRC driver for Series 2 boards
Enable crc sample and test cases for Silabs series 2

Tested on real boards and compared result with all CRC16
and CRC32-IEEE algorithm

Signed-off-by: Phuc Hoang <donp172748@gmail.com>
2026-03-18 15:18:02 -05:00
Laurentiu Mihalcea
59f1ebdccf firmware: scmi: add support for shell commands
Add initial support for SCMI shell commands. For now, this only includes
clock protocol-related commands. Other SCMI protocols will be added
incrementally.

Part of #103633.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2026-03-18 15:16:14 -05:00
Laurentiu Mihalcea
8139eb2e1f firmware: scmi: clk: implement CLOCK_ATTRIBUTES command
Add function implementing the CLOCK_ATTRIBUTES command.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2026-03-18 15:16:14 -05:00
Soumya Tripathy
62bdd9a7e2 drivers: firmware: scmi: add SMC transport support
Add support for SCMI transport layer using ARM SMC (Secure Monitor
Call) as the doorbell mechanism with shared memory for data transfer.
Communication is performed synchronously so polling is the only
supported mode. The implementation follows the SCMI specification
for SMC/HVC based transport.

Signed-off-by: Soumya Tripathy <s-tripathy@ti.com>
2026-03-18 15:13:41 -05:00
Soumya Tripathy
a132036b2d drivers: firmware: scmi: add polling_only support for transport
Add polling_only flag to scmi_channel structure to support transports
that require polling mode (e.g., SMC transport which uses synchronous
SMC/HVC calls without interrupt support).

Signed-off-by: Soumya Tripathy <s-tripathy@ti.com>
2026-03-18 15:13:41 -05:00
Etienne Carriere
e237a97b82 west.yml: update the hal_stm32 modules with new stm32cube packages
stm32wbxx bump to version to 1.24.0
stm32wlxx bump to version 1.4.0

Update dma_stm32.h to sync with HAL new function prototype for
LL_DMA_IsActiveFlag_HT*() functions that now expect a const pointer
on STM32WLX series.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2026-03-18 15:11:59 -05:00
Johann Fischer
c20654adf4 drivers: udc: use regulator driver in DWC2 nRF54LM20A vendor quirks
Use Nordic VREGUSB regulator driver in DWC2 nRF54LM20A vendor quirks.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2026-03-18 15:11:16 -05:00
Johann Fischer
c517c0cba9 drivers: regulator: add driver for Nordic USB VBUS regulator
Add driver for internal voltage regulator for the USB signaling
interface.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Co-Authored-by: Carles Cufi <carles.cufi@nordicsemi.no>
2026-03-18 15:11:16 -05:00
Johann Fischer
851480f8b3 dts: nordic: describe USB hardware wrapper in nRF54LM20A
We need to describe the wrapper separately as a parent node because it
is not part of the USB controller but is used to configure, control, and
enable/disable the USB PHY, and to enable/disable USB controller.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2026-03-18 15:11:16 -05:00
Tim Pambor
c5857bbe67 drivers: disk: ftl: fix deprecation warning
Replace deprecated FIXED_PARTITION_BY_NODE by PARTITION_BY_NODE
to avoid build warnings.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2026-03-18 09:15:54 -07:00
Holt Sun
37d6ffa989 drivers: ieee802154: mcxw: require dedicated counter
When lptmr0 is reserved as the system timer, the MCXW IEEE 802.15.4
radio cannot rely on a separate counter device being instantiated for it.
The fallback to the kernel cycle counter is also not a valid replacement
for hardware timestamping in all timer configurations.

Add a counter phandle to the MCXW binding, wire the MCXW7x boards in scope
to use lptmr1 as a dedicated non-system-timer counter, and make the driver
consume that devicetree-provided counter directly.

This keeps the fix narrow to the boards enabled in this PR while removing
the fragile hard-coded lptmr0/lptmr1 selection logic.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2026-03-18 08:45:36 -05:00
Holt Sun
020d465247 drivers: counter: mcux_lptmr: fix unused function warning
When all LPTMR instances are reserved as the system
timer, the counter driver has no instances to create.
The static init and ISR functions become unused,
causing -Werror=unused-function build failures.

Guard the entire driver body with a preprocessor check
that counts usable (non-system-timer) LPTMR instances.
When the count is zero the file compiles to nothing.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2026-03-18 08:45:36 -05:00
Fin Maaß
7d74695fa3 drivers: sensor: ina226: add support for SHUNT_VOLTAGE
For the ina226 shunt voltage is implemented and supported,
unfortunatly it was forgotten to select
INA2XX_HAS_CHANNEL_SHUNT_VOLTAGE.
Since 70423db9d1c69d32597ba1f7b2fe66569014a4b0 it will
no longer build. This fixes it.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2026-03-18 08:45:02 -05:00
Sylvio Alves
b1daf9f62f drivers: mipi_dbi: esp32: update driver to meet HAL changes
Update the MIPI DBI ESP32 driver to match the renamed/split LCD HAL
APIs from the latest hal_espressif sync:
- soc/gdma_channel.h moved to hal/gdma_channel.h
- lcd_ll_set_data_width() split into lcd_ll_set_dma_read_stride()
  and lcd_ll_set_data_wire_width()
- lcd_ll_enable_rgb_yuv_convert() renamed to
  lcd_ll_enable_color_convert()

Also update west.yml hal_espressif revision.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2026-03-18 08:44:49 -05:00
Seppo Takalo
474c6db093 drivers: modem: cellular: Close UART before updating baud rate
Some UART drivers (for example nrfx) might return -EBUSY, if we
try sequence of close->change baud->open without any delay.

Instead, close the UART pipe and wait for BUS_CLOSED event before
reconfiguring the baud rate.
Then wait for the timeout to pass, before continuing with dial script.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2026-03-18 08:42:02 -05:00
Yves Wang
e2c0dad4fb drivers: watchdog: nxp_s32: fix soft-lock unlock wait
Correct the syntax to check soft unlock status.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2026-03-18 08:39:33 -05:00