Change the npm13xx_charger fetch function to first trigger a sample
and then block until the result is available.
Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
Use information provided in the dts node for the MSPI controller
regarding maximum amount of data that can be transferred in one
packet and split the requested transfers if necessary.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
nRF71 supports tri-band, so, to cater both nRF70 and nRF71, rejig the
configuration and add a helper to convert from Kconfig to the interface
structs.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
CCC operation fails when no known devices exist, causing whole bus
initialization procedure to fail. Do not initialize the bus if no known
devices exist.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
A race condition occurs when the TX DMA callback is triggered before
the `dma_stat` variable is initialized to zero. This leads to
`dma_stat` being reset after the DMA TX done flag is already set.
To prevent this, move the initialization of `dma_stat` before starting
the DMA load operation.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Issue based on rebasing with in-flight changes where the callback adds
an argument on the readout transfers. Moreover, handle that result and
error if failure.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
The DMA configurations for TX and RX were mixed-up
letting the DMA RX channel not fully configured.
This fix correctly configures the DMA RX channel
with DMA_ADDR_ADJ_NO_CHANGE.
Signed-off-by: Rémy Dziemiaszko <remy.dziemiaszko@smile.fr>
Siwx91x memory controller is currently 4 times slower than expected.
Investigations point out the clock is not correct.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
In the original HAL, sl_si91x_psram_init() and sl_si91x_psram_uninit() were
also in charge of configuring the pinctrl and the clocks. A workaround
have been introduced to avoid change in pinctrl but they still changed the
clock configuration.
We definitely need to expose the clock configuration to Zephyr users. The
HAL has been patched to split the sl_si91x_psram_*init() function in
smaller pieces. So it is possible to configure the devic without changing
the clock or the pinctrl. Let's use these new functions.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Move the RAIL interrupts installer from the Bluetooth HCI driver
to the SoC layer so that it can be used by other subsystems
as well.
Signed-off-by: David Boullie <David.Boullie@silabs.com>
Without this check, `spi_context_unlock_unconditionally()` is capable
to release the SPI bus semaphore (ctx->lock) which might be taken by
another SPI slave device in the meantime.
Actually, this race condition happens when `spi_release()` is called
when the SPI slave device in question (spi_cfg) has already released
its chip select and also the SPI bus lock semaphore.
So, any not required call of `spi_release()` may result in a SPI
communication issue where the SPI bus lock, held by another SPI
slave device, is prematurely released.
The observable result is the simultaneous engagement of two SPI
chip selects after such an SPI release call.
Signed-off-by: Stefan Schwendeler <Stefan.Schwendeler@husqvarnagroup.com>
Spinlocks in functions virtconsole_control_recv_cb and
virtconsole_send_control_msg were unnecessary since those were called
from virtio_pci_isr or virtio_mmio_isr, which already use spinlocks.
Signed-off-by: Jakub Klimczak <jklimczak@internships.antmicro.com>
There was a bug in the VIRTIO Console driver which could cause a deadlock
by attempting to add buffers to the control-tx virtqueue too fast and
with an infinite timeout.
This commit fixes it by placing messages that couldn't be sent in a FIFO
queue and taking care of them later in a callback function.
Signed-off-by: Jakub Klimczak <jklimczak@internships.antmicro.com>
`TIMER_MAX` is part of POSIX and defined in limits.h.
To avoid conflict with the standard, namespace the local definition with a
`NPM13XX_` prefix.
This fixes an issue that appeared in weekly CI:
https://github.com/zephyrproject-rtos/zephyr/actions/runs/18437938778/\
job/52533996345
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
Update serial driver support for RX MCU:
- Add DTC support for SCI UART driver.
- Implementation Async APIs for serial driver.
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
Initial commit to support DTC driver on Renesas RX130.
* drivers: DTC: implementation for DTC driver on RX130.
* dts: rx: update dts node in SoC layer to support DTC on RX130.
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
Adds a very rudimentary driver for getting some entropy from the
edgelock subsystem random number generator.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Memory APS6404L does not support address shift feature.
Since it is being configured for different platforms that uses this
memory, this is cauing an error while building.
Signed-off-by: Missael Maciel <davidmissael.maciel@nxp.com>
Revert a change that broke the stable API function shell_set_bypass.
This reverts commit 6b876dba1ba61b659b1b2d4c3ccd0ac41bd56027.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Correct mdio_stm32_read() and mdio_stm32_write() to return a valid errno
instead of mixing HAL return values and errno return values.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add missing empty line between local variable definitions and
instructions in eth_stm32_set_mac_config().
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Clean tests on HAL_ETH_SetDMAError() and HAL_ETH_GetDMAError() return
value to explicitly test against 0.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Disabling the internal regulator is immediate so there is no need to check
the state of the Enable bit in the register.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Use the new differential support property instead of relying on the series
name to determine if the ADC supports differential input channels.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Use the new channel preselection property instead of relying on the series
name to determine if the ADC channels need to be preselecting.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Use the new deep powerdown property instead of relying on the series name
to determine if the ADC needs to be be put out or into deep powerdown mode.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Use the new internal regulator property instead of relying on series name
to determine if the regulator should be enabled, and how to check that it
is ready.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
For managing the CCRDY flag, rely on the presence of the LL constant
LL_ADC_FLAG_CCRDY rather than a list of series.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add support for SMBus packet error checking (PEC) to the stm32 driver.
This feature allows SMBust communication to be slightly more robust in
the presence of noise, in that packet errors can be detected on the
receive side.
Signed-off-by: Andrew Lewycky <alewycky@tenstorrent.com>
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
In the case that SMBus hardware does not automatically perform packet
error checking (PEC), provide generic inline functions in
`zephyr/drivers/smbus.h` that can be used by drivers to perform PEC in
software.
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
Signed-off-by: Andrew Lewycky <alewycky@tenstorrent.com>
Rework Andes-specific CSR to use RISC-V custom CSR common code.
Move these stuff to 'arch/riscv/custom/andes':
1. Rename 'soc_v5.h' to 'andes_csr.h' for CSR definitions.
2. Replace '_start' with '__reset' hook for low-level CSR initialization.
3. Move CSR context to common macro '__custom_csr_save/restore_context'.
4. Move 'EXECIT' CSR support to common code.
5. Move PMA CSR driver to common code.
6. Use RISC-V common linker.ld instead of SoC-specific linker.ld.
Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
