write enable already happens in the write/erase loop
before every write and erase. It is done in the loop,
because it is self cleaning after erase and write.
That is also the reason we don't need to disable it,
as it is automatically disabled after each write and erase.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Add an explicit check to ensure that the acquisition_time
parameter is encoded with the ADC_ACQ_TIME macro and uses
the TICKS unit, as required by the API.
If the unit is not correct, log an error and return -EINVAL.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
On certain platforms I2C is not enabled by default, causing build error.
Change pca_series driver to select I2C.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
The reset function is originally designed to have no return value. If
the GPIO toggle fails, there's no indication for failure until I2C
transaction fails. Account for this by adding return value to the reset
function.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
add support for pca9538, pcal9539.
Add support for pcal6408 and pcal6416, which is originally supported
by pcal64xxa driver. These device has the same register layout as
pcal9538 and pcal9539 respectively, which means they can be seamlessly
supported by pca_series driver.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
The only information for 4s-4d-4d, 8s-8s-8s and 8d-8d-8d in the basic flash
parameter table is in DWORD20 with one byte for each of the aforementioned
modes. This one byte is split into two fields that contain that mode's
maximum operation speed with and without data strobe. Unsupported fields
have the value of 0xF. For the mode to be supported, at least one of the
two fields must not be 0xF, so we check the byte against 0xFF.
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
100 ms is insufficient time enter command mode after `CMUX` on at least
one modem (Telit LE910Cx), and waiting 5 seconds before retrying seems
excessive.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add system timer driver support for RZ/V2L, RZ/A3UL
Signed-off-by: Hoang Nguyen <hoang.nguyen.jx@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
drivers: timers: Improve ISR Prototype for Renesas RZ
Explicitly cast data->atime to uint32_t to
prevent signed promotion and sign extension
when multiplying with data->again.
Signed-off-by: Manoj Purushothama <hpmanoj@umich.edu>
- Add a new counter driver implementation based on the PDL for
Infineon CAT1B devices. This enables support for hardware
counters on the PSC3M5 platform.
- Add IFX_TCPWM_Counter_DeInit and IFX_TCPWM_Counter_Init
macros to include/zephyr/drivers/timer/ifx_tcpwm.h
and sort all of the macros in that file
Signed-off-by: Yurii Lozynskyi <yurii.lozynskyi@infineon.com>
Including soc.h is causing issues - drop as it's not needed
Fixes e.g. the below:
west build -p -b em_starterkit@2.2.0/emsk_em7d \
tests/drivers/build_all/w1 -T drivers.w1.build
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This mimics IPC transport behavior where BR/EDR Inquiry events as
well as LE Extended Advertising Report (carring legacy PDU) are
considered discardable.
Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
The transmit functions will return an error code, instead of a boolean
value. To prepare for this, the API calls are temporarily implemented in
two variants, for old and new API declarations.
The presence of new API will be detected by the use of
NRF_802154_TX_FUNCTIONS_RETURN_ERROR_CODE macro, which will be
unconditionally defined by a newer nrf-802154 driver.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Because the PWM module mixes byte and word register together, the driver
adds an assertion check by writing a pattern to the 2-byte register
`PRSC`, reading it back, and performing a comparison. However,
the `PRSC` register cannot be written when the bit 7 (the PWR bit) in
register `PMWCTLn` is set to 1. This commit moves the assertion check to
a proper place to ensure the write is valid.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
If two pwm_set_pulse_dt calls are put consecutive to each other,
the period has already been configured and they refer to the same module
but different submodule (PWM A & B), the second call fails.
LDOK with ReloadImmediate should result in immediate change of the
buffered registers, but it doesn't seem like that's the case.
To fix this, we busywait on LDOK clearance before setting new pulse values.
Fixeszephyrproject-rtos/zephyr#95653
Signed-off-by: Alejandro Perea <alejandro.perea@classified-cycling.cc>
This commit enables the pm device runtime driver support
for the uart_ns16550 driver (only for devices that have an
associated power domain enabled).
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
1. Added siwx91x power domain node in siwg917.dtsi
2. Updated UART device nodes to reference the newly added power domain.
3. Implemented power domain driver to manage power domain transitions
for the SoC.
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
Extract the user pipe setup and claim/release logic so that it can be
re-used by other software modules, if the AT shell is not used. Ideally
the chat instance would live within the `modem_at_user_pipe.c` and be
handed out by `modem_at_user_pipe_claim`, but the current chat API
doesn't make this possible.
Signed-off-by: Jordan Yates <jordan@embeint.com>
just disable irq and not plush pending events,
so we don't loose them, when they are enabled
again.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
The dma has to be enabled on the platform in order for ASYNC API to
work. This can be indicated by whether or not any LPUART node has the
`dmas` property set.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
r_sdhi_wait_for_event requires input timeout as us but the current
implemetation using timeout_ms instead
Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
Switch to using the new NXP_ENABLE_WAKEUP_SIGNAL and
NXP_DISABLE_WAKEUP_SIGNAL macros to avoid adding
platform specific calls in the Zephyr drivers.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Ensuring flash region has been erased before writing to avoid
inconsistences and force expected erased value (0xFF) into
flash when erasing a region when Hardware Flash Encryption is
enabled
This is handled on this implementation because MCUboot's state
machine relies on erased valued data (0xFF) readed from a
previously erased region that was not written yet, however when
hardware flash encryption is enabled, the flash read always
decrypts whats being read from flash, thus a region that was
erased would not be read as what MCUboot expected (0xFF).
Signed-off-by: Almir Okato <almir.okato@espressif.com>
Convert address for dma when update tcd registers.
- This commit fixes a bug that dma reports source/destination bus errors
when dma try to access the unconveted addresses. The unconverted
addresses will be reserved address from dma view.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Remove the calls to LL_TIM_ENCODER_StructInit and LL_TIM_ENCODER_Init
in the QDEC driver. This avoids calling functions from stm32xxxx_ll_tim.c.
They are replaced by a set of simpler functions from the header file.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Align the definition of the complementary channels to the normal channels.
That way, it is consistent for all arrays, we use channel-1 as index, and
no other operation is necessary.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This change reduces the level of pointer indirection, which minimizes
repeated dereferencing and helps reduce the overall code size, in the same
way as commit 48e326a5520ec884f38f6a7ac4e88c59a01ceb95 for UART.
This also fixes the type complimentary -> complementary.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove the calls to LL_TIM_xx_StructInit and LL_TIM_xx_Init in the PWM
driver. This avoids calling functions from stm32xxxx_ll_tim.c.
They are replaced by a set of simpler functions from the header file.
OC Init in particular is much simpler now. The init structure needed to be
filled out with the complementary channel (if it existed), even though its
configuration didn't change.
The new init is much more direct and only touches what needs to be
modified.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove the calls to LL_TIM_StructInit and LL_TIM_Init in the counter
driver. This avoids calling functions from stm32xxxx_ll_tim.c.
They are replaced by a set of simpler functions from the header file.
Also replaces some macros that used constants coming from the HAL. Use
an equivalent coming purely from the LL.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Initial driver for SF32LB SoCs. This driver is incomplete, but allows
to configure the system for a minimal boot.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
SDRAM1 / SDRAM2 / PSRAM sections were being referenced in order to make
them accessible for the framebuffer. This is now addressed via the
mechanism provided by Zephyr hence this is no more necessary.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Use the LINKER_DT_NODE_REGION_NAME macro in order to get the
memory-region into which to put the framebuffer for the LTDC.
This is made possible since all memory areas have the
zephyr,memory-region compatible, allowing to have each region
referenced within the linker script generated by Zephyr.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
