Send the vendor-specific RF power mode command from within open(),
through the HCI lockstep helper and the driver's own send path, instead
of implementing the setup() driver API op on top of the Host's
bt_hci_cmd_send_sync(). The response is consumed in the driver's
receive callback by feeding received packets to the lockstep helper
before delivering them to the host.
The driver no longer calls any Host command API, so the configuration
now also runs in controller-only builds, and it no longer selects
BT_HCI_SETUP. A failing or unanswered command fails open() with an
error instead of failing the Host's HCI initialization later, and is
logged by the helper.
The raw send path is factored out of send() and takes the device, so
that it serves both the send() op and the helper. The helper is
initialized once, from the device init function, so that reopening the
transport does not re-initialize its semaphore.
Tested on siwx917_rb4338a with the peripheral_hr sample.
Assisted-by: Claude:claude-fable-5-1
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
Use the common framebuffer configuration and data structures to
simplify the Intel multiboot framebuffer driver and replace the
driver-specific read and write implementations with the common
framebuffer helpers.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Use the common framebuffer configuration and data structures to
simplify the QEMU ramfb driver and replace the driver-specific read
and write implementations with the common framebuffer helpers.
Update the ramfb devicetree binding to use simple-framebuffer.yaml
and rename the fwcfg property to firmware.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Use the common framebuffer configuration and data structures to
simplify the Raspberry Pi BCM2711 framebuffer driver and replace
the driver-specific read and write implementations with the common
framebuffer helpers.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Add a shared display_framebuffer library providing generic
read/write implementations for framebuffer-backed display
drivers (config/data structs, DT helper macros, and
display_framebuffer_read()/write()).
Add CONFIG_DISPLAY_FRAMEBUFFER to gate the new source file.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
The runtime magnetometer ODR table started with a bogus 0 Hz entry
copied from the accelerometer table, shifting every M_ODR code by one
so each requested rate programmed the next one up, and 100 Hz wrote a
reserved code. Drop the leading entry so the array index matches the
CTRL_REG5_XM M_ODR encoding used by LSM9DS0_MFD_MAGN_DEFAULT_M_ODR.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
SENSOR_CHAN_DIE_TEMP returned the raw OUT_TEMP_[LH]_XM count directly
as val1, so a die a few degrees above the reference was reported as
hundreds of degrees. Scale the 12-bit right-justified two's complement
sample by its 8 LSB/degC sensitivity and apply the ~25 degC reference
offset, re-normalising the sign from bit 11.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
Add a small OS helper for validating and copying a boot firmware device
tree blob into caller-owned storage.
The helper checks the FDT magic and total-size fields, verifies that
the caller-provided destination is large enough, copies the blob, and
returns 0 or a negative errno value. It does not own the destination
buffer or make policy decisions about which firmware argument contains
an FDT.
Add optional Xen support for preserving the boot device tree blob from
the first firmware argument when running on xenvm. The Xen driver code
owns the storage and policy, then exposes the copied data through
xen_fdt_get().
Signed-off-by: Vladyslav Goncharuk <vladyslav_goncharuk@epam.com>
Assisted-by: Codex:gpt-5
This commit enables the new clock managers by switching the device
tree to use the new bindings. It also moves some initialization code
from the old clock manager to soc_early_init_hook() since some clocks
configuration needs to be done before the clock drivers are initialized.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Introduce dedicated clock-control drivers for HP, ULP and AON domains
plus the shared helper API used by consumers, and refresh helper
documentation to match the current DT wiring and ownership model.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Rename and extend SiWx91x clock IDs, then update the existing legacy
clock manager and current siwg917 DTS users to the new names.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
The driver rejects PM_DEVICE_ACTION_TURN_OFF with -ENOTSUP, so a power
domain cannot tell it that the supply is about to go away. Accept the
action instead. There is nothing to save: TURN_ON already rebuilds the
whole register bank from data->uart_config, and SUSPEND has stashed the
interrupt mask in data->pm_saved_int, so re-reading the mask here would
only record the zero SUSPEND left behind.
This matters on SoCs where a low-power state collapses the LPUART power
domain. Baud rate, format and enables are all lost, and without a TURN_OFF
the domain never gets to re-run TURN_ON: the first write after the window
stalls on a transmitter that is no longer clocked, or bus-faults on the
block.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
The wrapper rejects PM_DEVICE_ACTION_TURN_OFF with -ENOTSUP, so a power
domain cannot tell it that the supply is about to go away. Accept the
action instead. There is nothing to save: both the reset line and
PSELID[PERSEL] are recomputed from the devicetree in TURN_ON, which the
power domain re-runs once the supply is back.
This matters on SoCs where a low-power state collapses the LP_FLEXCOMM
power domain. PSELID[PERSEL] clears, no communications function is
selected, and per the reference manual the selected module's
register-interface clock is then internally gated, so the next access to
a child (LPUART/LPSPI/LPI2C) register bus-faults. Re-running TURN_ON is
what puts the wrapper back.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Add a BCM2835-specific vendor quirk that acquires the VideoCore
power domain through the runtime PM API in pre_enable, disable
and shutdown, and translate physical addresses to the DMA bus
address space using dma_addr_xlate hook.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Add uhc_dwc2_quirk_dma_addr_translation() call before each HCDMA write
(control setup/data, bulk) to allow platform-specific translation
of CPU-side buffer addresses into bus/DMA addresses (e.g. BCM2711
VC AXI +0xC0000000 offset) prior to being written into HCDMA.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Use mem_addr_t for DMA buffer addresses in control and bulk
transfers instead of uint8_t *.
Cast the buffer pointers to mem_addr_t when assigning the DMA
address.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Add support for NXP PNG decoder hardware module. This driver provides
memory-to-memory (M2M) video transformation capability to decode PNG
compressed images into raw pixel formats.
Key features:
- Supports PNG input format (VIDEO_PIX_FMT_PNG)
- Resolution support: 1x1 to 1024x65535 pixels (1-pixel step)
- Fixed RGBA32 output format (VIDEO_PIX_FMT_RGBA32)
- Interrupt-driven operation with input/output buffer queues
- 8-byte buffer alignment requirement
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
Add UART driver for the ASCLIN module found on TC3x and TC4x.
Supports polling mode with configurable baudrate via the ASCLIN
fractional divider. Uses a private register header to handle
TXDATA/RXDATA layout differences between TC3x and TC4x.
Signed-off-by: Christoph Seitz <christoph.seitz@infineon.com>
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Add driver for the AURIX Service Request Router (IR) which maps
peripheral service requests to CPU interrupt priorities. The IR
handles priority-based dispatch and is shared across TC3x and TC4x.
Signed-off-by: Christoph Seitz <christoph.seitz@infineon.com>
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Add system timer drivers using the STM (System Timer Module)
on TC3x and TC4x. The STM provides the kernel tick source for
scheduling and timeouts.
Signed-off-by: Christoph Seitz <christoph.seitz@infineon.com>
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
The ns16550 driver unconditionally references DT_INST_IRQ(n, priority)
when registering the interrupt handler. This fails to compile when the
DT Nodes interrupt controller uses a single-cell specifier with no
priority cell (e.g., riscv,cpu-intc with #interrupt-cells = <1>).
Add a UART_NS16550_IRQ_PRIORITY helper macro that checks for the
priority cell existence using DT_INST_IRQ_HAS_CELL and falls back to 0
when it is absent, matching the existing pattern used by
UART_NS16550_IRQ_FLAGS for the optional flags cell.
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
Reword PWM driver Kconfig prompts to follow the style guide
from #95132, using the "{Driver Name} PWM driver" format,
following the same pattern as the merged reset (#115694)
and dac (#116400) PRs.
Also fixes a copy-paste bug in Kconfig.xmc4xxx_ccu8,
which incorrectly referenced CCU4 instead of CCU8 in its prompt text.
Part of #7272.
Signed-off-by: Harini G <harinig1818@gmail.com>
The FIFO sizes were derived from full speed packet sizes regardless of
the speed the port came up at. On a high speed port a 512 byte bulk
OUT did not fit the non-periodic TX FIFO, so the channel halted with
only CHHLTD set and no status bit, which the OUT handler did not act
on: the transfer never completed and the caller timed out. The shared
RX FIFO was sized from a 256 byte packet and cannot absorb
back-to-back 512 byte IN packets, which overruns under a sustained
stream and reports transaction errors the driver does not recover
from.
Derive both the TX and the RX sizes from the speed the port reports,
and fail a transfer whose channel halts without a reason instead of
leaving the caller waiting.
Assisted-by: Claude:opus-5
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Bulk transfers programmed HCDMA without any cache maintenance, so on
SoCs with a data cache the controller sent stale OUT payloads and the
CPU read stale IN data. A mass storage command block wrapper written
by the CPU never reached the device, which answered with a STALL.
Flush OUT payloads before starting the transfer and invalidate the IN
buffer both before the transfer and before the received data is
consumed.
Assisted-by: Claude:opus-5
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The host driver programs HCDMA with buffers that live in cached
memory and never synchronised them, so on SoCs with a data cache the
controller read stale setup packets and the CPU read stale IN data.
On ESP32-P4 this surfaced as a spurious STALL on the first
GET_DESCRIPTOR, because the descriptor bytes fetched by DMA were
never visible to the CPU.
Flush the setup packet and OUT payloads before starting a transfer
and invalidate IN buffers before the data is consumed.
Assisted-by: Claude:opus-5
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add the UHC vendor quirk for the ESP32-P4 USB-OTG 2.0 controller so
the DWC2 host driver can drive the high speed port. The quirk enables
the peripheral clock, brings up the UTMI PHY and connects the D+/D-
pulldown resistors required in host mode.
The PHY is initialised from pre_init because the HAL init resets the
PHY, which must not happen once the host port is powered.
Assisted-by: Claude:opus-5
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The chip communicates in SPI mode 3 with a maximum clock of 2 MHz
(PAA3905E1-Q datasheet, section 6.0). The bus configuration left the
clock polarity and phase at mode 0, where every register read returns
the value shifted right by one bit: the product ID 0xA2 reads back as
0x51 and probing fails unless the devicetree node happens to set
spi-cpol and spi-cpha. Set both mode bits in the driver and assert the
clock limit at build time, so correct operation does not depend on
per-board devicetree flags and an out-of-spec node fails the build
instead of running the bus out of contract.
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
A stationary sensor reports no motion for every sample, so at the
12.6 Hz streaming rate the warning floods the console with a condition
that is expected rather than exceptional.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
The chip rewrites the LED control register on its own when its
automatic mode switching runs, so the state written during
configuration does not persist: a device configured with the LED
disabled ends up strobing again a few seconds after init. Extract the
LED control sequence into paa3905_apply_led_config() and re-apply it
from the stream path roughly once a second, so the devicetree
configured state is authoritative across mode switches.
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Commit a93e31f280 ("drivers: uart: stm32: don't read TC interrupt flag
multiple times") introduced a regression.
When building with both `PM` and `UART_ASYNC_API` enabled, using
`poll_out` on a UART causes the PM lock to be released twice after being
acquired a single time.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Kamil Krzyżanowski <kamnxt@kamnxt.com>
Return an int per the prototype, not a cy_rslt_t. Both technically
work since callers will be checking for a non-zero return meaning
failure, but it's inconsistent
Signed-off-by: Zayne Stites <Zayne.Stites@infineon.com>
Assisted-by: Claude:claude-opus-5.0
Most of the variables, macros, and functions were prefixed with
an underscore. Removed these to match the standard Zephyr naming
scheme
Signed-off-by: Zayne Stites <Zayne.Stites@infineon.com>
Assisted-by: Claude:claude-opus-5.0
PCIe configuration-space helpers use DWORD indices, but the PTM code
added byte offsets directly to the extended capability base. This made
it access the wrong Capability and Control registers.
Replace compiler-dependent register bitfields with explicit masks,
including the granularity fields, and convert PTM register offsets to
DWORD indices. Update PTM Control with read-modify-write so unrelated
control bits are preserved.
Assisted-by: ChatGPT:GPT-5.6 Sol
Signed-off-by: Alejandro Sánchez <alesangreat@gmail.com>
%zu should only used for argument of size_t type, but the buf_size is of
uint32_t type. Casting to size_t is required. Otherwise, a warning will
occur with compiler of 64-bit platforms.
drivers/display/display_ed2208_gca.c:238:25: error: format
'%zu' expects argument of type 'size_t', but argument 3 has
type 'uint32_t' {aka 'unsigned int'} [-Werror=format=]
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Make the driver generic so that similar ILI display controllers, such as
ILI9881c, can reuse and extend it with their own register initialization
sequences.
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
lis2dh_trigger_anym_tap_set() tears down both INT2 event sources
(any-motion and tap) and disables the GPIO interrupt before storing the
new handler, but returned early on handler == NULL, permanently killing
the other trigger still registered on that line. Only return early when
neither handler is registered, so lis2dh_start_trigger_int2() re-arms
whichever source remains.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The runtime ODR setter only rejected 1620 Hz outside low power mode,
so 5376 Hz wrote the reserved CTRL_REG1 code 0b1010 in normal/high
resolution mode, and 1344 Hz in low power mode programmed code 0b1001
which means 5376 Hz there. Reject both unsupported combinations with
-ENOTSUP.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The raw temperature is a left-justified two's complement value, so the
fractional bits are always a positive addend to the signed integer part.
Negating the fraction for sub-zero readings moved them further from zero
(-0.25 C was reported as -1.75 C); renormalize val1/val2 instead.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
lis2dh_spi_update_reg() discarded the result of the register read and
merged the mask into an uninitialized stack byte, writing garbage bits
back to the device while reporting success. Propagate the read error
instead, matching the I2C backend's contract.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The RX callback reloads and restarts the DMA for each chunk after the
first. If either call fails it leaves through rx_disable, which only
stops the transfer, so the state is left as it was and i2s_read()
waits for data that can no longer arrive.
Every other error exit in that callback sets I2S_STATE_ERROR before
leaving. These two did not; the gap predates this series.
Signed-off-by: Hsiu-Chi Tsai <hctsai@linux.com>
A stopped stream loses one mem-slab block per DROP: the block the DMA
was writing is never returned, so the slab runs dry and a later
i2s_write() waits on it forever.
On GDMA, free it once dma_stop() has quiesced the channel, and stop
the I2S unit before the DMA on RX so nothing keeps filling the FIFO.
ESP32 and ESP32-S2 have no GDMA reset, so their stop path still does
not free. Their ISR runs the callback only on EOF, though, so the
block is already back from the DMA there and the callbacks return it
before reporting a descriptor error. The DROP leak on those two parts
is left alone; I have no ESP32 or ESP32-S2 to run a fix on.
Signed-off-by: Hsiu-Chi Tsai <hctsai@linux.com>
GDMA_INLINK_STOP_CHn is a command strobe with no acknowledge, so a
channel can still be writing to the descriptor buffer after
dma_stop() has returned, and the caller then frees a buffer the DMA
overwrites. Reset the channel so the stop is observable, and clear
the events the abandoned transfer latched: the reset writes
conf0.in_rst and leaves int_raw set, while dma_reload() and
dma_start() do not clear.
An AXI channel cannot be reset mid-transaction, so every reset site
(configure, reload and stop) now goes through one helper that
aborts, waits for the reset to become available, resets, then
releases the abort (esp-idf 4393a0d0728b).
I have no ESP32-P4, so the AXI path is build-tested only.
Signed-off-by: Hsiu-Chi Tsai <hctsai@linux.com>
