drivers: gpio: Update GPIO driver to support XMC7200
Update GPIO driver to support XMC7200 Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
This commit is contained in:
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774a62e67b
commit
33e5748a4f
1 changed files with 33 additions and 21 deletions
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@ -13,7 +13,7 @@
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* is not supported in current version of GPIO CAT1 driver.
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*/
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#define DT_DRV_COMPAT infineon_cat1_gpio
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#define DT_DRV_COMPAT infineon_cat1_gpio
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/gpio/gpio_utils.h>
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@ -28,9 +28,11 @@ LOG_MODULE_REGISTER(gpio_cat1, CONFIG_GPIO_LOG_LEVEL);
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struct gpio_cat1_config {
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/* gpio_driver_config needs to be first */
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struct gpio_driver_config common;
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GPIO_PRT_Type *regs;
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GPIO_PRT_Type *regs;
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uint8_t ngpios;
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#if (!CONFIG_SOC_FAMILY_INFINEON_CAT1C)
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uint8_t intr_priority;
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#endif
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};
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/* Data structure */
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@ -96,8 +98,7 @@ static int gpio_cat1_configure(const struct device *dev, gpio_pin_t pin, gpio_fl
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return 0;
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}
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static int gpio_cat1_port_get_raw(const struct device *dev,
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uint32_t *value)
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static int gpio_cat1_port_get_raw(const struct device *dev, uint32_t *value)
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{
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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@ -107,8 +108,7 @@ static int gpio_cat1_port_get_raw(const struct device *dev,
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return 0;
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}
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static int gpio_cat1_port_set_masked_raw(const struct device *dev,
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uint32_t mask, uint32_t value)
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static int gpio_cat1_port_set_masked_raw(const struct device *dev, uint32_t mask, uint32_t value)
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{
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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@ -118,8 +118,7 @@ static int gpio_cat1_port_set_masked_raw(const struct device *dev,
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return 0;
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}
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static int gpio_cat1_port_set_bits_raw(const struct device *dev,
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uint32_t mask)
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static int gpio_cat1_port_set_bits_raw(const struct device *dev, uint32_t mask)
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{
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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@ -129,8 +128,7 @@ static int gpio_cat1_port_set_bits_raw(const struct device *dev,
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return 0;
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}
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static int gpio_cat1_port_clear_bits_raw(const struct device *dev,
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uint32_t mask)
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static int gpio_cat1_port_clear_bits_raw(const struct device *dev, uint32_t mask)
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{
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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@ -140,8 +138,7 @@ static int gpio_cat1_port_clear_bits_raw(const struct device *dev,
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return 0;
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}
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static int gpio_cat1_port_toggle_bits(const struct device *dev,
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uint32_t mask)
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static int gpio_cat1_port_toggle_bits(const struct device *dev, uint32_t mask)
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{
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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@ -159,6 +156,7 @@ static uint32_t gpio_cat1_get_pending_int(const struct device *dev)
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return GPIO_PRT_INTR_MASKED(base);
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}
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#if (!(CONFIG_SOC_FAMILY_INFINEON_CAT1C && CONFIG_CPU_CORTEX_M0PLUS))
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static void gpio_isr_handler(const struct device *dev)
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{
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const struct gpio_cat1_config *const cfg = dev->config;
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@ -173,9 +171,8 @@ static void gpio_isr_handler(const struct device *dev)
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gpio_fire_callbacks(&((struct gpio_cat1_data *const)(dev)->data)->callbacks, dev,
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pins);
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}
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}
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#endif
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static int gpio_cat1_pin_interrupt_configure(const struct device *dev, gpio_pin_t pin,
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enum gpio_int_mode mode, enum gpio_int_trig trig)
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@ -213,8 +210,7 @@ static int gpio_cat1_pin_interrupt_configure(const struct device *dev, gpio_pin_
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return 0;
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}
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static int gpio_cat1_manage_callback(const struct device *port,
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struct gpio_callback *callback,
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static int gpio_cat1_manage_callback(const struct device *port, struct gpio_callback *callback,
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bool set)
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{
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return gpio_manage_callback(&((struct gpio_cat1_data *const)(port)->data)->callbacks,
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@ -233,13 +229,29 @@ static DEVICE_API(gpio, gpio_cat1_api) = {
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.get_pending_int = gpio_cat1_get_pending_int,
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};
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/* Interrupts are not currently supported on the Cat1C CM0+ */
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#if (CONFIG_SOC_FAMILY_INFINEON_CAT1C)
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#define INTR_PRIORITY(n)
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#if (CONFIG_CPU_CORTEX_M0PLUS)
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#define ENABLE_INT(n)
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#else
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#define ENABLE_INT(n) ENABLE_SYS_INT(n, gpio_isr_handler);
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#endif
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#else
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#define INTR_PRIORITY(n) .intr_priority = DT_INST_IRQ_BY_IDX(n, 0, priority),
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#define ENABLE_INT(n) \
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IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), gpio_isr_handler, \
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DEVICE_DT_INST_GET(n), 0); \
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irq_enable(DT_INST_IRQN(n));
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#endif
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#define GPIO_CAT1_INIT_FUNC(n) \
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static int gpio_cat1##n##_init(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), gpio_isr_handler, \
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DEVICE_DT_INST_GET(n), 0); \
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irq_enable(DT_INST_IRQN(n)); \
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\
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ENABLE_INT(n) \
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return 0; \
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}
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@ -250,7 +262,7 @@ static DEVICE_API(gpio, gpio_cat1_api) = {
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{ \
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.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n), \
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}, \
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.intr_priority = DT_INST_IRQ_BY_IDX(n, 0, priority), \
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INTR_PRIORITY(n) \
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.ngpios = DT_INST_PROP(n, ngpios), \
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.regs = (GPIO_PRT_Type *)DT_INST_REG_ADDR(n), \
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}; \
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