spi_configure was returning HAL error codes that are incompatible with
Zephyr error definitions straight back to the caller. Replace these with
error codes that Zephyr can correctly interpret.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Driver was not handling SPI word sizes other than 8 bits. Apply DFS
shift wherever necessary to support non 8-bit transfers.
DMA mode cannot support word sizes that are less than 8 bits so return
-ENOTSUP if word size less than 8-bits is required.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
This patch adds the initial support for the OMAP Multi-Channel SPI. Some
things should be noted however:
- DMA xfers are not supported yet. Only PIO is supported as of now.
- Multi-Channel controller is not supported yet. Only single-channel
controller mode is supported, this means that the controller can xfer
messages with one slave at a time.
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
Fix regression caused by memset() replacement to zero volatile struct.
ESP32-C6 data_buf struct differs from other SoCs and needs custom
handling.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This is not really high priority to support and is disrupting test
reporting, for now just hotfix the test by returning that this is not
supported, it's not really necessary anyways, there's multiple ways to
call the API to achieve the same effect.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This data update returns an error, we should propogate it where it is
called if there is an error returned.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Function spi_context_release reads the content of ctx->config without
checking first if it is set. In many drivers (including STM32), when a bad
configuration is made for the first transaction, ctx->config is not set,
and spi_context_release is called, resulting in hard fault.
This commit adds a check that ctx->config exists before reading it to
avoid this problem.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Replace memset() with an explicit loop to zero the data_buf array,
which is part of a volatile struct. Standard memset does not guarantee
volatile stores, which can lead to incorrect hardware access.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The clock get rate api can be slow in certain targets and thus slowing
each SPI transaction. Instead on startup fetch the clock rate and store
this in ram. Then each spi configure action is simply reading that
variable
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
The interrupt handling was not deterministic before because it relied
on "guessing" if the lpspi was a v1 type that was stalling due to design
errata. This obviously ended up being wrong in some cases. So we really
need to fix this so that it is deterministic, and my idea to do that is
to explicitly count how many words we have written to the TX fifo
throughout the whole transfer.
As a side effect of making the IRQ more deterministic, we can't support
the SPI_HOLD_ON_CS flag for v1 LPSPI anymore. It is fundamentally
impossible due to the fact that the transfer can only complete in
hardware as a result of CS deasserting. If this is absolutely a
requirement to support this flag in the future, my recommendation is to
update the driver so that it muxes the pin to a gpio before ending the
transfer, but that would kind of defeat the point of having a native CS,
at least at the end of the xfer.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Utilize a code spell-checking tool to scan for and correct spelling errors
in `Kconfig` files within the `drivers` directory.
Additionally, incorporates a fix recommended by the reviewer.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add overlay file for RT1170 EVK and simply existing flexio spi overlay
file for RT1060 EVKC and RT1064 EVK. One flexio-spi interface for both slow
and fast tests. Fast baud rate set to 16Mbps now.
Signed-off-by: Raymond Lei <raymond.lei@nxp.com>
Several reason cause loopback test failed:
a) FlexIO input frequency is not correct, on RT11xx, input freq is 24M,
while max baud rate can reach 1/4 of input freq, so it can only support
6Mbps.
b) Flexio shift register depend on correct timer output to triggger TX
and RX, if timer comparison value is not accurate, RX error happens on
high baud rate. This is the reason why test fails on RT1060.
also fix a error on FlexIO clock ID calculation.
Signed-off-by: Raymond Lei <raymond.lei@nxp.com>
STM32H7 spi_loopback test fails since the introduction of a test enabling
SPI_HOLD_ON_CS.
This uncovered an issue where the SPI ISR is constantly called if the SPI
is not disabled, even if the interrupt enable register is completely
cleared.
A workaround is to disable the SPI IRQ at the NVIC level when
SPI_HOLD_ON_CS is used.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
MAX32657 introduces changes for registers named (master, slave) to
(controller, target) this causes build issues
Signed-off-by: Mert Ekren <mert.ekren@analog.com>
Avoid accessing tx_bufs or rx_bufs when they are NULL by adding proper
conditional checks before dereferencing. This addresses Coverity issue
CID 516225 (CWE-476).
Signed-off-by: sudarsan N <sudarsansamy2002@gmail.com>
When loopback mode is enabled, the output of transmit serial shifter
is connected to the input of receive serial shifter internally.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Two DMA channels are assigned to TX and RX respectively:
- A TX DMA single request is asserted when there is space in the FIFO.
- A RX DMA single request is asserted when data is in the FIFO.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Different LPSPI IPs are used for RT11xx and MCXN. On a older version of
LPSPI, a transmit command or a TX data need to be issued to end a frame.
On a new version, no such requirement.
Based on above information, we have to make DMA transfers "cascade" in
the DMA ISR to keep CS asserted during the whole SPI transfer.
PCS_HOLD_ON is a feature to keep CS asserted during multi SPI transfers.
It is implemented and supported on new LPSPI IP but it is impossible to
be supported on an older version like RT11xx.
Signed-off-by: Raymond Lei <raymond.lei@nxp.com>
RA2L1 doesn't support for SPI Hardware Peripgheral Select.
Disable this config as default in RA2L1
Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
Set right frame size in spi_context_buffers_setup and fetch
the right rx size based on frame size. Also clear SPI control register
before set mode & data width in spi configure routine.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Updated buffer length variables to be size_t as they need to be able to
represent the maximum buffer size which is 4092.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This stupid errata will not leave me alone, here is another bandaid to
deal with an issue where an extra byte was being sent on version 1
LPSPIs due to the algorithm of filling NOPs when only RX is left was not
expecting the situation where the LPSPI actually consumed everything
from the fifo but is not sending it due to this ridiculous stalling errata.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The buf_len parameter of lpspi_fill_tx_fifo is supposed to be bytes, so
we do not need to convert it. This could cause an issue if the end of
the buffer is less bytes than the word size.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Fixing some issues with the TX fifo fill logic in two places:
First in the normal fill function, it didn't take into account a
situation where the TX fifo is already partially filled. This currently
doesn't cause a problem because the driver is written in a way that the
watermark is always 0 for TDF, but in case the watermark were anything
else it would cause a problem.
Second, when filling the TX fifo with NOPS in order to clock the rest of
the RX in from the bus, the calculation regarding the current TX fifo
length was just wrong and was leading to a bug in some cases where there
was a subtraction underflow and billions of NOPs were being filled.
Also, there could be a problem where a few extra NOPs are put in the TX
fifo if we don't count what we already have in the TX fifo, so fixing
that as well.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
There is no need to update the tx context in interrupt instead of
directly after the fill, this just makes the code more complex. Also,
the spi context header already handled iterating over buffers so we can
remove that code too.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Since the LPSPI drivers no long use MCUX at all, remove the MCUX
branding, to avoid confusion. In the future if an implementation uses
the MCUX SDK driver, it should specifically be called by MCUX in the
name.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
For optimization purpose, remove calls to SDK. Since we know exactly
what we want, this results in smaller code size.
Also, this code calculates the SCK parameters more efficiently than the
SDK driver did it by using a binary (instead of linear) search.
Lastly, remove call to LPSPI_Reset in the init call and replace with
native driver code, and remove inclusion of SDK header.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Instead of waiting forever and potentially allowing infinite loop on
ISR, wait some arbitrary amount of cycles to error out if it isn't
happening. Still make this configurable for debugging purposes.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Since I expect that the drivers will need to read this version ID maybe
multiple times, instead of repeatedly doing so over the peripheral bus,
it is probably worth it to store a byte in RAM representing this
version. The behavior of the LPSPI is fairly significantly different
between versions. Not enough to warrant separate drivers but enough to
need a few workarounds or different code branches depending on this.
Also, the interrupt based driver is currently using a wrong macro to
read this, and that is a bug.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Clarify at the top of the common lpspi file what is the purpose of the
file to be clear to future developers that this file is not supposed to
make any assumption about a particular implementation of the zephyr API
using the LPSPI, because I imagine it could be very likely that more
lpspi implementation will be done in the future to make different
tradeoffs than the current two. Also the current two are different
enough that we should avoid making assumptions even if they currently
hold for both because they might not always, as things change.
We should disable interrupt events while configuring the LPSPI
regardless of implementation. The specific implementation should enable
the interrupts it needs on its own transceive implementation.
Also clarify and simplify some code in the configure function. Namely,
we no longer need to check if we are already configured to write to
registers because a recent commit made it so that we clock the
peripheral from the zephyr driver init instead of upon the MasterInit
call on the SDK. There is also a redundant CR write which I have removed.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
When reconfiguring the SSP, some changes do not immediately take effect
in particular changes to the clock polarity are not applied. Disabling
and re-enabling the SSP forces the new configuration to take effect
immediately.
Signed-off-by: George Norton <george_norton_uk@hotmail.com>
Update the source_data and dest_data sizes with the frame size
in bytes before performing the transfer.
With these changes, we can handle cases where the buffers switch
between 8-bit and 16-bit modes.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Workaround to avoid getting the -EFAULT (14) error when running
the test_spi_word_size_x (x = 7, 9, 24) test cases:
Since these testcase configurations aren't supported, update
the error type to ENOTSUP to allow skipping the test cases using ztest.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
It is not an error if the clock source is already enabled. This
may happen if a bootloader has used the peripheral and not
de-initialized it before booting the application.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
